8b/10b Encoder Decoder design and Verification for PCI Express protocol using cadence tool
Under the guidance of
• Used to attach hardware to a computer.
• Introduced by Intel in 1992.
• PCIe, is a high-speed serial computer
expansion bus standard designed to replace
the older PCI &PCI-X.
a = A
b = B.(L30D)’+L03.D’
c = C+L03.(D’+E)
d = D.(L03.D)’
e = E.(L03.D)’+L12.D’.E’+L03.D.E’
i = L21.D’E’+L12.D’.E’+L03.D.E’
f = F.[F.G.H.(S+K)]’
g = G+F’.H’
h = H
J = (F≠G).H’+F.G.H.(S+K)
Use Common line codes
1.RZ - Return To Zero
2.NRZ - None Return To Zero
3.AMI - Alternate Mark Inversion
• “Design of Physical Coding Sublayer using 8B/10B
Algorithm” N.Kiran Babu, P.S.Srinivas Babu, International
Journal of Recent Technology and Engineering (IJRTE) ISSN:
2277-3878, May 2013
• “8B/10B Encoding And Decoding For High Speed
Applications” Alber X.Widmer, IBM Reserch Report
RC23408 (W0411-032) November 3,2010.