Modelsim Setup and Hello World
1. Make Sure your “Modelsim-Altera” ready
2. Go through a tutorial example for RTL simulati
on with ModelSim
1. quartus_install.pdf, www.altera.com
2. oem_tutor.pdf, ModelSim Tutorial
Basic Simulation Flow
a verification and simulation t
and mixed-language designs.
ModelSim RTL simulation
1. Create libraries.
2. Map to libraries.
3. Compile source code and testbenches.
4. Load the design.
5. Add design stimulus.
6. View the simulation results.
7. Advance the simulator
You already had practiced it at Lab1.
Verilog: Copy counter.v and tcounter.v file
cSimulation to the new directory.
Click from your Desktop
Select File > Change Direc
tory and change to
the directory you
Create the working library.
Select File > New > Library.
dir work, file 『 _info 』