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Chapter 3: Simplification of Boolean Function

Chapter 3: Simplification of Boolean Function

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Chapter 3: Simplification of Boolean Function

  1. 1. Er. Nawaraj Bhandari Digital Logic Chapter 3:
  2. 2. Minterm and Maxterm  A boolean variable and its complement are called literals.  Minterm is a product of all the literals (with or without complement).  if we have two boolean variables X and Y then  X.(~Y) is a minterm  we can express complement ~Y as Y’  so, the above minterm can be expressed as XY’  So, if we have two variables then the minterm will consists of product of both the variables
  3. 3.  If there are two variables X and Y then both of them will appear in the product when forming Minterm.  Following are the steps to get the shorthand notation for minterm.  1. Write the term consisting of all the variables  2. Replace all complement variables like ~X or X’ with 0  3. Replace all non-complement variables like X or Y with 1  4. Express the decimal equivalent of the binary formed in the above steps  The decimal number is then written as a subscript of letter m where, small m denote minterm.
  4. 4. find the minterm of expression-  F=x’y’z+xy’z’+xyz  For drawing the truth table we need 2n combination x y z term notation bit 0 0 0 x’y’z’ m0 0 0 0 1 X’y’z m1 1 0 1 0 X’yz’ m2 0 0 1 1 X’yz m3 0 1 0 0 Xy’z’ m4 1 1 0 1 Xy’z m5 0 1 1 0 Xyz’ m6 0 1 1 1 xyz m7 1 F=m1+m4+m7 𝑚(1,4,7) Ex- F=A’B’C’+A’B’C+A’BC+ABC’
  5. 5. Maxterm  Maxterm is a sum of all the literals (with or without complement).  Example  if we have two boolean variables X and Y then  X + (~Y) is a maxterm  we can express complement ~Y as Y’  so, the above maxterm can be expressed as X + Y’  So, if we have two variables then the maxterm will consists of sum of both the variables.  Following are the steps to get the shorthand notation for maxterm.  1. Write the term consisting of all the variables  2. Replace all complement variables like ~X or X’ with 1  3. Replace all non-complement variables like X or Y with 0  4. Express the decimal equivalent of the binary formed in the above steps  The decimal number is then written as a subscript of letter M where, capital M denote maxterm.
  6. 6.  Ex- f=(A+B+C’)(A+B’+C’)(A’+B’+C)  001 011 110 F=M1+M3+M6 𝑚(1,3,6)
  7. 7. SOP  A boolean expression consisting entirely either of minterm or maxterm is called canonical  expression.  Example  if we have two variables X and Y then,  Following is a canonical expression consisting of minterms XY + X’Y’ and  Following is a canonical expression consisting of maxterm (X+Y) . (X’ + Y’)
  8. 8.  F=A’BC’+AB’C’+AB’C+ABC’+ABC----THIS IS CALLED CONONICAL EXPRESSION AND STANDARD EXP  F(A,B,C)=(2,4,5,6,7)  Sol-  A’BC’+AB’(C’+C)+AB(C’+C)  A’BC’+AB’+AB=A’BC’+A(B’+B)  A’BC’+A-------DISTRIBUTIVE LAW(A’BC’+A=BC’+A)  F=BC’+A  EX2-Y(A,B)=(0,2,3)  SOL- A’B’+AB’+AB=B’(A’+A)+AB  B’+AB=B’+A
  9. 9. POS  A boolean expression consisting purely of Maxterms (sum terms) is said to be in canonical product of sums form  Example  Lets say, we have a boolean function F defined on two variables A and B. So, A and B  are the inputs for F and lets say, output of F is true i.e., F = 1 when only one of the input is true or 1.  now we draw the truth table for F
  10. 10.  F = (A+B) . (A’+B’)  Now, lets say we want to express the POS using shorthand notation.  we have F = (A+B) . (A’+B’)  First we need to denote the maxterms in shorthand notation(/booleanalgebra/mintermand-maxterm).  A+B = (00) = M0  A’+B’ = (11) = M3  Now we express F using shorthand notation.  F = M0 . M3  This can also be written as F = Π(0, 3)  EX2-F = Π(1, 2, 3)  M1.M2.M3=01 10 11  we have, F = Π(1, 2, 3)  = (A+B’) . (A’+B) . (A’+B’)
  11. 11. Karnaugh Map K-MAP  We know that truth table is used to represent values of a boolean function. Similarly, Karnaugh map is another way of representing the values of a boolean function. So, K-map is a table consisting of cells which represents a Minterm or Maxterm. Karnaugh map or K-map is named after Maurice Karnaugh.  Karnaugh Map for Sum of Products  For SOP or Sum of Products, each cells in a K-map represents a Minterm. If there are n variables for a given boolean function then, the K-map will have 2n cells. And we fill the cells with 1s whose Minterms output is 1. Lets check the K-map for 2, 3 and 4 variables.
  12. 12.  2-Variable-Say we have two variables X and Y then, there will be 22 = 4 cells in the K-map.  3-variable- we have three variables X, Y and Z then there will be 23 = 8 cells in the K-map.  Each cell has a subscripted number at the bottom right corner it is the value of the minterm. So, if a cell has number 7 then it represent minterm m7.  Now if we look at the above K-map we will see that the numbering scheme is 0, 1, 3, 2 in the first row and 4, 5, 7, 6 in the second row. So, the numbers differ in one place when moving from left to right.  00, 01, 11, 10 this is done so that only one variable change at a time from complement to un-complement or un-complement to complement every row.  Example, in the first row we have X’Y’Z’, X’Y’Z, X’YZ and X’YZ’ so, only one variable change at a time as we move from left to right.
  13. 13.  4 variables K-map for Sum of Products  Say we have four variables W, X, Y and Z then there will be 24 = 16 cells in the K-map.
  14. 14.  N the k map we have to cover all 1’s for minterm in the pair of 2,4,8,16…etc  And cover all 0’s for maxterm(pos) in same manner i.e.2,4,8,16…etc  We create max pair to cover all one  We can only make pair of adjacent cell  We can take cell for repairing.  For ex-  Simplify the following using k-map  F(WXYZ)=m(4,5,6,7,8,9,10,11,12,13,14,15)
  15. 15.  Take common column from table  F=B+A  EX- find the following  F=(ABC)=A’BC+BC’+ABC’+AB’C using k map sop and pos  Sol-  sop=> F=BC’+A’B+AB’C  POS=> F=(B+C)(A+B)(A’+B’+C’)
  16. 16. NAND and NOR implementation  Digital circuits are more frequently constructed with NAND or NOR gates than with AND and OR gates. NAND and NOR gates are easier to fabricate with electronic components and are the basic gates used in all IC digital logic families. The procedure for two-level implementation is presented in this section.  NAND and NOR conversions (from AND, OR and NOT implemented Boolean functions)  Because of the prominence of NAND and NOR gates in the design of digital circuits, rules and procedures have been developed for the conversion from Boolean functions given in terms of AND, OR, and NOT into equivalent NAND and NOR logic diagrams
  17. 17. (a) NAND implementation  The rule for obtaining the NAND logic diagram from a Boolean function is as follows:  First method:  (a) Simplify the function and express it in sum of products.  (b) Draw a NAND gate for each product term of the function that has at least two literals. The inputs to each NAND gate are the literals of the term. This constitutes a group of first- level gates.  Draw a single NAND gate (using the AND-invert or invert-OR graphic symbol) in the second level, with inputs coming from outputs of first-level gates.  (d) A term with a single literal requires an inverter in the first level or may be complemented and applied as an input to the second-level NAND gate.
  18. 18.  Example: Implement the following function with NAND gates: (𝑥,𝑦,𝑧) = (0,6)  The first step is to simplify the function in sum of products form. This is attempted with the map. There are only two 1's in the map, and they can’t be combined. Sop pos
  19. 19. NOR Implementation  The NOR function is the dual of the NAND function. For this reason, all procedures and rules for NOR logic are the duals of the corresponding procedures and rules developed for NAND logic. The implementation of a Boolean function with NOR gates requires that the function be simplified in product of sums form. A product of sums expression specifies a group of OR gates for the sum terms, followed by an AND gate to produce the product  Example: Implement the following function with NOR gates: (𝑥,𝑦,𝑧) = (0,6)  First we create nand gate and change it into nor gate
  20. 20.  F'=x'y+xy'+z  Due to change in nor gate apply deamorgan law  This is the complement of the function in sum of products. Complement F' to obtain the simplified function in product of sums as required for NOR implementation:  F = (x + y') (x' + y) z'

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