Architecture of 8086 Microprocessor

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Architecture of 8086 Microprocessor

  1. 1. ARCHITECTURE 0FARCHITECTURE 0F 80868086 MICROPROCESSORMICROPROCESSOR 1
  2. 2. CONTENTS  INTRODUCTION 8086 MICROPROCESSOR  ARCHITECTURE OF 8086 MICROPROSSESOR  BIU AND EU  REGISTERS OF 8086  ALU  QUEUING OF INSTRUCTION IN 8086 2
  3. 3. INTRODUCTION TO 8086 • The microprocessor 8086 is made of HMOS: high performance metal oxide semiconductor technology with an IC circuitry equivalent to ≈ 29000 transistors. • Housed in a 40-pin dual in-line package. • 8086 is a 16bit processor. It’s ALU, internal registers works with 16bit binary word. • 8086 has a 16bit data bus. It can read or write data to a memory/port either 16bits or 8 bit at a time. • 8086 has a 20 bit address bus which means, it can address up to 220 = 1MB memory location. • Frequency range of 8086 is 6-10 MHz. 3
  4. 4. 8086 ARCHITECTURE
  5. 5. Bus Interface Unit (BIU)  The BIU fetches instructions, reads and writes data, and computes the 20-bit address.  BIU handles all the data transfers and addresses on the buses for EU.  EU executes instructions from the instruction system byte queue.
  6. 6. Execution Unit (EU) • The EU contains Control Circuitry, Instruction Decoder, ALU, Pointer and Index register, Flag register. • EU tells the BIU where to fetch instructions and data. • The EU decodes and executes the instructions using the 16-bit ALU. • Decoder translates instructions into series of actions which EU carries out. • ALU can perform arithmetic and Logical operations. • Control Circuitry directs internal operations.
  7. 7. REGISTERS IN 8086 ES CS SS DS IP AH BH CH DH AL BL CL DL SP BP SI DI FLAGS AX BX CX DX Extra Segment Code Segment Stack Segment Data Segment Instruction Pointer Accumulator Base Register Count Register Data Register Stack Pointer Base Pointer Source Index Register BIU registers (20 bit adder) EU registers Destination Index Register FLAGS Register
  8. 8. Registers Description • Registers – Data registers • Hold data for an operation to be performed • There are 4 data registers (AX, BX, CX, DX) – Address registers • Hold the address of an instruction or data element • Segment registers (CS, DS, ES, SS) • Pointer registers (SP, BP, IP)
  9. 9. • Instructions execute faster if the data is in a register • Low and High bytes of the data registers can be accessed separately – AH, BH, CH, DH are the high bytes – AL, BL, CL, and DL are the low bytes • Data Registers are general purpose registers but they also perform special functions • AX – Accumulator Register – Preferred register to use in arithmetic, logic and data transfer Data Registers
  10. 10. • BX – Base Register – Also serves as an address register – Used in array operations • CX – Count register – Used as a loop counter – Used in shift and rotate operations • DX Data Registers (contd..)
  11. 11. Flag Register Carry flag Parity flag Auxiliary flag Zero Overflow Direction Interrupt enable Trap Sign 6 are status flags
  12. 12. Flag Register Description • SF (sign) Contains the resulting sign of an arithmetic operation (1=negative) • ZF (zero) Indicates when the result of arithmetic or a comparison is zero. (1=yes) • CF (Carry) Holds the carry out after addition or the borrow after subtraction. • AF (auxiliary carry) Contains carry out of bit 3 into bit 4 for specialized arithmetic. • PF (parity) Indicates the number of 1 bits that result from an operation in accumulator. • OF (overflow) Indicates overflow of the leftmost bit during arithmetic operation. • DF (direction) Indicates left or right for moving or comparing string data if df=0 then then string proceed from lower address to high otherwise high add. To low
  13. 13. TF (trap flag) • TF (trap) Permits operation of the processor in single step mode .Here single stepping means to run a one instruction at a time and see the contents of used registers and memory avilaiable after execution of program. This is one way to debug the program and errors can be eaisly eliminated. 13
  14. 14. • IP: Instruction Pointer Points to Next Instruction in code Memory.it calculate the 20 bit physical address. SP: Stack pointer Points to Program Stack.it contains 16 bit offeset from start of stack segment. • BP: Base Pointer Primarily used to access data on the stack Pointer and Index Registers
  15. 15. • SI & DI: Source and Destination Index register It is required for string operations. When string operations are performed, the SI & DI register points to memory locations in the data segment which is addressed by the DS register. • In case when physical address is calculated from SI and DS sI holds the 20 bit address. • ES+DI is used to calculate the 20 bit adderess then di holds this address. 15
  16. 16. ALU ALU stands for arithmetic and logic unit. It performs, 1.Math operation like 8 or 16 bit addition, subtraction, data conversion, 2.Logical operation like NOT, OR,XOR,AND,etc. 3.Increment ,decrement, and shift operation. 16
  17. 17. Instruction queue in 8086 • 8086 provides queuing facility where BIU fetches the six instruction byte from memory while current instruction is being executed. It speed up the program execution. • It works on first in first out (FIFO) fashion. • The size of queue for 8086 is 6 bytes. • BIU fetches the instruction code from memory and stores in queue, EU fetches the instruction from queue for execution. 17
  18. 18. THANK YOU 18

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