Presentation by: SHISHIRA 1 st  sem MTech CET  DIGITAL SIGNAL PROCESSING
OVERVIEW OF THE PRESENTATON <ul><li>Introduction </li></ul><ul><li>RICA architecture overview </li></ul><ul><li>Features <...
INTRODUCTION <ul><li>SDR is a radio wherein the radio’s physical layer behaviour is primarily defined in software.  </li><...
BLOCK DIAGRAM OF SDR TRANSMITTER CET  DIGITAL SIGNAL PROCESSING
BLOCK DIAGRAM OF SDR RECEIVER CET  DIGITAL SIGNAL PROCESSING
<ul><li>SDR is one of the most important topics in the area of mobile and personal communications. </li></ul><ul><li>SDR p...
RICA ARCHITECTURE OVERVIEW RICA core design high level flow CET  DIGITAL SIGNAL PROCESSING
FEATURES <ul><li>RICA uses eclipse C IDE as the development tool, hence provides the programmers to map applications. </li...
Hardware architecture diagram SYSTEM ARCHITECTURE CET  DIGITAL SIGNAL PROCESSING
SYSTEM DESIGN ENVIRONMENT <ul><li>The design flow consists of two main steps: </li></ul><ul><li>ARM development suit (ADS)...
SYSTEM ASSESMENT <ul><li>OFDM physical layer has been mapped into this proposed system. </li></ul><ul><li>The system works...
ADVANTAGES <ul><li>Maintainability enhanced. </li></ul><ul><li>Flexibility, capability and durability. </li></ul><ul><li>H...
CONCLUSION <ul><li>Higher transmitter and receiver throughput with lower frequency is achieved. </li></ul><ul><li>Heteroge...
CET  DIGITAL SIGNAL PROCESSING
CET  DIGITAL SIGNAL PROCESSING
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Main (4)

  1. 1. Presentation by: SHISHIRA 1 st sem MTech CET DIGITAL SIGNAL PROCESSING
  2. 2. OVERVIEW OF THE PRESENTATON <ul><li>Introduction </li></ul><ul><li>RICA architecture overview </li></ul><ul><li>Features </li></ul><ul><li>System architecture </li></ul><ul><li>System design environment </li></ul><ul><li>System assessment </li></ul><ul><li>Advantages </li></ul><ul><li>Conclusion </li></ul>CET DIGITAL SAL PROCESSING
  3. 3. INTRODUCTION <ul><li>SDR is a radio wherein the radio’s physical layer behaviour is primarily defined in software. </li></ul><ul><li>It is a radio wherein the operating parameters of frequency range, modulation type or maximum output power can be altered by making changes to software. </li></ul>CET DIGITAL SIGNAL PROCESSING
  4. 4. BLOCK DIAGRAM OF SDR TRANSMITTER CET DIGITAL SIGNAL PROCESSING
  5. 5. BLOCK DIAGRAM OF SDR RECEIVER CET DIGITAL SIGNAL PROCESSING
  6. 6. <ul><li>SDR is one of the most important topics in the area of mobile and personal communications. </li></ul><ul><li>SDR promises mobile communication technology a major increase in flexibility, capability and durability. </li></ul><ul><li>As communication standards are moving forward more complex algorithms and management schemes are being introduced and they consume much more power than the older versions. </li></ul>CET DIGITAL SIGNAL PROCESSING
  7. 7. RICA ARCHITECTURE OVERVIEW RICA core design high level flow CET DIGITAL SIGNAL PROCESSING
  8. 8. FEATURES <ul><li>RICA uses eclipse C IDE as the development tool, hence provides the programmers to map applications. </li></ul><ul><li>ARM controller is also programmed in C. </li></ul><ul><li>Accelerates development speed and reduces cost. </li></ul><ul><li>Both RICA core and ARM core are 32 bit architectures . </li></ul>CET DIGITAL SIGNAL PROCESSING
  9. 9. Hardware architecture diagram SYSTEM ARCHITECTURE CET DIGITAL SIGNAL PROCESSING
  10. 10. SYSTEM DESIGN ENVIRONMENT <ul><li>The design flow consists of two main steps: </li></ul><ul><li>ARM development suit (ADS) </li></ul><ul><li>RICA Eclipse C IDE. </li></ul>CET DIGITAL SIGNAL PROCESSING
  11. 11. SYSTEM ASSESMENT <ul><li>OFDM physical layer has been mapped into this proposed system. </li></ul><ul><li>The system works in full duplex mode. </li></ul><ul><li>Data frames are fed into the individual RICA processors following a frame segmentation method. </li></ul>CET DIGITAL SIGNAL PROCESSING
  12. 12. ADVANTAGES <ul><li>Maintainability enhanced. </li></ul><ul><li>Flexibility, capability and durability. </li></ul><ul><li>High receiver and transmitter throughput. </li></ul><ul><li>Low power compared to other programmable applications. </li></ul><ul><li>Easy programming model from high level C. </li></ul>CET DIGITAL SIGNAL PROCESSING
  13. 13. CONCLUSION <ul><li>Higher transmitter and receiver throughput with lower frequency is achieved. </li></ul><ul><li>Heterogeneous architecture targeting mobile SDR has been proposed. </li></ul><ul><li>The hardware platform is composed of an ARM controller and several Reconfigurable Instruction Cells based array processors. </li></ul>CET DIGITAL SIGNAL PROCESSING
  14. 14. CET DIGITAL SIGNAL PROCESSING
  15. 15. CET DIGITAL SIGNAL PROCESSING

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