Computer Architecture: A quantitative approach - Cap4 - Section 5

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Computer Architecture: A quantitative approach - Cap4 - Section 5

  1. 1. Multiprocessors and Thread-Level Parallelism Synchronization: The Basics “ Synchronization mechanisms are typically built with user-level software routines that rely on hardware-supplied synchronization instructions.” Hennessy and Patterson
  2. 2. <ul><li>Atomic exchange </li></ul><ul><li>Test-and-set </li></ul><ul><li>Fetch-and-increment </li></ul><ul><li>Load linked and store conditional </li></ul>Basic Hardware Primitives
  3. 3. Fetch-and-increment using LL/SC
  4. 4. Implementing locks using coherence
  5. 5. Implementing locks using coherence
  6. 6. Implementing locks using coherence
  7. 7. Implementing locks using coherence
  8. 8. Thank you! Author: Prof. Sergio Takeo, Marcelo Arbore. Bibliography: Patterson, D. A.; Hennessy, J. L. Computer Architecture: A quantitative Approach, 4 th Ed. Morgan Kaufmann Publishers. “ Synchronization mechanisms are typically built with user-level software routines that rely on hardware-supplied synchronization instructions.” Hennessy and Patterson

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