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Mcs 012 computer organisation and assemly language programming- ignou assignment answer 2013-14

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MCS-012 Computer Organisation and Assemly Language Programming- IGNOU Assignment Answer 2013-14

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Mcs 012 computer organisation and assemly language programming- ignou assignment answer 2013-14

1. 1. Question 1 a) Perform the following arithmetic operations using binary signed 2’s complement notation for integers. You may assume that the maximum size of integers is of 12 bits including the sign bit. i) Add – 512 and 198 ii) Subtract 400 from – 98 iii) Add 400 and 112 Ans: i) 512 in Binary = 10 0000 0000 2s comp of 512(i.e -512) = 10 0000 0000 198 in Binary = + 00 1100 0110 Addition = Cy10 1100 0110 Since no Carry the result is in 2’s compliment form so sign is –ve and magnitude is 2s compliment of result 10 1100 0110 is 01 0011 1010(314) = -314 No Overflow since Cin to Sign bit & Cout  from Sign bit are same. ii) 98 in Binary = 00 0110 0010 2s comp of 98 (ie -98) = 11 1001 1110 2s comp of 400(i.e -400) = + 10 0111 0000 Addition = Cy10 0000 1110 Since Carry is 1, discard the carry and the result is –ve, the magnitude is 2’s compliment of the result 10 0000 1110 = 01 1111 0010 = -498 No Overflow since Cin to Sign bit & Cout from Sign bit is same. iii) 400 in Binary = 01 1001 0000 112 in Binary = + 00 0111 0000 Addition = Cy10 0000 0000 There is No Overflow, since Cin is to Sign bit & Cout is from Sign bit are same. The result is correct b) Convert the hexadecimal number: 21 3A EF into binary, octal and decimal equivalent. Ans: Binary = 0010 0001 0011 1010 1110 1111 Octal = 10235357 Decimal = 2177775 c) Convert the following string into equivalent “UTF 16” code –“Email addresses always use @ sign”. Are these codes same as that used in ASCII? Ans: UTF-16 Code: 0045 006D 0061 0069 006C 0020 0061 0064 0064 0072 0065 0073 0073 0065 0073 0020 0061 006C 0077 0061 0079 0073 0020 0075 0073 0065 0020 0040 0020 0073 0069 0067 006E ASCII Code: 45 6D 61 69 6C 20 61 64 64 72 65 73 73 65 73 20 61 6C 77 61 79 73 20 75 73 65 20 40 20 73 69 67 6E No, these codes are NOT the same. (UTF 16 is 16 bit but ASCII is 8 bit) -1- MCS-012 CO&ALP Loganathan R Bangalore
2. 2. d) Design two logic circuits. The first circuit takes 3 bit input and produces an odd parity bit output of the three input bits. The second circuit takes the 3 bit input and the parity bit (which is produced as output of circuit 1) and outputs 0 if the odd parity is satisfied, else it outputs 1. Draw the truth tables and use K-map to design the Boolean expressions for each of the output bits. Draw the resulting circuit diagram using AND – OR – NOT gates. Ans: e) Design a two bit counter (a sequential circuit) that counts as 0, 2, 0, 2... and so on. You should show the state table, state diagram, the kmap for circuit design, logic diagram of the resultant design using D flip- flop. Ans: State Table Present State Next State Flip-flop input A B A B DA DB 0 0 0 1 0 1 0 1 1 0 1 0 1 0 0 0 0 0 State Diagram K-Map For DA DA = A`B` For DB DB = A Logic Diagram B A 0 1 0 1 0 1 0 X B A 0 1 0 0 1 1 0 X Clock D D Q Q A B 00 10 01 -2- MCS-012 CO&ALP Loganathan R Bangalore
3. 3. f) Design a floating point representation of size 24 bits closer to IEEE 754 format. The number should have a 7 bit biased exponent having a bias of 64. You may assume that the mantissa is in normalised form with first bit being the sign bit of mantissa. Represent the number (34.125)10 using this format Ans: Binary of 24.125 = 100010.001 Normalized Form = 1.00010001X25 Sign bit = 0 Exponent = 5 Biased Exponent = 63+5 = 68 = 1000100 Significand = 0001000100000000 23 22 16 15 0 0 1 0 0 0 1 0 0 1 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 S Exponent Significand Question 2 a. A RAM has a capacity of 256K × 8. (i) How many data input and output lines does this RAM need? Explain your answer. (ii) How many address lines will be needed for this RAM? Explain Ans: i) Data Input Lines = 8 , Data Output Lines = 8, Since each location stores only 8 bit ii) Number of Address Lines Required = 18, Since 256 X 1024 Locations are addressed b. A computer have 1024 words RAM with a word size of 16 bits and a cache memory of 16 Blocks with block size of 32 bits draw a diagram to show the address mapping of RAM and Cache, if (i) direct cache mapping is used, and (ii) the two way set associative memory to cache mapping scheme is used Ans: i. Direct cache Mapping Tag(6bit) Index(4bit) Tag Index Main Memory 1024X16 Index Cache 16X 32 000000 0000 0000 000001 0001 0001 111111 1111 1111 ii. 2 way Associative Memory Mapping RAM Size = 1024X 16 Cache Memory Size = 16 Blocks Cache Memory Block size = 32 bits ⇒1 Block of Cache = 2 Words of RAM Index size = 4 bits Tag = 6 bits -3- MCS-012 CO&ALP Loganathan R Bangalore