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PCI-e EndPoint mode of operation in OpenDataPlane (ODP) - BUD17-107

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Session ID: BUD17-107
Session Name: PCI-e EndPoint mode of operation in OpenDataPlane(ODP) - BUD17-107
Speaker: Narayana Prasad Athreya
Track: LNG


★ Session Summary ★
A proposal to add ODP based support for PCI-e Endpoint mode of operation. In the Endpoint mode the ODP implementation runs on the Endpoint device while the Root Complex(PCI-e host) will appear as a peripheral device. The proposal outlines 2 ways in which the Root Complex can be registered with ODP:
A. As a NIC device
B. As a Co-processor.
The initial implementation will target Cavium OCTEON TX SoC
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★ Resources ★
Event Page: http://connect.linaro.org/resource/bud17/bud17-107/
Presentation:
Video: https://youtu.be/tQo7sbQbeI0
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★ Event Details ★
Linaro Connect Budapest 2017 (BUD17)
6-10 March 2017
Corinthia Hotel, Budapest,
Erzsébet krt. 43-49,
1073 Hungary

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Keyword: LNG, PCI-e, ODP, Narayana Prasad Athreya
http://www.linaro.org
http://connect.linaro.org
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PCI-e EndPoint mode of operation in OpenDataPlane (ODP) - BUD17-107

  1. 1. PCI-e EndPoint support in OpenDataPlane(ODP) Narayana Prasad Athreya Linaro Connect BUD17
  2. 2. Background • What is PCI-e EndPoint? • Target mode in PCI-express. • Common devices - NIC, Graphic Cards, Security Coprocessors • The PCI-e channel can be used for control or data plane. • What is OpenDataPlane? • Networking data plane API specification • Allows portable data plane applications to leverage vendor specific hardware.
  3. 3. Conventional ODP Usage • Runs on standalone data plane processor • ODP application is Bus Master and owns the hardware • ODP application’s control plane interface is not guided by ODP Specification.
  4. 4. ODP on a target device • ODP runs on a co- processor • ODP application is a PCI-e slave. • ODP application’s control plane interface overlaps with data plane
  5. 5. Content on the PCI-e bus • Networks Packet with L2,L3,etc headers Two types of data exchange are possible: • Custom message - typically as a request/response
  6. 6. PCI-e EP as NIC • Logical fit to ODP • Register PCI-e EP as a packet-io • ODP API allow seamless send/recv of packets
  7. 7. PCI-e EP as a Coprocessor • Host projected as a coprocessor to ODP • Register PCI-e EP as a packet-io with an event queue. • ODP API allow coprocessor interface using events
  8. 8. OCTEON as a PCI-e EP running NIC application
  9. 9. Status • Packet and Message exchanges • Work in progress to adopt NIC firmware application to use ODP interface use PCI-e as a packet interface as well as a control plane coprocessor. • Roadmap • Run performance benchmarks with NIC firmware running over ODP and compare against non-ODP NIC firmware implementations.
  10. 10. Narayana Prasad Athreya Prasad.Athreya@Cavium.com Q & A

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