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5 ca-memory structuret

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5 ca-memory structuret

  1. 1. | | (CA: Computer Architecture)Memory Management Structure
  2. 2. Learning Objectives | (OS: Operating Systems) | (Memory Management) | 2
  3. 3. Agenda (Background) (Swapping) (Contiguous Allocation) (Paging) (Segmentation) (Segmentation with Paging) | (OS: Operating Systems) | (Memory Management) | 3
  4. 4. Background (instruction-execution cycle)  (fetch)  decode 1  execution 2  (store) | (OS: Operating Systems) | (Memory Management) | 4
  5. 5. Background (2) (machine code) Input queue  | (OS: Operating Systems) | (Memory Management) | 5
  6. 6. Background (3) 6.1| (OS: Operating Systems) | (Memory Management) | 6
  7. 7. Background (3) (run)  Compile time  (absolute address)  Load time  (relocatable)  Execution time   (run time) (e.g., base and limit registers) | (OS: Operating Systems) | (Memory Management) | 7
  8. 8. 6.2| (OS: Operating Systems) | (Memory Management) | 8
  9. 9. Logical vs. Physical Address Space  Logical address  (virtual address)  Physical address  (memory-address register) (logical address space) (physical address space) | (OS: Operating Systems) | (Memory Management) | 9
  10. 10. Memory-Management Unit (MMU) Logical Address Physical Address Relocation MMU (relocate register) logical addresses MMU real physical | (OS: Operating Systems) | (Memory Management) | 10
  11. 11. Dynamic relocation using a relocation register| (OS: Operating Systems) | (Memory Management) | 11
  12. 12. Dynamic Loading dynamic loading) relative memory (routine) (library routine) | (OS: Operating Systems) | (Memory Management) | 12
  13. 13. Dynamic Linking OS (static linking) execution time (stub) stub routine library (shared libraries) | (OS: Operating Systems) | (Memory Management) | 13
  14. 14.  Static Linked Library (Link  EXE Dynamic Linked Library (Link  EXE DLL  DLL DOS Static linked | (OS: Operating Systems) | (Memory Management) | 14
  15. 15.   Overlay  Swapping  Single Partition Allocation  Multiple Partition Allocation | (OS: Operating Systems) | (Memory Management) | 15
  16. 16. Overlay (overlay) | (OS: Operating Systems) | (Memory Management) | 16
  17. 17. Overlay Compiler Assemble (Overlay) | (OS: Operating Systems) | (Memory Management) | 17
  18. 18. | (OS: Operating Systems) | (Memory Management) | 18
  19. 19. Swapping (swap) (virtual Memory) Backing store  - direct access Roll out, roll in  (priority base)  | (OS: Operating Systems) | (Memory Management) | 19
  20. 20. Schematic View of Swapping6.5 | (OS: Operating Systems) | (Memory Management) | 20
  21. 21. (Single Partition Allocation) 2  System  User Batch system) DOS USER OS | (OS: Operating Systems) | (Memory Management) | 21
  22. 22.  User Area) System Process1 Error OS | (OS: Operating Systems) | (Memory Management) | 22
  23. 23. Contiguous Allocation  Resident OS), interrupt vector  OS (transient) | (OS: Operating Systems) | (Memory Management) | 23
  24. 24. Contiguous Allocation  Resident OS), interrupt vector  OS (transient) (fixed-size partition) Single-partition allocation  Relocation-register scheme OS  base register Offset  limit register | (OS: Operating Systems) | (Memory Management) | 24
  25. 25. Base register limit register| (OS: Operating Systems) | (Memory Management) | 25
  26. 26. | (OS: Operating Systems) | (Memory Management) | 26
  27. 27. (Multiple Partition Allocation) Single Partition 2  Fixed Sized Partition Partition  Dynamic Allocation Partition | (OS: Operating Systems) | (Memory Management) | 27
  28. 28. Fix Sized Partition 500B 1000B 2 Partition 2100B 3 Partition ?| (OS: Operating Systems) | (Memory Management) | 28
  29. 29. Fix Sized Partition 1200B 1200B 2580B 2580B ?| (OS: Operating Systems) | (Memory Management) | 29
  30. 30. Contiguous Allocation (cont.) Multiple-partition allocation  Hole –   OS a) allocated partitions b) free partitions hole) OS OS OS OS process 5 process 5 process 5 process 5 process 9 process 9 process 8 process 10 process 2 process 2 process 2 process 2 | (OS: Operating Systems) | (Memory Management) | 30
  31. 31. Fragmentation Multiple Partition 2  Internal Fragmentation Fixed Sized)  External Fragmentation Dynamic) Fix Sized Dynamic P1 P2 Internal Fragment External Fragment | (OS: Operating Systems) | (Memory Management) | 31
  32. 32. Fragmentation External Fragmentation  Internal Fragmentation  compaction   | (OS: Operating Systems) | (Memory Management) | 32
  33. 33. Compaction Dynamic Allocation External Fragmentation External Fragmentation Copy | (OS: Operating Systems) | (Memory Management) | 33
  34. 34. Dynamic Storage-Allocation Problem n First-fit: (first hole) Best-fit: smallest hole ( ) Worst-fit: largest hole ( ) First-Fit Best-Fit Worst-Fit | (OS: Operating Systems) | (Memory Management) | 34
  35. 35. First Fit 20K Scan First Fragment | (OS: Operating Systems) | (Memory Management) | 35
  36. 36. Best-Fit Scan 20K 28K Best Fragment 23K Compact | (OS: Operating Systems) | (Memory Management) | 36
  37. 37. Worst-fit 20K Scan 10K Worst 28K Fragment 5K | (OS: Operating Systems) | (Memory Management) | 37
  38. 38. Paging (paging) (physical memory) (frame) (logical memory) (page) | (OS: Operating Systems) | (Memory Management) | 38
  39. 39. Paging   n page n  page table physical addresses  Internal fragmentation 0 1 0 2 Frames 3 1Pages Process Page Memory | (OS: Operating Systems) | (Memory Management) | 39
  40. 40. Address Translation Scheme (page number (p)) (page offset (d))  Page number (p) – (page table) (base address)  Page offset (d) – physical memory address | (OS: Operating Systems) | (Memory Management) | 40
  41. 41. Address Translation Architecture| (OS: Operating Systems) | (Memory Management) | 41
  42. 42. Paging Example| (OS: Operating Systems) | (Memory Management) | 42
  43. 43. Paging Example 32 4| (OS: Operating Systems) | (Memory Management) | 43
  44. 44. Free Frames Before allocation After allocation| (OS: Operating Systems) | (Memory Management) | 44
  45. 45. Address (Physical Address) p : d (Page : offset) Page = Page, offset = Page page 0 1 Page 1 1 : 30 Page 30 2 --> | (OS: Operating Systems) | (Memory Management) | 45
  46. 46. Page Table Page Frame Page No. Frame No. 0 0 4 Page2 1 1 5 2 2 1 Page0 4 Page1 5 | (OS: Operating Systems) | (Memory Management) | 46
  47. 47.  MMU Physical Address CPU Frame No. offset Frame No. Add. Frame Real Addr. CPU p d f d Memory page frame 0 4 1 5 2 1 | (OS: Operating Systems) | (Memory Management) | 47
  48. 48. (Shared Pages)  (Pages)  (Function)  Page code1 code1code1 code2 code2code2 Memory data1data1 data2 data2 P1 P2 2 | (OS: Operating Systems) | (Memory Management) | 48
  49. 49. (Segmentation) Segment Segment main program segment section (Load on demand) | (OS: Operating Systems) | (Memory Management) | 49
  50. 50. (Segmentation) Segment Segment main program, procedure, function, method, object, local variables, global variables, common block, stack, symbol table, arrays | (OS: Operating Systems) | (Memory Management) | 50
  51. 51. User’s View of a Program main program segment section (Load on demand)| (OS: Operating Systems) | (Memory Management) | 51
  52. 52. Logical View of Segmentation 1 4 1 2 3 2 4 3 user space physical memory space | (OS: Operating Systems) | (Memory Management) | 52
  53. 53. Segmentation Architecture <segment-number, offset>, Segment table –  base –  limit – segment. Segment-table base register (STBR) Segment-table length register (STLR) segment number s is legal if s < STLR. | (OS: Operating Systems) | (Memory Management) | 53
  54. 54. Segmentation Architecture (Cont.) Relocation  dynamic  by segment table Sharing  shared segments  same segment number Allocation  first fit/best fit  external fragmentation | (OS: Operating Systems) | (Memory Management) | 54
  55. 55. Segmentation Architecture (Cont.) 2 (s), (2) (d) d 0 d d d (base-limit) | (OS: Operating Systems) | (Memory Management) | 55
  56. 56. Segmentation Hardware| (OS: Operating Systems) | (Memory Management) | 56
  57. 57. Implementation of Page Table Page table Page-table base register (PTBR) page table Page-table length register (PRLR) page table page table associative memory translation look-aside buffers (TLBs) | (OS: Operating Systems) | (Memory Management) | 57
  58. 58. Associative Memory Page # Frame # Address translation (A´, A´´)  A´ frame#  frame # page table | (OS: Operating Systems) | (Memory Management) | 58
  59. 59. Paging Hardware With TLB| (OS: Operating Systems) | (Memory Management) | 59
  60. 60. Effective Access Time Associative Lookup = time unit Assume memory cycle time is 1 microsecond Hit ratio – percentage of times that a page number is found in the associative registers; ration related to number of associative registers Hit ratio = Effective Access Time (EAT) EAT = (1 + ) + (2 + )(1 – ) =2+ – | (OS: Operating Systems) | (Memory Management) | 60
  61. 61. Memory Protection associating protection bit Valid-invalid bit page table  “valid”  “invalid” | (OS: Operating Systems) | (Memory Management) | 61
  62. 62. Valid (v) or Invalid (i) Bit In A Page Table| (OS: Operating Systems) | (Memory Management) | 62
  63. 63. Page Table Structure Hierarchical Paging Hashed Page Tables Inverted Page Tables | (OS: Operating Systems) | (Memory Management) | 63
  64. 64. Hierarchical Page Tables multiple page tables two-level page table | (OS: Operating Systems) | (Memory Management) | 64
  65. 65. Two-Level Paging Example 4K page size )  a page number 20 bits  a page offset 12 bits page table page number  a 10-bit page number  a 10-bit page offset page number page offset pi p2 d 10 10 12 pi page table , p2 page table | (OS: Operating Systems) | (Memory Management) | 65
  66. 66. Two-Level Page-Table Scheme| (OS: Operating Systems) | (Memory Management) | 66
  67. 67. Address-Translation Scheme two- level 32-bit | (OS: Operating Systems) | (Memory Management) | 67
  68. 68. Hashed Page Tables bits page table page table | (OS: Operating Systems) | (Memory Management) | 68
  69. 69. Hashed Page Table| (OS: Operating Systems) | (Memory Management) | 69
  70. 70. Inverted Page Table page table| (OS: Operating Systems) | (Memory Management) | 70
  71. 71. Inverted Page Table Architecture| (OS: Operating Systems) | (Memory Management) | 71
  72. 72. Shared Pages Shared code  One copy of read-only (reentrant) code shared among processes (i.e., text editors, compilers, window systems).  Shared code must appear in same location in the logical address space of all processes Private code and data  Each process keeps a separate copy of the code and data  The pages for the private code and data can appear anywhere in the logical address space | (OS: Operating Systems) | (Memory Management) | 72
  73. 73. Shared Pages Example| (OS: Operating Systems) | (Memory Management) | 73
  74. 74. Segmentation Memory-management scheme that supports user view of memory A program is a collection of segments. A segment is a logical unit such as: main program, procedure, function, method, object, local variables, global variables, common block, stack, symbol table, arrays | (OS: Operating Systems) | (Memory Management) | 74
  75. 75. User’s View of a Program| (OS: Operating Systems) | (Memory Management) | 75
  76. 76. Logical View of Segmentation 1 4 1 2 3 2 4 3 user space physical memory space | (OS: Operating Systems) | (Memory Management) | 76
  77. 77. Example of Segmentation| (OS: Operating Systems) | (Memory Management) | 77
  78. 78. Sharing of Segments| (OS: Operating Systems) | (Memory Management) | 78
  79. 79. Segmentation with Paging – MULTICS The MULTICS system solved problems of external fragmentation and lengthy search times by paging the segments Solution differs from pure segmentation in that the segment-table entry contains not the base address of the segment, but rather the base address of a page table for this segment | (OS: Operating Systems) | (Memory Management) | 79
  80. 80. MULTICS Address Translation Scheme| (OS: Operating Systems) | (Memory Management) | 80
  81. 81. Segmentation with Paging – Intel 386 As shown in the following diagram, the Intel 386 uses segmentation with paging for memory management with a two-level paging scheme | (OS: Operating Systems) | (Memory Management) | 81
  82. 82. Intel 30386 Address Translation| (OS: Operating Systems) | (Memory Management) | 82
  83. 83. Linux on Intel 80x86 Uses minimal segmentation to keep memory management implementation more portable Uses 6 segments:  Kernel code  Kernel data  User code (shared by all user processes, using logical addresses)  User data (likewise shared) Task-state (per-process hardware context)   LDT Uses 2 protection levels:  Kernel mode  User mode | (OS: Operating Systems) | (Memory Management) | 83
  84. 84. End of Chapter 8
  85. 85. | (OS: Operating Systems) | (Memory Management) | 85

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