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Pll

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about phase locked loops

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Pll

  1. 1. What does Industry say?●ST Microelectronics has vacancies for“PLL Designers”.●Texas Instruments (TI) want to recruit“PLL designers”.●A lot more Opportunities……..●Why it is so challenging?
  2. 2. What is it? PLL = Phase Lock Loop1. A circuit which synchronizes anadjustable oscillator with anotheroscillator by the comparison of phasebetween the two signals.2. An electronic circuit that synchronizesitself to an external reference signal.
  3. 3. What is it for?●To generate High Frequency Clock inMicroprocessor.●In Mobile Communication to generateCarrier Frequency.●Can you think of any other Application?Actually there are many.
  4. 4. 1.Voltage ControlledOscillator (VCO)●What it does?●Requirements:●High Frequency Operation●Good Programmability Range●Less sensitive to environment●Basic Model: Fout = K * Vin●Different Oscillators in literature. How to Select?●A simple Example: Ring Oscillator●Common Challenges:●Programmability Range ( Giga-Hertz Order)●Maximum Noise limit
  5. 5. Basic Block Diagram
  6. 6. PLL in Simulink
  7. 7. 3. Phase-FrequencyDetector (PFD)●What it does?●Requirement:●High Sensitivity●Moderate FrequencyOperation●Challenges:●Linearity of PFD●Gain of PFD
  8. 8. Food for Thought●What will be the resolution in terms offrequency of PLL? How will you increase it?●What changes you need to do to achieveabove goal?●What will be specifications of PLL?●What is the performance metric of VCO?●For Microprocessor?●For Transmitter/Receiver IC?
  9. 9. 4. Loop Filter●Functionality●Low pass filter●Filters out noise ofPLL loop

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