CISC vs RISC Processor Architecture

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A Presentation made to CMPE294 class to compare two most debated architecture in processor history.

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CISC vs RISC Processor Architecture

  1. 1. CISC vs RISC by : Kaushik Patra (kpatra@gmail.com) a beginner’s reference
  2. 2. Agenda A quick introduction Instruction Set Architecture (ISA) ISA classification CISC philosophy RISC philosophy Conclusion
  3. 3. Introduction
  4. 4. ISA Instruction Set Architecture. An agreement between hardware and human for making interaction. Example : ADD R1, R2, R3 Can be represented as : 00101111100001111001010101010101 10111010100011110101001011011010
  5. 5. ISA Classification Two major schools of ISA CISC Complex Instruction Set Computer RISC Reduced Instruction Set Computer
  6. 6. CISC Philosophy Reduce amount of storage used and accessed - reduce load/store. Give support for compatibility. Make compiler’s job easier. Support complex assembly level programming.
  7. 7. RISC Philosophy Execute one instruction per clock. Keep all instructions of same size. Allow only load / store instruction to access the memory. Give support for high level languages (like C, C++, Java).
  8. 8. Conclusion CISC -> RISC : A paradigm shift Assembly -> C / C++ / JAVA Much more design simplicity with RISC. Ensures better pipelining. Memory is cheaper nowadays So, go for RISC style design.

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