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MEMS Extraction & Verification


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MEMS Extraction & Verification

  1. 1. MEMS Extraction & verification
  2. 2. What is extraction? Simplifying a full 3D model into behavioral model Convert FEA/BEA model (large DOFs) into computationally efficient model Develop pre-computed energy based model that captures multiphysics What is extracted ? Mechanical Strain Energy of Modes of Interest (Including stress and stress gradient effects) Capacitive energy Thermal effects (deformation due to temperature change) Fluidic Structure Interaction (due to compressive or non-compressive media) Other dissipation sources (thermoelastic damping (v8.6.1) and anchor acoustic losses (v8.6.2))
  3. 3. System Model Extraction (SME) Capture strain energy Capture electrostatic energy Capture fluid damping associated with each mode associated with each mode characteristics Arnoldi/Krylov First mode sub-space Compact reduction Representation HDL HDL formulation Second mode Hardware N-DOF behavioral model Description based on Lagrangian formulation d # "L & "L % () =0 dt % "q j ( "q j $ ' Third mode ! ❶ Capture total energy of relevant mode ❷ Krylov/Arnoldi methods to ❸ Create Compact model for (Mechanical, Electrostatic, Dissipation) generate Lagrangian formulation system modeling
  4. 4. System model extraction (SME) flow chart / SPICE OR OTHER EDA TOOL Summary: Convert problem from Newtonian (inertia based) to more efficient Lagrangian domain (energy based)
  5. 5. SME advantages • Automated full • 3D MEMS system multi-physics simulation capture • Device and package • 1000 X faster than level extraction pure FEA • Automated VHDL/ • Matches FEA to Verilog/ SPICE within 1% accuracy generation • Fully capture harmonic responses
  6. 6. EDA Linker capabilities (compatibility) Create accurate N-DOF dynamic system model from MEMS FEA/BEA model Output system model into SPICE, HDL, and Simulink formats Compatible with EDA tools from Cadence, Mathworks, Mentor, Synopsys and Tanner Integrated CMOS-MEMS (SoC/SiP) compatibility
  7. 7. Integrated design flow for MEMS + IC Device/System Design Exploration 1 Design of Experiments (SYNPLE/IntelliSuite) Final MEMS Device design 2 (Multiphysics) MEMS-CMOS integration N-DOF Lagrangian design flow can be based on : 3 System Model Extraction (IntelliSuite) √ VHDL-AMS √ Verilog-A Transistor level design √ SPICE netlist 4 (SPICE/SYNPLE or other EDA tools) √ Matlab/Simulink .MEX Gate level 5 Place and route, DRC, LVS (Cadence/Synopsys/Mentor/ViewLogic/Tanner etc) 6 Final Layout (IntelliMask Pro/ L-Edit/ Virtuoso/other)
  8. 8. What is verification? Model verification (Schematic vs 3D) Verify schematic model and 3D model match Ensure MEMS model used in circuit development is accurate Physical verification (‘Tape Out’) Verify physical layout is consistent with Design Rules Ensure design meets manufacturability criteria
  9. 9. Static model verification 0.200 Extracted 3D -0.200 -0.600 -1.000 -1.400 -1.800 0 2 4 6 8 10 12 Pull-in: Schematic results vs Full 3D results
  10. 10. Damping model verification Perforated condenser membrane Full 3D (TEM) vs Macromodel comparison Full capture of fluidic damping and spring force
  11. 11. Dynamic model verification Transient response of device: Schematic vs FEA (3D)
  12. 12. Easy error navigation all angle support intuitive error markings Tape Out Physical verification