Silicon Photonics for HPC Interconnects


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In this slidecast, Brian Welch from Luxtera presents: Silicon Photonics for HPC Interconnects. Luxtera is the first company to overcome the complex technical obstacles involved with integrating high performance optics directly with silicon electronics on a mainstream CMOS chip, bringing direct “fiber to the chip” connectivity to market.

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Silicon Photonics for HPC Interconnects

  1. 1. Silicon Photonics for HPC Interconnects Brian Welch Luxtera
  2. 2. Silicon Photonics • Silicon Photonics Technology: − Silicon material system and silicon processing techniques to manufacture integrated optical devices − Passive photonic functions + optical modulation + optical detection (+ electronic circuits) − Development started in earnest in early 2000s when sub 0.5 micron lithography became available • Goal of Silicon Photonics: − Leverage as much as possible from the integrating electronic industry: o Design infrastructure and methodologies o Wafer manufacturing and methodologies o Packaging & Test infrastructure and methodologies − Enable very high levels of integration: o Increased functionality and density o Simplification of optical and electrical packaging & test • Silicon Photonics Applications: − Most silicon photonics applications are in the area of high-speed communications − Also significant efforts emerge in the area of biochemical sensing and sensor applications in general • Luxtera: − Produces Silicon Photonics based optical transceivers and chipsets since 2009, those are used in high performance computing applications and advanced datacenters. − Developing chipsets and IP for high performance optical transceiver functions (Nx26 G and beyond) 2
  3. 3. Silicon Photonics Example: 4x28 Gbps Chipset RX1 RX2 Digital Core RX3 RX optical Inputs RX4 TX1 TX2 Laser input TX optical Outputs TX3 TX4 3
  4. 4. HPC Interconnect Needs HPC Performance Projection HPC Interconnect Projection 100,000.00 Bi-Directional Interconnect Throughput (Pbps) 1,000,000.00 100,000 System Performance (Pflops) 1,000,000 10,000 1,000 100 10 1 10,000.00 1,000.00 100.00 10.00 1.00 2010 2015 2020 2025 2030 2010 2015 2020 2025 2030 4
  5. 5. HPC Interconnect Needs • HPC performance projected to increase by 10x every 34 years − Increasing from about 30 Pflops today to over 1 Exaflop by the end of the decade. • HPC interconnect performance needs to meet this trend − Increasing from about 190 Pbps today to over 5 Ebps by the end of the decade • This exponential increases in performance cannot have commensurate increases in power or cost. − Contemporary systems already approaching the practical limits of power 5
  6. 6. High Speed Optical Interconnect Evolution II CONTEMPORARY – Today • Traditional MSA compliant pluggable modules and AOCs on card edge • Considerable SI issues (electrical connectors, long traces on host PCBA) require re-timers. • Front panel interconnect density limited by module size (physical implementation + module power dissipation) Switch ASIC Re-timer Optical Module PCBA Power dissipation per bidirectional XCVR (Host + Module): 15 – 20 mW/Gbps EMERGING – 2014/15 • Embedded optical transceivers located closer around ASIC • Shorter traces on PCB alleviate SI issues • Optical fibers bring IOs to optical connectors on front panel • Front panel interconnect density limited by size optical connectors • Very high reliability required Switch ASIC Embedded optical module Fiber PCBA Power dissipation per bidirectional XCVR (Host + Module): 5 – 15 mW/Gbps STRATEGIC DIRECTION – 2015+ • Optical transceivers co-packaged w/ ASIC • Minimized electrical interconnect eliminates SI issues • Optical fibers bring IOs to optical connectors on front panel • Lowest system power dissipation • Highest front panel density and smallest potential system form factor • Very high reliability required Switch ASIC w/ photonics Fiber PCBA Power dissipation bidirectional XCVR: 0.5 – 2.5 mW/Gbps 6
  7. 7. HPC ‘like’ Datacenters… (QTS, Suwanee GA) Systems getting more homogenous, utilizing HPC type silicon photonics interconnects 7
  8. 8. Silicon Photonics Opportunity • Speed: Silicon photonics BW practical limitations set by CMOS node. − Optical component BW very high compared to electrical components − Allows HPC interconnects to increase with speed as CMOS improves • Integration: Integration of silicon photonics ‘Optical I/O’s in place of electrical I/O’s. − Allows for significant power and cost reductions through simplification of system. − Allows for much higher density than can be realized using discrete optical interconnects • Advanced functions: Higher order encoding and improved link monitoring − Real time optical diagnostics and data gathering − Interconnect speeds beyond electronics baud rate 8
  9. 9. Future Scaling – 100 Gbps Optical Interconnect 100 Gbps Optical Link using Silicon Photonics PAM4 Enconding 9
  10. 10. Silicon Photonics Community is Growing • Other Silicon Photonics providers looking to enter commercial markets: − Intel: OCP Initiatives − IBM: Currently in research, product initiative TBD − Cisco: 100G-LR4 Module for 10km interconnects − Mellanox: Infiniband interconnects expected 10