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  1. 1. Aminu Tukur, I. G. Saidu, M. Momoh, Zainab U., A. S. Mindaudu, M. I. Ilyasu, M.A. Yusuf /International Journal of Engineering Research and Applications (IJERA) ISSN: 2248-9622www.ijera.comVol. 3, Issue 3, May-Jun 2013, pp.301-306301 | P a g eDesign and Implementation of a Microcontroller Based PWMSinewave Inverter for PV Applications*Aminu Tukur * **I. G. Saidu, *M. Momoh, ***Zainab U **A. SMindaudu, ***M.I Ilyasuand ***M.A. Yusuf*Physics Department, Usmanu Danfodiyo University, Sokoto**Sokoto Energy Research Centre,***Physics/Electrical Department, Sokoto State Polytechnic,ABSTRACTA major factor worthy of considerationin the overall performance of any PV system ishow the installed system can exploit the sun’senergy most effectively by ensuring that arrayshave full access to most of the solar resource.This research was therefore concerned with themodification of inverters to enhance the periodfor which energy is extracted from a PV systemand to extend the range of voltages from PV thatcould operate inverters. To achieve this, theoutput of a 12V PV system was boosted to 24Vthen regulated back to 12V before inversion. AMicrocontroller-based Pulse Width Modulated(PWM) Power Inverter for PV systems, suitablefor use at homes as alternative power source forAC loads was designed, simulated andconstructed. The most important feature of thissystem is that it is suitable for PV systems andhighly effective in driving variable loads. Otherfeatures include provision for sensing the loadvoltage to adjust the pulse width to meet the loaddemand at every instance. It also provides theuser with shutdown option in case of the systembeing idle (on no-load), the system can be put tostandby mode instead of switching off the entiredevice. When on standby mode it consumes verysmall current of few milliamperes. The systemwas built around ATMELTMversion of 8051microcontroller AT89C2051.When tested thesystem was found to provide a constantsinusoidal voltage of 240V even with a varyingvoltages at the input.INTRODUCTIONInverters have input voltage windowbeyond which they could fail (Albert, 1999). Forstand-alone PV systems the input power is derivedfrom PV modules that are exposed to solar radiation.Most inverters convert the incoming DC into AC,and then use a transformer to step up the output ACsignal to mains voltage level. In doing this, onemajor consideration is that of how can an inverterperform this operation efficiently in order to avoidwastage of the voltage from battery, solar panel orother DC sources.The amount of current produced by a solarpanel is a function of the solar radiation falling on it.Solar radiation however fluctuates from zero in thenight then gradually increases in the morning whilepeaking at midday and finally gradually decreases tozero as darkness sets in (Rodríguez, 2000). PVmodule voltages are also affected by temperature.As the temperature decreases PV modules voltageactually increases (voltage and temperature of a PVhave an inverse relationship) (Rodríguez, 2000). Ifthe voltage from the array ever drops below theminimum power point tracking voltage – usuallydue to high heat conditions that occur on sunset daysor as a result of PV position, the inverter won’t beable to continue operating and will shut down. Thismeans that the inverter could shut down due to lowvoltage on bright sunny day (Rodríguez, 2000). PVmodules can perform for many years, but are notperfect as in the course of years the modules outputpower (a function of voltage and current) willdegrade (Nabaeet.Al., 1981). This means with timethe PV will not be able to keep up with the invertersrequest. On another hand, most PV modulesdesigned to provide an output of 12V really actuallydo so (Rodríguez.,2000). The implication of this isthat an inverter with a transformer designed to stepup the 12V to 240V (transformation ratio of 20)would produce erratic output due to fluctuations inthe input voltage.The aim of this research is to design aninverter that operates even at low solar radiationsand PV environmental conditions. This, it is hopedwould extend the hour of power extraction per dayand the window of voltage input useful to theinverter.Circuit Design of the Various ModulesIn the design presentation that follows, amodular format is adopted as each design procedureof the blocks is presented one after the other. Thepresentation starts with the choice of Voltageregulator to yield the required input voltage. Thesecond stage was the DC-DC converter to give thecalculated voltage regulation. The third stage wasthe design of the inverter stage followed by theoutput transformer and the filter stage. The design ofthe PWM and Schmitt trigger control were thenpresented.Voltage Regulator StageTo achieve a constant voltage output despitevariations in the input voltage or load a voltage
  2. 2. Aminu Tukur, I. G. Saidu, M. Momoh, Zainab U., A. S. Mindaudu, M. I. Ilyasu, M.A. Yusuf /International Journal of Engineering Research and Applications (IJERA) ISSN: 2248-9622www.ijera.comVol. 3, Issue 3, May-Jun 2013, pp.301-306302 | P a g eregulator was employed. The regulator ensures thatthe output voltage is independent of increase in thesupply voltage or in the current drawn from thesupply resulting in a constant voltage. The voltageregulation was based on LM7812. This regulator isexpected to provide a steady 12V for inversion.Design of the InverterThe inverter was designed based on the block diagram of Fig. 1Fig. 1 Block Diagram of the InverterDesign of FET DriversThe FET bank are array of FETs connected together to achieve high power for the inverter. In operation theFETs in the array needs to be driven by a circuit that acts as a switch. This is done using transistor circuitconnected to operate at the cut-off and saturation points. For this purpose, a TIP41A NPN transistor was usedfor switching the FET bank due to its being readily available locally and cheap.The figure (Fig. 2) depicts the circuit configuration of the FETs driver unitFig. 2FET Driver UnitTwo NPN transistors TIP41A were wired asswitches. The two transistors conduct alternately;in other words, when one is ON, the other is OFF.Resistors R1 and R2 were used to provide safeoperating current to the two transistors while R4and R5 are load resistors. From manufacturer’sdatasheet, specifications for TIP41 transistorinclude:Absolute maximum ratings:Emitter-base voltage VEBO = 5V;Base current IB = 600mATherefore, the value of the base resistance for eachof the two resistors is obtained as follows:RB =𝑉 𝐸𝐵𝑂𝐼 𝐵=5600×10−6 = 3kΩTo ensure that the operating current is always safefor the transistor, 4.7kΩ was used in the circuit.FET Bank DesignThe FETs bank is an array of MOSFETs,connected such that it drives the load comfortably.The FET bank is one of the factors that determinethe power of the inverter. They are either connectedin half bridge or full bridge format. A half bridgerequires a minimum of two pairs of FETs thatconducts alternately, while full bridge requires fournumbers of FETS that conducts with two diodes ateach state. The FET bank design was based on thehalf bridge configuration with three FETs on eachhalf bridge to take care of the power requirement.This type has the advantage of requiring lessernumber of FETs. The circuit of the half switchingmode is as shown in Fig 3. The main advantage theFET has over BJT is that when switched ON it hasalmost zero resistance and when switched OFF ithas infinite resistance (Theraja and Theraja, 2005).This feature of the FET leads to higher efficiency.OSCILLATORDC INPUT FET DRIVERS FET BANKSTEP-UPTRANSFORMERAC OUTPUT700VA, 220V,50Hz
  3. 3. Aminu Tukur, I. G. Saidu, M. Momoh, Zainab U., A. S. Mindaudu, M. I. Ilyasu, M.A. Yusuf /International Journal of Engineering Research and Applications (IJERA) ISSN: 2248-9622www.ijera.comVol. 3, Issue 3, May-Jun 2013, pp.301-306303 | P a g eFig. 3 FETs Bank CircuitAs shown in the figure above, each threeMOSFETs are connected in parallel. The MOSFETused in this design is the IRF3205 and as each ofthe MOSFETs can drive 180-Watts load or draincurrent of up to 80 Amperes, . Hence, themaximum power that the circuit can deliver is180×4 = 720W. Also, the maximum current drainby each MOSFET ID(max) = 40A, therefore aprotection fuse was added against overload. Sincethe gates have very high input impedance, a 100Ωresistor was connected in series with each gate toensure safe operating voltage at the input. NANDSchmitt Trigger DesignThe NAND Schmitt trigger is a circuit that is usedfor pulse shaping. Essentially, it is similar to abistable multivibrator with very short transitiontime. The CD4093 was used in this design.Fig. 4is the circuit configuration for this application.Fig. 4 CD4093 CircuitAs seen from the circuit diagram, three of the fourNAND gates were used as explained below.This section represents the microcontroller basedsinusoidal PWM generator for the inverter for thephotovoltaic application. The advantage of thisinverter is the use of a low cost microcontroller thathas built in PWM modules. Microcontroller 8052 isable to store the required commands to generate thenecessary PWM waveforms.Sinusoidal pulse widthmodulation (SPWM) is widely used in powerelectronics to digitize the power so that a sequenceof voltage pulses can be generated by the on andoff of the power switches. The pulse widthmodulation inverter has been the main choice inpower electronic for decades, because of its circuitsimplicity and rugged control scheme. SPWMswitching technique is commonly used in industrialapplications or solar electric vehicle applications.SPWM techniques are characterized by constantamplitude pulses with different duty cycle for eachperiod. The width of this pulses are modulated toobtain inverter output voltage control and to reduceits harmonic content.The algorithm for the software development isillustrated bellow. It briefly describes the softwareoperations for the microcontroller in generating thePWM signal. Initialize the user defined memory cells; Iinitialize the ports to be used as output.
  4. 4. Aminu Tukur, I. G. Saidu, M. Momoh, Zainab U., A. S. Mindaudu, M. I. Ilyasu, M.A. Yusuf /International Journal of Engineering Research and Applications (IJERA) ISSN: 2248-9622www.ijera.comVol. 3, Issue 3, May-Jun 2013, pp.301-306304 | P a g e Initialize the modules used for thegeneration of PWM. Initialize all the desired interrupts Store the sampling value of sine wave inthe look up table. Store the sampling value in the PDCregister. The PTMR register generates theTriangular wave. The signal is made PWM signal withdead time. The microcontroller checks whether thegeneration is completed or not, If it is completed , it takes anothersampling from the sine wave table. Otherwise it waits for the completion.PWM Design ProcedureThe microcontroller is configured to generate thePWM signals that is used to regulate the pulses ofthe half bridge circuit.PWM or Pulse width Modulation is used to keepthe output voltage of the inverter at the ratedvoltage irrespective of the output load. In aconventional inverter the output voltage changesaccording to the changes in the load. To nullifyeffect caused by the changing loads, the PWMinverter correct the output voltage according to thevalue of the load connected at the output.The signal will include the fundamental componentand harmonics.We determined the location of the harmonics byusing the relationshipmR fkMf  (Lasseter, 1994)Where, k is an integer (1, 2, 3 …).The calculated values of the harmonics aretabulated in Table 1.Table 1The Location of the fundamental and higherorderharmonicsFilter Design:The output signal normally contains thefundamental sinusoidal frequency and signals ofhigher harmonics. The higher frequency signal canbe filtered out using appropriate filter circuit.According to the table above the first harmonic thatwill exist is at frequency 20 kHz. This value ismore than two decade higher than the fundamentalfrequency which is at 50 Hz. A simple LC filterwill adequately filter out the harmonics.The filter was designed based on the cut-offfrequency, fc determined based on the location ofthe first harmonic. As calculated in section d)above, the first harmonic is at 20 kHz. Therefore,the cut-off frequency 400Hz is chosen in order todesign this filter. By choosing the capacitor, Cequal to 1mF the inductor, L can be calculatedfrom224001502111HzmFHzCfLLCfccH8944.19We chose a 25μH inductor.The eventual circuit diagram was constructed andsubjected to voltage and power tests to see if itmeets design specificationsTESTSThe project was finally subjected to tests byfeeding a variable voltage at the input of theinverter while monitoring the output of the voltageregulator and that of the inverter as shown in plate1kthf(Hz)Fundamental 0 501 200002 400003 600004 80000
  5. 5. Aminu Tukur, I. G. Saidu, M. Momoh, Zainab U., A. S. Mindaudu, M. I. Ilyasu, M.A. Yusuf /International Journal of Engineering Research and Applications (IJERA) ISSN: 2248-9622www.ijera.comVol. 3, Issue 3, May-Jun 2013, pp.301-306305 | P a g ePlate 1Set-up Of The Final TestsThe setup of plate1 as represented block- diagrammatically in Fig 5 was used. The variable D.C Supply wasvaried from 7V to 14V in steps of 1V. The corresponding values at A, B and C were measured Using V1, V2and V3 respectively. The shape obtained after filteration was displayed using oscilloscope. .Fig. 5 Block diagram representationRESULTS AND DISCUSSIONSTable 2 shows the result of the voltage tests experiment of the inverter.The result is that of the input voltage tothe inverter, output of the booster, outputs of the regulator and the final stage.Table 2Result of the voltage tests experiment of the inverter.V1 (volts) V2 (volts) V3 (volts) V4 (volts)14 27.89 11.95 238.8613 25.86 11.87 238.8412 23.78 11. 84 238.8111 21.77 11.88 238.7110 19.78 11.84 238.739 17.77 11.86 238.658 15.76 11.86 238.557 13.75 11.86 238.44DISCUSSIONTable .2 indicates a fairly constant outputof approximately 12 volts from the voltageregulator. Even though the input voltage was variedfrom 14V to 27.89V (V2) the output voltageremained virtually regulated at approximately239V (V4). The implication of this is that theinverter will be able to operate even if the PVmodule is delivering voltage that varies widelyfrom the expected value either as a result ofvariation in the PV temperature (Rodrigueze, 2000)or ageing of the PV (Nabea, et. al., 1981).The output signal is sinusoidal with a frequency of50Hz and peak value of 349.5V and rms value of246.902V. The output of the inverter is thereforesuitable for a wide range of applications and forcountries like Nigeria with a mains requirement of240V and 50Hz.In a nutshell, this research has carried out thedesign and construction of an inverter that is
  6. 6. Aminu Tukur, I. G. Saidu, M. Momoh, Zainab U., A. S. Mindaudu, M. I. Ilyasu, M.A. Yusuf /International Journal of Engineering Research and Applications (IJERA) ISSN: 2248-9622www.ijera.comVol. 3, Issue 3, May-Jun 2013, pp.301-306306 | P a g esuitable for use as alternative power source forelectronic appliances. It was designed to addressthe problems faced by inverters that fail to workdue to low voltage from PV arrays.CONCLUSIONIn this paper, a PWM sinewave inverterhas been designed and constructed. The design issuited for the conversion of d.c power from PVpanels to a suitable a.c form.The designed boost converter was able to boost anoutput of 12V to a level of 24V and the relativelylarge transient present in its output was taken careof by using a resistive damper.The output from the output filter was sinusoidaland largely constant at 240V even with significantvariation in the input voltage which makes itsuitable for PV applications.It is also worthy of note that this design is notsuitable for high power applications. If high poweris demanded, then the voltage regulator should bereplaced with a more powerful ones such as thosebased on power transistors.References[1]. Albert, P. M.(1999);ElectronicsPrincipleSixth Edition. GlencoeMcGraw Hill,[2]. New york pp. 96 – 98.[3]. Lasseter, D. B. (1994) PowerElectronics and Control, PenguinPublishers, fifth edition pp.213-220.[4]. Nabae, A. Takahashi, I. and Akagi,H. (1981); A new neutral-pointclamped PWM inverter, IEEETrans. Industrial. Application, vol.IA-17, pp. 518–523.[5]. Rodríguez, J. (2000); A highperformance vector control of a11-level inverter, in Proc. 3rd Int.Power Electronics and MotionControl Conf., Beijing, China, pp.1116–1121.[6]. Theraja, A.K. and Theraja,B.L.(2002);A textbook of ElectricalTechnology. S. ChandandCompanyLtd.New Delhi, Indiapp. 220, 920, 924, 1712 – 1716.