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Modified space vector modulation (SVM) for
DClink voltage balancing of threelevel inverter is proposed
here. Effect of the DClink capacitor voltage deviation on
inverter switching states is presented for threelevel
inverter. Pulse pattern arrangements for proposed SVM
using degree of freedom available in choice of redundant
space vectors, sequencing of vectors, and splitting of duty
cycles of vector are best exploited. Sevensegment SVM
scheme and modified closed loop space vector DClink
voltage balancing control schemes are implemented. The
effectiveness of proposed scheme is verified by simulations
and experimental verification on laboratory prototype.
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