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This paper presents an Orthogonal Frequency Division Multiplexing (OFDM)
transceiver that makes use of a low power Fast Fourier Transform (FFT) along with a Least
Mean Square (LMS) filter. The folded FFT is developed via folding transformation and
register minimization techniques with real values as inputs which leads to reduction in
hardware complexity by exploiting the redundancy present in computing the FFT samples
and also the amount of power consumed. A LMS filter is also designed for the purpose of
noise removal. The OFDM transceiver with the folded FFT and LMS filter is analyzed in
terms of error performance to validate the advantages of less power consumption and
hardware utilization when compared to the traditional OFDM system with conventional
FFT. The individual components and the entire OFDM system that has been proposed are
modeled using Verilog HDL and functionally verified using Xilinx ISIM simulator.
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