Analysis of flicker noise degradation mechanism in ultra-thin oxide CMOS Student: H. C. Chang Advisor: Tahui Wang National...
Outline <ul><li>1.Introduction </li></ul><ul><li>2.Flicker Noise Unified Model </li></ul><ul><li>3. Stress-enhanced Flicke...
Motivation <ul><li>To develop an accurate, physics-based flicker noise model </li></ul><ul><li>Using the drain current fli...
In this thesis <ul><li>Introduction to Unified 1/f noise theory </li></ul><ul><li>Developing a two-region model based on t...
Flicker Noise Unified Model I-V model:
Flicker Noise Unified Model Drain current noise power: Input referred noise power:
Stress-enhanced Flicker Noise degradation <ul><li>NMOS </li></ul><ul><li>ONO Cell </li></ul><ul><li>Two-region model </li>...
NMOS:Max I b  Stress <ul><li>Max I b  stress generates interface states </li></ul><ul><li>Interface states enhance less 1/...
NMOS:Max I g  Stress <ul><li>Max I g  stress generates local oxide charges & traps </li></ul><ul><li>Either Local charges ...
NMOS:FN Stress <ul><li>FN stress generates uniform oxide charges & traps </li></ul><ul><li>Uniform charges or traps enhanc...
ONO Cell:FN Program <ul><li>FN program generates uniform oxide charges </li></ul><ul><li>Uniform oxide charges enhance les...
ONO Cell:Max I g  Program <ul><li>Max I g  program generates local oxide charges  </li></ul><ul><li>Oxide traps don’t cont...
ONO Cell:Double side Program <ul><li>the 1/f noise of double-side program is only half of the one-side program and is much...
Two-region model High Vt  region dominate   V t L 2 L 1 Q 2 Q 1
Extended to Three-region  High Vt  region dominate   V t L 2 L 1 Q 2 Q 1 L 3 Q 3
Dominant 1/f noise degradation mechanisms <ul><li>NMOS </li></ul><ul><li>•  Gate Voltage Dependence   </li></ul><ul><li>• ...
NMOS: Gate Voltage Dependence <ul><li>Low gate bias: Number fluctuation dominate </li></ul><ul><li>High gate bias: Mobilit...
NMOS: Cross Point in V G  dependence
NMOS: Channel Length Dependence Low Vg High Vg after stress: at low gate bias  L independence at high gate bias  1/L
NMOS:  V t  Dependence At low gate bias  1/f noise At high gate bias  1/f noise
PMOS: Gate Voltage Dependence
PMOS: Channel Length Dependence Low Vg High Vg <ul><li>PMOS: Mobility fluctuation dominate  </li></ul>
PMOS:  V t  Dependence PMOS  1/f noise
Oxide Soft Breakdown Effects on 1/f noise <ul><li>Tunneling Current Effect </li></ul><ul><li>Comparison of SBD effect betw...
Tunneling current effect on NMOS
Tunneling current effect on PMOS <ul><li>the gate tunneling current doesn’t contribute to the flicker noise   </li></ul>
Comparison of SBD effect between NMOS & PMOS
SBD effect on PMOS <ul><li>SBD enhances local positive oxide charge in the SBD spot </li></ul><ul><li>rapidly increase in ...
SBD effect on PMOS <ul><li>1/f Noise  arises sharply due to non-uniform charge creation   </li></ul>
Oxide charge distribution
SBD effect on NMOS <ul><li>negative oxide charge creation in ultrathin gate oxide is negligible </li></ul><ul><li>No V t  ...
SBD channel width dependence <ul><li>Smaller 1/f noise degradation in a larger gate width device.   </li></ul>
Two-region model along the gate width For large gate width  current bypass the SBD spot  negligible noise degradation
Summary <ul><li>The local oxide charge caused by CHE stress give rise to serious degradation of flicker noise </li></ul><u...
Summary <ul><li>Gate leakage current doesn’t contribute to 1/f noise </li></ul><ul><li>SBD effect induces larger 1/f noise...
Reference <ul><li>J. W. Wu, H. C. Chang, and T. Wang, “Oxide soft breakdown effects on drain current flicker noise in ultr...
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Master Final Defense Presentation

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Master Final Defense Presentation

  1. 1. Analysis of flicker noise degradation mechanism in ultra-thin oxide CMOS Student: H. C. Chang Advisor: Tahui Wang National Chiao Tung University Institute of electronics EVDTL
  2. 2. Outline <ul><li>1.Introduction </li></ul><ul><li>2.Flicker Noise Unified Model </li></ul><ul><li>3. Stress-enhanced Flicker Noise degradation </li></ul><ul><li>4. Dominant 1/f noise degradation mechanisms </li></ul><ul><li>5.Oxide Soft Breakdown Effects on 1/f noise </li></ul><ul><li>6.Summary </li></ul>
  3. 3. Motivation <ul><li>To develop an accurate, physics-based flicker noise model </li></ul><ul><li>Using the drain current flicker noise to monitor the Si-SiO 2 interface quality </li></ul><ul><li>• Stress effect </li></ul><ul><li>• Ultra thin oxide MOSFETs </li></ul>
  4. 4. In this thesis <ul><li>Introduction to Unified 1/f noise theory </li></ul><ul><li>Developing a two-region model based on the unified noise theory </li></ul><ul><li>Using the two models in stress-enhanced 1/f noise degradation </li></ul><ul><li>Using the two models to distinguish between number and mobility fluctuation </li></ul><ul><li>Using the two models to explain the SBD effect on 1/f noise </li></ul>
  5. 5. Flicker Noise Unified Model I-V model:
  6. 6. Flicker Noise Unified Model Drain current noise power: Input referred noise power:
  7. 7. Stress-enhanced Flicker Noise degradation <ul><li>NMOS </li></ul><ul><li>ONO Cell </li></ul><ul><li>Two-region model </li></ul>
  8. 8. NMOS:Max I b Stress <ul><li>Max I b stress generates interface states </li></ul><ul><li>Interface states enhance less 1/f noise degradation </li></ul>
  9. 9. NMOS:Max I g Stress <ul><li>Max I g stress generates local oxide charges & traps </li></ul><ul><li>Either Local charges or traps enhance serious 1/f noise degradation </li></ul>
  10. 10. NMOS:FN Stress <ul><li>FN stress generates uniform oxide charges & traps </li></ul><ul><li>Uniform charges or traps enhance less 1/f noise degradation </li></ul>
  11. 11. ONO Cell:FN Program <ul><li>FN program generates uniform oxide charges </li></ul><ul><li>Uniform oxide charges enhance less 1/f noise degradation </li></ul><ul><li>the oxide traps don’t induce the noise degradation </li></ul>
  12. 12. ONO Cell:Max I g Program <ul><li>Max I g program generates local oxide charges </li></ul><ul><li>Oxide traps don’t contribute to the 1/f noise degradation </li></ul><ul><li>the flicker noise degradation is due to non-uniform oxide charge distribution </li></ul>
  13. 13. ONO Cell:Double side Program <ul><li>the 1/f noise of double-side program is only half of the one-side program and is much larger than that of the fresh device </li></ul>
  14. 14. Two-region model High Vt region dominate V t L 2 L 1 Q 2 Q 1
  15. 15. Extended to Three-region High Vt region dominate V t L 2 L 1 Q 2 Q 1 L 3 Q 3
  16. 16. Dominant 1/f noise degradation mechanisms <ul><li>NMOS </li></ul><ul><li>• Gate Voltage Dependence </li></ul><ul><li>• Channel Length Dependence </li></ul><ul><li>• Delta threshold shift dependence </li></ul><ul><li>Repeat with PMOS </li></ul>
  17. 17. NMOS: Gate Voltage Dependence <ul><li>Low gate bias: Number fluctuation dominate </li></ul><ul><li>High gate bias: Mobility fluctuation dominate </li></ul>Fresh: Max I g stress:
  18. 18. NMOS: Cross Point in V G dependence
  19. 19. NMOS: Channel Length Dependence Low Vg High Vg after stress: at low gate bias  L independence at high gate bias  1/L
  20. 20. NMOS: V t Dependence At low gate bias  1/f noise At high gate bias  1/f noise
  21. 21. PMOS: Gate Voltage Dependence
  22. 22. PMOS: Channel Length Dependence Low Vg High Vg <ul><li>PMOS: Mobility fluctuation dominate </li></ul>
  23. 23. PMOS: V t Dependence PMOS  1/f noise
  24. 24. Oxide Soft Breakdown Effects on 1/f noise <ul><li>Tunneling Current Effect </li></ul><ul><li>Comparison of SBD effect between NMOS & PMOS </li></ul><ul><li>SBD channel width dependence </li></ul>
  25. 25. Tunneling current effect on NMOS
  26. 26. Tunneling current effect on PMOS <ul><li>the gate tunneling current doesn’t contribute to the flicker noise </li></ul>
  27. 27. Comparison of SBD effect between NMOS & PMOS
  28. 28. SBD effect on PMOS <ul><li>SBD enhances local positive oxide charge in the SBD spot </li></ul><ul><li>rapidly increase in V t after SBD </li></ul>
  29. 29. SBD effect on PMOS <ul><li>1/f Noise arises sharply due to non-uniform charge creation </li></ul>
  30. 30. Oxide charge distribution
  31. 31. SBD effect on NMOS <ul><li>negative oxide charge creation in ultrathin gate oxide is negligible </li></ul><ul><li>No V t shift </li></ul><ul><li>1/f noise remain the same </li></ul>
  32. 32. SBD channel width dependence <ul><li>Smaller 1/f noise degradation in a larger gate width device. </li></ul>
  33. 33. Two-region model along the gate width For large gate width  current bypass the SBD spot  negligible noise degradation
  34. 34. Summary <ul><li>The local oxide charge caused by CHE stress give rise to serious degradation of flicker noise </li></ul><ul><li>NMOS: low gate bias  number fluctuation dominate </li></ul><ul><li>high gate bias  mobility fluctuation dominate </li></ul><ul><li>PMOS: mobility fluctuation dominate </li></ul><ul><li>CHE stress enhanced 1/f noise degradation is more serious in long channel devices </li></ul>
  35. 35. Summary <ul><li>Gate leakage current doesn’t contribute to 1/f noise </li></ul><ul><li>SBD effect induces larger 1/f noise degradation in PMOS than in NMOS </li></ul><ul><li>SBD enhanced 1/f noise degradation is more serious in short width devices </li></ul>
  36. 36. Reference <ul><li>J. W. Wu, H. C. Chang, and T. Wang, “Oxide soft breakdown effects on drain current flicker noise in ultra-thin oxide CMOS devices,” The International Conference on Solid State Devices and Materials (SSDM) 2002 , pp. 698–699. </li></ul>

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