using poly-benzo-oxazole (PBO) sacrificial material and plasma enhanced chemical vapor deposited silicon oxide (PECVD SiO) cap layer.
Ic packaging :encapsulation
HANOI UNIVERSITY OF SCIENCE AND TECHNOLOGY Center for Training of Excellent Students Advanced Training Program SEMINAR:IC-PACKAGING CASE STUDY: ENCAPSULATION group: Hoàng Văn Tiến Nguyễn Đình Trung Phạm Đức Thịnh Class : MSE-K54
The IC- packaging : In electronics manufacturing, integrated circuit packaging is the final stage of semiconductor device fabrication, in which the tiny block of semiconducting material is encased in a supporting case that prevents physical damage and corrosion. -Last step : Encapsulation
Several options for encapsulation, providing the level of protection or accessibility ,include: Fully closed Partially closed Open
Fully closed (fully encapsulated) Flattened/remolded : fully encapsulated with filled organic substrate : epoxy, liquid epoxy resin, thin-film… Packages are returned to their original mechanical state and providing test socket compatibility. Top glob : fully encapsulated with filled epoxy domed top surface. Suitable for chip-on-board applications Clear encapsulant: Packages are fully encapsulated with non- filled epoxy and have a domed surface, for bonding verification, visual samples and optical applications.
Partial open cavity(partially encapsulated) - Encapsulated with filled epoxy in selected areas - ideal for circuit repair , visual inspection , emission studies - wires partially protected from mechanical damage
Open cavity Open cavity with frames or lids : no encapsulation, custom frame around perimeter of package with removable lid to protect die and bond wires Open Cavity: No encapsulation, die is exposed for total accessibility . easy of brobing die and chip.