Dark silicon and end of multi-corescalingByChinthaka HenadeeraSeminar of Dependable systems -SS 2012
Presentation outline1. Introduction2. Motivation3. Scaling models3.1 Device scaling model3.2 Single core scaling model3.3 ...
Introduction● Transistors of chips are doubled every 18months according to the Moores law.● Moores law is based on Dennard...
Motivation● Hot question“Can we gain 32 times performance frommulti-core processors in 2024 with respect to2008 ?”
Scaling models● To model the behaviour of future multicoreprocessors , 3 scaling models are createdand are combined.1) Dev...
OverviewFigure. 1 Overview of models and methodology [1]
Device scaling model (DevM)● To determine area, frequency and power offuture tech nodes.● Uses ITRS projections and conser...
Device scaling model cont.Table 1 Scaling factors for ITRS and Conservative projections
Single core scaling model (CorM)● Pareto-optimal frontiers for area/performanceand power/performance are created usingover...
Single core scaling model (CorM)contd.Figure 2(a) Power/performance frontierat 45 nm[1]Figure 2(b) Area/performance fronti...
Multi-core scaling model (CmpM)● There are 2 Multi-core scaling models1) Amdahl’s Law Upper-bound model (CmpMU)2) Realisti...
Amdahl’s Law Upper-bound model(CmpMU)● Amdahls law is extended in such a way thatcan describe symmetric, asymmetric,dynami...
Amdahl’s Law Upper-bound modelcontd.Symmetric Asymmetric Dynamic ComposedCPUmulticoreSerial 1 ST Core 1 Large ST Core 1 La...
Realistic model (CmpMR)● Micro-architectural features, applicationbehaviours, physical constraints, multi-coretopologies a...
Realistic model (CmpMR) contd.Figure 3 Equations used for CmpMR
Realistic model (CmpMR) contd.● Speed up of realistic model is calculatedusing,Figure 4
Realistic model (CmpMR) contd.● Speed up of realistic model is calculatedusing,Figure 4
Model combinations● DevM x CorM● DevM x CorM x CmpM
Evaluation of model combinationsDevM x CorMFigure 5. DevM x CorM
Evaluation of model combinationsDevM x CorM x CorMuFigure 6 DevM x CorM x CorMu
Results of combining modelsDevM x CorM x CmpMRFigure 7 DevM x CorM x CmpMRunder Symmetric topology and ITRS scaling
Results of combining models contd.Table 3.
Conclusions● Dark Silicon percentage increases withscaling down of the tech node.● ITRS projection is quite optimistic and...
References[1] Hadi Esmaeilzadeh, Emily Blem, Renée St. Amant,Karthikeyan Sankaralingam, Doug Burger. Dark Silicon and theE...
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Dark silicon

  1. 1. Dark silicon and end of multi-corescalingByChinthaka HenadeeraSeminar of Dependable systems -SS 2012
  2. 2. Presentation outline1. Introduction2. Motivation3. Scaling models3.1 Device scaling model3.2 Single core scaling model3.3 Multi-core scaling model4. Model combinations5. Evaluation of model combinations6. Conclusions7. References
  3. 3. Introduction● Transistors of chips are doubled every 18months according to the Moores law.● Moores law is based on Dennards scaling.● Failure of Dennards scaling has motivatedchip designers towards multi-core chips inorder to exploit the Moores law continuously.
  4. 4. Motivation● Hot question“Can we gain 32 times performance frommulti-core processors in 2024 with respect to2008 ?”
  5. 5. Scaling models● To model the behaviour of future multicoreprocessors , 3 scaling models are createdand are combined.1) Device scaling model (DevM)2) Single core scaling model (CorM)3) Multi-core scaling model (CmpM)
  6. 6. OverviewFigure. 1 Overview of models and methodology [1]
  7. 7. Device scaling model (DevM)● To determine area, frequency and power offuture tech nodes.● Uses ITRS projections and conservativedevice scaling projections.
  8. 8. Device scaling model cont.Table 1 Scaling factors for ITRS and Conservative projections
  9. 9. Single core scaling model (CorM)● Pareto-optimal frontiers for area/performanceand power/performance are created usingover 150 processors.
  10. 10. Single core scaling model (CorM)contd.Figure 2(a) Power/performance frontierat 45 nm[1]Figure 2(b) Area/performance frontierAt 45 nm [1]
  11. 11. Multi-core scaling model (CmpM)● There are 2 Multi-core scaling models1) Amdahl’s Law Upper-bound model (CmpMU)2) Realistic model (CmpMR)
  12. 12. Amdahl’s Law Upper-bound model(CmpMU)● Amdahls law is extended in such a way thatcan describe symmetric, asymmetric,dynamic and composed multi-coretopologies.● CmpMUmodel provides a strict upper boundof parallel performance.
  13. 13. Amdahl’s Law Upper-bound modelcontd.Symmetric Asymmetric Dynamic ComposedCPUmulticoreSerial 1 ST Core 1 Large ST Core 1 Large STCore1 Large STCoreParallel N ST Core 1 Large ST Core +N small ST CoresN small STCoresN small STCoresGPUmulticoreSerial 1 MT Core(1 Thread)1 Large ST Core(1 Thread)1 Large STCore (1Thread)1 Large STCore(1 Thread)Parallel N MT Core(Multiplethreads)1 Large ST Core(1 thread) +N small MTcores(Multiplethreads)N Small MTCores(Multiplethreads)N Small MTCores(Multiplethreads)Table 2 . CPU and GPU TopologiesST Core: Single-tread core MT Core: Many-thread core
  14. 14. Realistic model (CmpMR)● Micro-architectural features, applicationbehaviours, physical constraints, multi-coretopologies are considered for this model.
  15. 15. Realistic model (CmpMR) contd.Figure 3 Equations used for CmpMR
  16. 16. Realistic model (CmpMR) contd.● Speed up of realistic model is calculatedusing,Figure 4
  17. 17. Realistic model (CmpMR) contd.● Speed up of realistic model is calculatedusing,Figure 4
  18. 18. Model combinations● DevM x CorM● DevM x CorM x CmpM
  19. 19. Evaluation of model combinationsDevM x CorMFigure 5. DevM x CorM
  20. 20. Evaluation of model combinationsDevM x CorM x CorMuFigure 6 DevM x CorM x CorMu
  21. 21. Results of combining modelsDevM x CorM x CmpMRFigure 7 DevM x CorM x CmpMRunder Symmetric topology and ITRS scaling
  22. 22. Results of combining models contd.Table 3.
  23. 23. Conclusions● Dark Silicon percentage increases withscaling down of the tech node.● ITRS projection is quite optimistic and itshows● 7.9x of speed up in 2024 with respect to2008● 32x of speed up is impossible.
  24. 24. References[1] Hadi Esmaeilzadeh, Emily Blem, Renée St. Amant,Karthikeyan Sankaralingam, Doug Burger. Dark Silicon and theEnd of Multicore Scaling 2010
  25. 25. Questions?
  26. 26. Thank you

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