make is a basic tool to define pipelines of shell commands. It is useful if you have many shell scripts and commands, and you want to organize them. Even if it has been written to automatize the build of compiled language programs, make is also useful in bioinformatics and other fields.
Original problem statement <ul><li>Compiled languages programmers (C, C++, fortran, etc..) have to frequently execute complex shell commands: </li><ul><li>gcc -c -Wall -ansi -I/pkg/chempak/include dat2csv.c
rm *.o </li></ul><li>These commands are needed to convert a C++/C source code file to a binary file. </li></ul>
Shell commands in bioinformatics <ul><li>In bioinformatics it is frequent to use command line tools with complex syntax: </li><ul><li>grep, head, gawk, sed, cat.. (tools to work with flat files data)
It belongs to a class of softwares called 'automated build tools' </li></ul>
Simplest Makefile example <ul><li>The simplest Makefile contains just the name of a task and the commands associated with it: </li></ul><ul><li>print_hello is a makefile 'rule': it stores the commands needed to say 'Hello, world!' to the screen. </li></ul>
Simplest Makefile example Makefile rule Target of the rule Commands associated with the rule This is a tabulation (not 8 spaces)
Simplest Makefile example <ul><li>Create a file in your computer and save it as ' Makefile '.
Write these instructions in it: print_hello : echo 'Hello, world!!'
Then, open a terminal and type: </li></ul>This is a tabulation (<Tab> key) <ul>make -f Makefile print_hello </ul>
Make - advantages <ul><li>Make allows you to save shell commands along with their parameters and re-execute them;
It allows you to use command-line tools which are more flexible;
Combined with a revision control software, it makes possible to reproduce all the operations made to your data; </li></ul>
Second part A closer look at make syntax (target and commands)
The target syntax <ul><li>Makefile syntax: </li><ul><li><target> : (prerequisites) <commands associated to the rule> </li></ul></ul>
The target syntax <ul><li>The target of a rule can be either a title for the task, or a file name.
Everytime you call a make rule (example: 'make all'), the program looks for a file called like the target name (e.g. 'all', 'clean', 'inputdata.txt', 'results.txt')
The rule is executed only if that file doesn't exists. </li></ul>
Filename as target names <ul><li>In this makefile, we have two rules: 'testfile.txt' and 'clean' </li></ul>
Filename as target names <ul><li>In this makefile, we have two rules: ' testfile.txt ' and ' clean '
When we call ' make testfile.txt ', make checks if a file called 'testfile.txt' already exists. </li></ul>
Filename as target names The commands associated with the rule ' testfile.txt ' are executed only if that file doesn't exists already
Multiple target definition <ul><li>A target can also be a list of files
You can retrieve the matched target with the special variable $@ </li></ul>
Special characters <ul><li>The % character can be used as a wild card
For example, a rule with the target: %.txt : .... would be activated by any file ending with '.txt' </li><ul><li>'make 1.txt', 'make 2.txt', etc.. </li></ul><li>We will be able to retrieve the matched expression with '$*' </li></ul>
Special character % / creating more than a file at a time
Makefile – cluster support <ul><li>Note that in the previous example we created three files at the same time, by executing three times the command 'touch'
If we use the '-j' option when invoking make, the three processess will be launched in parallel </li></ul>
<ul><li>Makefile syntax: </li><ul><li><target> : (prerequisites) <commands associated to the rule> </li></ul></ul>The commands syntax
Inactivating verbose mode <ul><li>You can disactivate the verbose mode for a line by adding '@' at its beginning: </li></ul>Differences here
Skipping errors <ul><li>The modifiers '-' tells make to ignore errors returned by a command
Example: </li><ul><li>'mkdir /var' will cause an error (the '/var' directory already exists) and cause gnu/make to exit
'-mkdir /var' will cause an error anyway, but gnu/make will ignore it </li></ul></ul>
Moving throught directories <ul><li>A big issue with make is that every line is executed as a different shell process.
Third part Prerequisites and conditional execution
<ul><li>Makefile syntax: </li><ul><li><target> : (prerequisites) <commands associated to the rule> </li></ul><li>We will look at the 'prerequisites' part of a make rule, that I had skipped before </li></ul>The commands syntax
Real Makefile-rule syntax <ul><li>Complete syntax for a Makefile rule: <target> : <list of prerequisites> <commands associated to the rule>
Example: result1.txt : data1.txt data2.txt cat data1.txt data2.txt > result1.txt @echo 'result1.txt' has been calculated'
Prerequisites are files (or rules) that need to exists already in order to create the target file.
If 'data1.txt' and 'data2.txt' don't exist, the rule 'result1.txt' will exit with an error (no rule to create them) </li></ul>
Piping Makefile rules together <ul><li>You can pipe two Makefile rules together by defining prerequisites </li></ul>
Piping Makefile rules together <ul><li>The rule 'result1.txt' depends on the rule 'data1.txt', which should be executed first </li></ul>
Piping Makefile rules together <ul><li>Let's look at this example again:
what happens if we remove the file 'result1.txt' we just created? </li></ul>
Piping Makefile rules together <ul><li>Let's look at this example again:
what happens if we remove the file 'result1.txt' we just created?
The second time we run the 'make result1.txt' command, it is not necessary to create data1.txt again, so only a rule is executed </li></ul>
Make all will calculate result1.txt and result2.txt, if they don't exist already (and they are older than their prerequisites) </li></ul>
Conditional execution by modification date <ul><li>We have seen how make can be used to create a file, if it doesn't exists. file.txt: # if file.txt doesn't exists, then create it: echo 'contents of file.txt' > file.txt
We can do better: create or update a file only if it is newer than its prerequisites </li></ul>
Conditional execution by modification date <ul><li>Let's have a better look at this example: result1.txt : data1.txt calculate_result.py python calculate_result.txt --input data1.txt
A great feature of make is that it execute a rule not only if the target file doesn't exist, but also if it has a 'last modification date' earlier than all of its prerequisites </li></ul>
Conditional execution by modification date <ul>result1.txt : data1.txt @sed 's/b/B/i' data1.txt > result1.txt @echo 'result1.txt has been calculated' <li>In this example, result1.txt will be recalculated every time 'data1.txt' is modified
$: touch data1.txt calculate_result.py $: make result1.txt result1.txt has been calculated $: make result1.txt result1.txt is already up-to-date $: touch data1.txt $: make result1.txt result1.txt has been calculated </li></ul>
Conditional execution - applications <ul><li>This 'conditional execution by modification date comparison' feature of make is very useful
Let's say you discover an error in one of your input data: you will be able to repeat the analysis by executing only the operations needed
You can also use it to re-calculate results every time you modify a script: result.txt : scripts/calculate_result.py python calculate_result.py > result.py </li></ul>
Full makefile example INPUTFILES = lower_DAF lower_maf upper_maf lower_daf upper_daf RESULTSDIR = ./results RESULTFILES = $(addprefix $(RESULTSDIR)/, $(addsuffix _filtered.txt,$(INPUTFILES))) help : @echo 'type "make filter" to calculate results' all : $(RESULTFILES) $(RESULTSDIR)/%_filtered.txt : data/%.txt src/filter_genes.py python src/filter_genes.py --genes data/Genes.txt --window $< --output $@ <ul><li>It looks like very complicated, but in the end you always use the same Makefile structure </li></ul>
Fifth part Testing, discussion, other examples and alternatives
Testing a makefile <ul><li>make -n: only shows the commands to be executed
You can pass variables to make: $: make say_hello MYNAME=”Giovanni” hello, Giovanni
Strongly suggested: use a Revision Control Software with support for branching (git, hg, bazaar) and create a branch for testing </li></ul>
Another complex Makefile example <ul><li>our starting point is the file myseq , the end point is the blast results blastout
we first want to mask out any repeats using rmask to create myseq.m
we then blastx myseq.m against a protein db called mydb
before blastx is run the protein db must be indexed using formatdb </li></ul>(slide taken from biomake web site)
The “ make ” command <ul><li>make uses unix file modification timestamps when checking dependencies </li><ul><li>if a subtarget is more recent than the goal target, then re-execute action </li></ul></ul>(slide taken from biomake web site)
BioMake and alternatives <ul><li>BioMake is an alternative to make, thought to be used in bioinformatics
Developed to annotate the Drosophila melanogaster genome (Berkeley university)
Apply a pipeline to different datasets </li></ul><li>It is installed in almost any unix system and has a standard syntax (interchangeable, reproducible)
Study it and understand its logic. Use it in the most basic way, without worrying about prerequisites and special variables. Later you can look for easier tools (biomake, rake, taverna, galaxy, your own, etc..) </li></ul>
Suggested readings <ul><li>Software Carpentry for bioinformatics http://swc.scipy.org/lec/build.html
A Makefile is a pipeline http://www.nodalpoint.org/2007/03/18/a_pipeline_is_a_makefile
BioMake and SKAM http://skam.sourceforge.net/
BioWiki Make Manifesto http://biowiki.org/MakefileManifesto
Discussion on the BIP mailing list http://email@example.com/msg00013.html
Gnu/Make manual by R.Stallman and R.MacGrath </li><ul><li>http://theory.uwinnipeg.ca/gnu/make/make_toc.html </li></ul></ul>
End of talk!! <ul><li>Are you still alive? :-)
Thanks to: </li><ul><li>The author of 'Software carpentry for bioinformatics'
The people in the bip mailing list, for discussion
The author of bioinformaticszen.org and the people on nodalpoint for priming
All the people that have worked on this topic or who wrote a blog post / free internet document on it </li></ul><li>And thanks to you all!! </li></ul>
Inactivating verbose mode <ul><li>On make, the verbose mode is activated by default
Every time a command is called, make shows the exact line which is being executed </li></ul>This is the statement being executed
Makefile syntax <ul><li>Make is also a real programming language, 30 years old, with a syntax similar to bash.
It is a declarative language. In a make source code file, you define a set of rules, each one corresponding to a task, with this syntax: </li><ul><li><target> : <list of prerequisites> <commands associated to the rule>