About FlexSDR and My Projects<br />Shyu Lee (Xu LI)<br />FlexSDR project organizer<br />
Agenda<br />      Purpose of the project<br />      Technical details<br />      Current status<br />      Wish list<br />...
Very Basic Background<br />I used to be an amateur radio fan;<br />Was working on EME (Moon bouncing)communication during ...
Background (continued)<br />Worked as an RF Design Engineer in RFMD for four years, but never stop the researches SDR tech...
Purpose<br />Finish the SDR hardware test platform, make eligible for most SDR application verification missions;<br />Cre...
A too brief introduction of current status for the gears<br />
SDA-20F SDR Frontend<br />Part Numbered as SDA-20F;<br />Baseline level Stratix II FPGA based DSP;<br />Using Quartus II w...
TCV-100 SDR Frontend<br />Part Numbered as TCV-100;<br />EP2C50 Cyclone II FPGA based DSP;<br />Using Quartus II web editi...
FCS-300 Synthesizer Complex<br />Part Numbered as FCS-300;<br />5MHz~40MHz reference;<br />Bypass-able on board 10MHz TCXO...
ENC-310 Synthesizer Complex<br />Part Numbered as ENC-310;<br />Superseded by FCS-300;<br />All hardware design by Shyu on...
FCS-200 Synthesizer Complex<br />Part Numbered as FCS-200;<br />My first dream of making an ultra-low phase noise, low spu...
RF Frontend test bed<br />Developed during my time in college from 2005~2006;<br />
ARM embedded controlling system<br />Part Numbered as ESX-85;<br />Samsung S3C6410X ARM11 CPU + EP3C40 SDR optimized IO Br...
ARM embedded card<br />Part Numbered as SEM-641;<br />The S3C6410 SEM module shown on ESX-85 board;<br />All hardware desi...
ARM embedded card<br />Part Numbered as SEM-T36;<br />STM32 Cortex-M3 CPU<br />88W8686 Wi-Fi module;<br />Wi-Fi stack code...
Early versions of embedded cards<br />My works during my university time before 2006;<br />Based on S3C2440 ARM9;<br />Doe...
Block diagrams<br />The slides are prepared just within an hour, Please give me some extra time for the block diagrams.<br />
Patents<br />SEM Embedded Connection – a standard of the interconnection between embedded controllers and SDR hardware, in...
Wish List<br />I can hear other people’s voice, like suggestions, contributions and criticisms, on the FlexSDR project.<br...
Wish List<br />A business model could be found by opening the knowledge and selling service for customized commercial dema...
About Me<br />My name is Shyu Lee (Shyu is pronounced like |shoō|. Pinyin: LI XU, but never mind.)<br />Worked for RFMD fr...
Thanks for your time<br />I really appreciate you can finish checking out my slides.<br />Maybe you have some questions, p...
For Graduate Program Application<br />Having Bachelor degree of Electronics Engineering and Master degree of Computer Appl...
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About Flex Sdr And My Projects

  1. 1. About FlexSDR and My Projects<br />Shyu Lee (Xu LI)<br />FlexSDR project organizer<br />
  2. 2. Agenda<br /> Purpose of the project<br /> Technical details<br /> Current status<br /> Wish list<br /> About Shyu<br />
  3. 3. Very Basic Background<br />I used to be an amateur radio fan;<br />Was working on EME (Moon bouncing)communication during university time. Never succeed, but the failure just stimulate me keep going;<br />Made a lot of test boards including embedded system, FPGA (DSP), AD/DA as well as the RF frontend;<br />
  4. 4. Background (continued)<br />Worked as an RF Design Engineer in RFMD for four years, but never stop the researches SDR techniques during the time;<br />My time of working with SDR is scatter by regular work in company;<br />Now I give up the promotion and counter offer, quit my job and put full time on my favorite topic and style of research life;<br />
  5. 5. Purpose<br />Finish the SDR hardware test platform, make eligible for most SDR application verification missions;<br />Create a set of basic software building blocks, to let people quick get their work hand on;<br />Make the project open source under GPL;<br />Help to let the open project contributors connected as a community.<br />
  6. 6. A too brief introduction of current status for the gears<br />
  7. 7. SDA-20F SDR Frontend<br />Part Numbered as SDA-20F;<br />Baseline level Stratix II FPGA based DSP;<br />Using Quartus II web edition as the developing IDE;<br />AD9957 as the TX DAC;<br />AD6655 as the dual-RX ADC (purpose of diversity receiving)<br />RX signal lever + ADC Driver + Anti-aliasing filer attached;<br />128MiB 133MHz SDRAM;<br />DXB expansion slot;<br />All hardware design by Shyu on the expense of his own salary during his spare time in 2009;<br />All finished by Shyu’s hand soldering and assembly;<br />
  8. 8. TCV-100 SDR Frontend<br />Part Numbered as TCV-100;<br />EP2C50 Cyclone II FPGA based DSP;<br />Using Quartus II web edition as the developing IDE;<br />AD9957 as the TX DAC;<br />AD6655 as the dual-RX ADC (purpose of diversity receiving)<br />8MiB 133MHz SDRAM;<br />All hardware design by Shyu on the expense of his own salary during his spare time in 2007;<br />All finished by Shyu’s hand soldering and assembly;<br />
  9. 9. FCS-300 Synthesizer Complex<br />Part Numbered as FCS-300;<br />5MHz~40MHz reference;<br />Bypass-able on board 10MHz TCXO reference;<br />320MHz ultra low phase-noise VCXO locked by reference with AD9518; <br />DDS based ADC/DAC Encoding;<br />AD9912 DDS output;<br />All hardware design by Shyu on the expense of his own salary during his spare time in 2009;<br />All finished by Shyu’s hand soldering and assembly;<br />
  10. 10. ENC-310 Synthesizer Complex<br />Part Numbered as ENC-310;<br />Superseded by FCS-300;<br />All hardware design by Shyu on the expense of his own salary during his spare time in 2008;<br />All finished by Shyu’s hand soldering and assembly;<br />
  11. 11. FCS-200 Synthesizer Complex<br />Part Numbered as FCS-200;<br />My first dream of making an ultra-low phase noise, low spur level signal source comparable to Agilent’s $20000.00 items; <br />Superseded by FCS-300;<br />All hardware design by Shyu on the expense of his own salary during his spare time in 2007;<br />All finished by Shyu’s hand soldering and assembly;<br />
  12. 12. RF Frontend test bed<br />Developed during my time in college from 2005~2006;<br />
  13. 13. ARM embedded controlling system<br />Part Numbered as ESX-85;<br />Samsung S3C6410X ARM11 CPU + EP3C40 SDR optimized IO Bridge;<br />Full set of modern I/O purpose, including: Ethernet, USB Device/Host, RS-232(all 8 lines), Optical SPDIF and conventional AC97 audio;<br />Work as DXB expansion host;<br /> Using industry standard JTAG port to connect with debugging tools;<br />LCD supported with OpenVG;<br />Ported to Linux 2.6.3x;<br />All hardware design by Shyu on the expense of his own salary during his spare time in 2011;<br />All finished by Shyu’s hand soldering and assembly;<br />
  14. 14. ARM embedded card<br />Part Numbered as SEM-641;<br />The S3C6410 SEM module shown on ESX-85 board;<br />All hardware design by Shyu on the expense of his own salary during his spare time in 2011;<br />All finished by Shyu’s hand soldering and assembly;<br />“Designed by Shyu” noted on metal layer;<br />
  15. 15. ARM embedded card<br />Part Numbered as SEM-T36;<br />STM32 Cortex-M3 CPU<br />88W8686 Wi-Fi module;<br />Wi-Fi stack code finished by another community member;<br />SEM module, supported by ESX-85;<br />All hardware design by Shyu on the expense of his own salary during his spare time in 2011;<br />All finished by Shyu’s hand soldering and assembly;<br />
  16. 16. Early versions of embedded cards<br />My works during my university time before 2006;<br />Based on S3C2440 ARM9;<br />Does not compatible with SEM standard, but these parts are my early thoughts of how an embedded module should be like;<br />
  17. 17. Block diagrams<br />The slides are prepared just within an hour, Please give me some extra time for the block diagrams.<br />
  18. 18. Patents<br />SEM Embedded Connection – a standard of the interconnection between embedded controllers and SDR hardware, including the mechanical specifications and signal and timing specifications;<br />DXB Expansion - a standard of the interconnection between the replaceable AD/DA frontend and SDR motherboard, including the mechanical specifications and signal and timing specifications;<br />
  19. 19. Wish List<br />I can hear other people’s voice, like suggestions, contributions and criticisms, on the FlexSDR project.<br />I can have all aspects of the documents of the project organized and finished.<br />I can use my gadgets to fulfill my wish of making a successive EME communication. That will be really really cool!<br />I can effectively help other people with my knowledge;<br />I can put full of my strength on a field I am so interested in, that I have spent at least 6 years time on.<br />
  20. 20. Wish List<br />A business model could be found by opening the knowledge and selling service for customized commercial demands;<br />I wish I can help with the “Inter-Planet” and “Outer space” wireless communications at lower cost and higher performance level.<br />
  21. 21. About Me<br />My name is Shyu Lee (Shyu is pronounced like |shoō|. Pinyin: LI XU, but never mind.)<br />Worked for RFMD from 2008 to 2011 as RF Engineer, RF Design Engineer, Staff Design Engineer and perhaps I can be Engineering Manager if I don’t quit. My job was design RF frontend IC and MCM modules for base-stations. There are harsh demand of performance specifications like IP3, noise figure, gain, isolation and many others for the the products I was concern with. I also have one year design experience of VCO and PLL in Sirenza (With the members of Vari-L team), frequency covering from 1GHz ~ 7GHz with coil tanked and micro-strip tanked structures;<br />I quit the my company job and plan to start FlexSDR;<br />I have to eat something in order to live everyday, so I help my friends started one company called Meteroi, a company design and manufacturing multi-meters with varies of innovative ideas;<br />
  22. 22. Thanks for your time<br />I really appreciate you can finish checking out my slides.<br />Maybe you have some questions, please feel free contact me with me@shyul.com or call me at +86-1860-1678-068.<br />
  23. 23. For Graduate Program Application<br />Having Bachelor degree of Electronics Engineering and Master degree of Computer Application;<br />GRE: 520/800/3 (Gosh! something must be wrong and crazy for 3)<br />TOFEL: 20/26/23/24<br />

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