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Interleaved Power Factor Correction


Published on

To introduce Interleaved PFC and its key design factors

Published in: Technology, Business

Interleaved Power Factor Correction

  1. 1. Interleaved Power Factor Correction (IPFC) <ul><li>Source: M ICROCHIP </li></ul>
  2. 2. Introduction <ul><li>Purpose </li></ul><ul><ul><li>To introduce Interleaved PFC and its key design factors </li></ul></ul><ul><li>Outline </li></ul><ul><ul><li>Introduction to Power Factor Correction </li></ul></ul><ul><ul><li>IPFC Design Overview </li></ul></ul><ul><ul><li>IPFC Reference Design </li></ul></ul><ul><ul><li>Conclusion </li></ul></ul><ul><li>Content </li></ul><ul><ul><li>13 pages </li></ul></ul>
  3. 3. Introduction to PFC <ul><li>cos( Φ ) = power factor </li></ul>Φ Φ Un-utilized power Applied Voltage S P Q Φ Resulting Current
  4. 4. IPFC Design Overview Rectifier Controller Load AC Supply Vac Iac Vdc PWM PFC Converter <ul><li>Specifications: </li></ul><ul><li>Input AC voltage: 85 to 265V </li></ul><ul><li>Output voltage: 400V ( ± 2% ) </li></ul><ul><li>Output power: 350W </li></ul><ul><li>Power factor: > 0.99 </li></ul><ul><li>THD: <5% </li></ul><ul><li>Efficiency: > 0.95 </li></ul>
  5. 5. IPFC Design Overview Buck Converter V 1 S D L C - + + - i V 2 V 1 i V 2 < V 1 0    - ω t ω t Boost Converter S D L C - + + - i V 1 V 2 V 1 i V 2 > V 1  ω t ω t 0 S D L C - + - + i V 1 V 2 0  ω t Buck-Boost Converter V 1 i V 2 < V 1 V 2 > V 1 ω t
  6. 6. IPFC Design Overview PFC MOSFET LIVE_GND + - ~ ~ Vac ~ C2 R1 R2 R4 R5 R3 R6 R sense -HV_BUS +HV_BUS C1 C4 L1 Q1 D1 PWM1H |V AC | Sense V DC Sense I AC Sense C3 Primary (Live) Side PFC MOSFET Boost Diode PFC Inductor
  7. 7. IPFC Design Overview 90 -265V AC PWM1H I s1 PWM1L I L2 I s2 I D1 PFC output I C I IN I L1 I D2 I OUT
  8. 8. IPFC Reference Design Rectifier Controller Load AC Supply Vac Iac Vdc PWM1 PFC Converter 1 PFC Converter 2 PWM2 Im1 Im2
  9. 9. IPFC Reference Design
  10. 10. User Interface dsPIC ® DSC PIM Interleaved PFC boost circuitry AC input circuitry Fault Circuitry 12V and 3.3V Power Supply IPFC Reference Design
  11. 11. <ul><li>Semiconductor selection </li></ul><ul><ul><li>Voltage and current rating </li></ul></ul><ul><ul><li>Conduction and commutation losses </li></ul></ul><ul><li>Inductance selection </li></ul><ul><ul><li>Power output rating </li></ul></ul><ul><ul><li>Input current ripple </li></ul></ul><ul><li>Capacitor selection </li></ul><ul><ul><li>Output voltage ripple (holdup time) </li></ul></ul><ul><ul><li>ESR value </li></ul></ul>IPFC Reference Design
  12. 12. Conclusion <ul><li>IPFC represents a cost and space efficient solution VS single stage PFC (considering a certain power limit) </li></ul><ul><li>IPFC reference design using dsPIC ® DSC offers the possibility of high integration factor </li></ul>
  13. 13. Additional Resource <ul><li>For ordering dsPIC® DSCs , please click the part list or </li></ul><ul><li>Call our sales hotline </li></ul><ul><li>For more product information go to </li></ul><ul><ul><li> </li></ul></ul><ul><li>Visit Element 14 to post your question </li></ul><ul><ul><li> </li></ul></ul><ul><li>For additional inquires contact our technical service hotline or even use our “Live Technical Chat” online facility </li></ul>Newark Farnell