Welcome to the training module on Freescale i.MX31 processors. The intent of this module is to provide you with an overview of the MCIMX31 processor. You will learn about the i.MX31 and the i.MX31L processors; Smart Speed TM Technology; and i.MX31 applications, features, and enhancements.
The MCIMX31 processor, or i.MX31, is a member of the Freescale application processor family. The i.MX31 is the third-generation ARM-based application processor, following the i.MX21 and i.MX1. The i.MX31 is a platform that enables virtually any portable multimedia product to be an intelligent device, accelerating possibilities for the next-generation of mobile and connected applications. The difference between the i.MX31 and the i.MX31L is that the i.MX31 contains 2D and 3D graphics hardware acceleration. The i.MX31, like all i.MX products, was designed and manufactured with Smart Speed in mind, where Smart Speed is the balance between performance and power consumption. The i.MX31 features many exciting enhancements that make it the ideal applications processor for mobile entertainment solutions. These highlights include increased security, powerful image processing, advanced power management, multimedia and graphics hardware acceleration, and enhanced connectivity.
Because of this mobile devices need to improve their power efficiency with each new product cycle. In order to accomplish this, Freescale has focused on improvements to the processor architecture that would allow more performance at same or less power consumption than before. Smart Speed technology is about finding the perfect balance between performance and power consumption. This is done through design techniques such at using dual voltage transistors, through architectural features such integrated cache, vector floating point co-processor and hardware accelerators, and then through power management advantages like dynamic voltage and frequency scaling and dynamic process temperature compensation. The i.MX31 works smarter and not harder by utilizing the CPU and specialized execution units in the most efficient way. Multiple levels of parallelism dramatically reduce the system cycles per instruction and system power.
The i.MX31 provides a common platform to create multiple products that combine computing, communications, and entertainment in one device. Listed and shown here are some real examples of where i.MX has been and is currently being designed into, including portable media players, intelligent remote controls, and barcode scanners. In short, the i.MX31 is ideal for any application requiring high performance, low power, and a rich set of on-chip peripherals.
The CPU of i.MX31 is ARM1136JF-S core based on the ARM v6 architecture, supporting up to 532MHz speed with a 6x5 crossbar switch, allowing for up to 5 simultaneous transactions on the 133MHz system bus. The i.MX31 support a number of lower power modes, as well as active well-bias and power gating. The LCD controller, supporting up to SVGA displays and the MPEG4 encoder supporting up to 30 fps are just some of the reasons why this device has been so prominent in the multimedia space. Combine the performance of the i.MX31 with its high degree of connectivity, including the USB OTG, and the i.MX31 becomes appropriate for a wide variety of applications.
The CPU complex of the i.MX31 consists of the ARM1136JF-S processor, an L2 cache system, the Smart Speed switch, and an ARM11™ Vector Interrupt Controller (AVIC). The multilevel cache system consists of a powerful L2 Cache Controller (L2CC) that has been optimized by ARM to Freescale specifications with 128 Kbytes of unified L2 cache memory and an integrated L2 cache monitor. The L1 cache provides 16 Kbytes for instruction and 16 Kbytes for data. The Smart Speed switch, otherwise known as the 6 × 5 Multi-Layer AHB Crossbar switch (MAX), allows for up to five simultaneous transactions to occur in parallel, giving the performance of up to a 665 MHz bus. The VFP11 Floating Point Unit (FPU) is an ARM-enhanced IEEE 754 numeric coprocessor that can be used to support and enhance 3D graphics, gaming, high resolution audio, Java™ and other general-purpose applications.
The i.MX31 processor is optimized to support a variety of image and video applications. It offers power-efficient image and video processing, pre- and post-processing in hardware, simultaneous MPEG-4 Simple Profile (SP) video encoding and decoding, real-time video decode in advanced formats, and image capture of up to 30 megapixels per second. The video implementation in the i.MX31 processor is the result of a smart trade-off between performance and flexibility. With a VFP co-processor and L2 cache, the i.MX31 is designed for any wireless device running computationally-intensive multimedia applications such as digital video broadcast and videoconferencing. Image capture in the i.MX31 can reach up to 30 megapixels per second, supporting VGA at 30+ fps in real time, 3 megapixels at 10 fps, and 16 megapixels for still picture capture. The synchronization speed is up to 480 Mbps.
Let’s examine the video processing chain and its implementation. Images are captured by a camera and input directly to the Image Processing Unit (IPU) via the sensor interface. The IPU performs some very processing-intensive image manipulations, adding considerable processing power to the system: approximately 1200 MHz of equivalent ARM11 performance. The IPU includes all the functionality required for image processing and display management. It allows a camera preview function to be performed fully in hardware, allowing the CPU to be powered down in this stage. It performs post filtering for MPEG-4, including de-blocking and de-ringing, and it also performs in-loop de-blocking for H.264 as specified in this standard. The pre-processor is part of the IPU, and it resizes the data and performs color space conversion. The preprocessor can send data to a small viewfinder display, which provides visual feedback to the user to ensure that the desired data is being captured. when the user wants to view the recorded video, the encoded data is retrieved and passed through the MPEG-4 decoder, which decompresses the data.
The i.MX31 has built in pre- and post- processing in hardware that includes all the functionality required for image processing and display management, including de-block, dering, color space conversion, independent horizontal and vertical resizing, blending of graphics and video planes, and rotation in parallel to video decoding. Based on a mixture of software and hardware, this implementation provides the flexibility to support a variety of algorithms and future extensions.
The IPU is at the heart of the video processing chain. It offers an integrative approach, including all functionalities required for image processing and display management. The IPU supports connectivity to a wide range of external devices including cameras, displays, graphics accelerators, and TV encoders and decoders. To support all these devices, the IPU has a synchronous interface and an asynchronous interface. The synchronous interface is for transfer of display data in synchronization with the screen refresh cycle. The asynchronous interface is for random read/write access to the memory and registers of smart displays and graphics accelerators. The data bus is 18 bits wide (or less), and it can transfer pixels of up to 24-bit color depth.
Here is the layout of the IPU. The sensor port provides interface to smart image sensors, raw image sensors, and camera flash support. Video processing provides deblocking and deringing, resizing, color conversion, combining with graphics, and inversion and rotation. The display port provides interface to a smart/memory-less display, a TV encoder, and a graphics accelerator. With the ARM platform powered down, the IPU performs the following activities completely autonomously: screen refresh of a memory-less display, periodic update of the display buffer in a smart display, and display of a viewfinder window.
Here you can see how data flows for video capturing using MPEG-4 encoding. IPU processing takes care of de-interleaving for compression; color conversion and combining with graphics for display (viewfinder); and resizing, inversion, and rotation for both compression and display (independently). Next, the encoder processes motion estimation, discrete cosine transform (DCT) and quantization, inverse quantization, inverse DCT (IDCT) and motion compensation, scan, run-length coding and Huffman coding, and rate control. Finally, the ARM takes care of MPEG-4 stream forming.
The i.MX31 Product Development Kit is a 3-board module solution allowing customers to efficiently design, debug, and demo using the i.MX31. The brain of the system is the i.MX31 processor module containing the CPU, memory, and power management. This module plugs into the debug board which contains the necessary functions for software and applications development. The personality board is really the heart of the development board, providing items that will most commonly be found in end customers’ products, such as display, camera, buttons, wired and wireless connectivity, and storage devices. All the board design are considered production-ready in that the design and layout of the boards has been tested and verified and a high degree of optimization has been obtained. The design files are provided for each of the boards as a way to help jump start the customers own hardware design.
Thank you for taking the time to view this presentation on Freescale i.MX31 multimedia application processors. If you would like to learn more or go on to purchase some of these devices, you may either click on the part list link, or simple call our sales hotline. For more technical information you may either visit the Freescale site – link shown – or if you would prefer to speak to someone live, please call our hotline number, or even use our ‘live chat’ online facility.
Introduction <ul><li>Purpose </li></ul><ul><ul><li>This training module provides an overview of the i.MX31 CPU complex, and introduce the multimedia features and functions of i.MX31. </li></ul></ul><ul><li>Outline </li></ul><ul><ul><li>Smart Speed Technology </li></ul></ul><ul><ul><li>ARM1136 CPU Core overview </li></ul></ul><ul><ul><li>The features and benefits of the i.MX31 </li></ul></ul><ul><ul><li>i.MX31 application </li></ul></ul><ul><li>Contents </li></ul><ul><ul><li>14 pages </li></ul></ul><ul><li>Duration </li></ul><ul><ul><li>15 Minutes </li></ul></ul>
What are the i.MX31 and i.MX31L <ul><li>MCIMX31 – “i.MX31” </li></ul><ul><li>MCIM31L – “i.MX31L” </li></ul><ul><li>Smart Speed Technology </li></ul><ul><li>i.MX31 highlights </li></ul><ul><ul><li>Increased security </li></ul></ul><ul><ul><li>Powerful image processing </li></ul></ul><ul><ul><li>Advanced power management </li></ul></ul><ul><ul><li>Multimedia and graphics hardware acceleration </li></ul></ul><ul><ul><li>Enhanced connectivity </li></ul></ul><ul><li>Implemented in low power 90nm process </li></ul><ul><li>Supported by major operating systems </li></ul>
Smart Speed Technology <ul><li>Smart Speed Concept </li></ul><ul><ul><li>Work smarter, not harder </li></ul></ul><ul><ul><li>Use the limited energy efficiently </li></ul></ul><ul><ul><li>Enable high performance applications </li></ul></ul><ul><li>Dual voltage transistors minimizes power leakage </li></ul><ul><li>Multiple low power states </li></ul><ul><li>Smart Speed Crossbar switch eliminates wait states </li></ul><ul><li>Integrated Cache System </li></ul><ul><li>Vector Floating Point co-processor </li></ul><ul><li>Hardware accelerators for offloading intensive functions </li></ul><ul><li>Automatic Dynamic Voltage Frequency Scaling </li></ul><ul><li>Dynamic Process Temperature Compensation </li></ul>
i.MX31 Applications <ul><li>Any application requires high performance, low power, and a rich set of on-chip peripherals. </li></ul><ul><li>Portable Media Player </li></ul><ul><li>Portable Navigation Device </li></ul><ul><li>Automotive Infotainment </li></ul><ul><li>Mobile Internet Device </li></ul><ul><li>Intelligent Remote Control </li></ul><ul><li>Smart Phone </li></ul><ul><li>IP Phone </li></ul><ul><li>Security & Surveillance </li></ul><ul><li>Media Adaptor </li></ul><ul><li>e-Book </li></ul><ul><li>POS Terminal </li></ul><ul><li>Bar Code Scanner </li></ul>
i.MX31(L) Applications Processor <ul><li>Key Features and Advantages </li></ul><ul><li>ARM1136 with 128Kb L2 Cache </li></ul><ul><li>Integrated 3D graphics processor </li></ul><ul><ul><li>Eliminates 2 chip solution </li></ul></ul><ul><ul><li>Eliminates separate memory subsystem </li></ul></ul><ul><li>Integrated Image Processing Unit (IPU) </li></ul><ul><ul><li>CMOS/CCD Interface </li></ul></ul><ul><ul><li>Resize, CSC, Deblock, Dering, Blending </li></ul></ul><ul><li>Vector Floating Point Co-Processor (VFP) </li></ul><ul><li>Smart DMA RISC-based DMA controller </li></ul><ul><li>Connectivity </li></ul><ul><ul><li>WLAN, BT, GPS via external chipset </li></ul></ul><ul><ul><li>HS USB, ATA-6, MMC/SDIO, MS-Pro, Compact Flash </li></ul></ul><ul><ul><li>266MHz Mobile DDR, NAND/NOR, Mobile SDRAM, SRAM </li></ul></ul>i.MX31(L) Not available on i.MX31L Special Functions Memory Interface System Control Expansion Connectivity Internal External CPU Complex Std System I/O Multimedia & Human Interface IPU Graphics Accelerator Security HW NANDF Ctl VSync SDRAM/DDR PSRAM SmartMedia Bootstrap JTAG, ETM System Reset PLL & Power Mgmt SIM ATA 2 x MMC / SD PCMCIA / CF 2 x Memory Stick - Pro USB OTG HS 5 x UART 2 x USB Host 3 x CSPI Audio Mux 1-Wire 2 x SSI/I 2 S Fast IrDA 3 x I 2 C VFP ARM1136 CPU Smart Speed Switch (MAX) ROM Patch ETM i-cache d-cache L2-cache 3 x Timers GPIO RTC PWM WD Timer RAM, ROM eDMA Camera I/F MPEG-4 Encoder Keypad Blending Display/TV Ctl Pre & Post Processing Inversion and Rotation
Video Processing cont’d <ul><li>Pre/Post processing </li></ul><ul><ul><li>Performed fully in hardware </li></ul></ul><ul><ul><li>Includes resizing, rotation and inversion, color conversion, de-blocking, de-ringing, and blending with graphics </li></ul></ul><ul><li>Encoding </li></ul><ul><ul><li>MPEG-4 SP (fully HW accelerated) </li></ul></ul><ul><ul><li>Sufficient for most purposes: </li></ul></ul><ul><ul><li>Other standards are left to SW </li></ul></ul><ul><li>Decoding </li></ul><ul><ul><li>Post-filtering (de-blocking and de-ringing) is HW accelerated, providing significant acceleration. </li></ul></ul><ul><ul><li>For H.264, the most processing-intensive standard, the de-blocking filter is HW accelerated. </li></ul></ul><ul><ul><li>Other standards are implemented in software, enabling full flexibility to support a variety of algorithms and future extensions. </li></ul></ul><ul><ul><li>This is enabled by the powerful ARM11 MCU and multilevel cache system. </li></ul></ul>
IPU cont’d Interface to: - smart image sensors - raw image sensors - camera flash support • Deblocking and deringing • Resizing • Color conversion • Combining with graphics • Inversion and rotation Interface to: - a smart/memory-less display - a TV encoder - a graphics accelerator System Memory ARM11
i.MX31 Product Development Kit i.MX31 Processor Module Can be attached to: De-bug module for software development Personality module for demonstration Both De-bug and Personality Personality Module Provides the devices most commonly tailored to meet a specific target product or customer requirement: VGA Touch-screen Display Buttons Connectivity User I/O Communications Camera Storage External connectors Design. Debug. Demo.
Additional Resource <ul><li>For ordering the i.MX31 processors, please click the part list or </li></ul><ul><li>Call our sales hotline </li></ul><ul><li>For additional inquires contact our technical service hotline </li></ul><ul><li>For more product information go to </li></ul><ul><ul><li>http://www.freescale.com/iMX31 </li></ul></ul>