Industrial Training    (Six Months/One Semester)                in             VLSI Design(RTL using Verilog & FPGA Design...
MODULE TOPICS                         MODULE 1: OPERATING SYSTEM - LINUX1.   Introduction to Linux OS2.   Managing Files a...
5. Gate-Level Modeling6. Dataflow Modeling7. Behavioral Modeling8. Tasks and Functions9. Useful Modeling Techniques10. Tim...
PROGRAM DETAILSBatch Commences on : July 4th, 2011 (Tentative)Total Seats           : 48 ( 24 per batch )Duration         ...
INFRASTRUCTURE FACILITIES•   Latest Configuration PCs with TFT Screens•   Linux Operating System•   High Speed Internet•  ...
• Chandrakant Sakharwade:        o Qualification: M.Tech. in Advanced Electronics from IIT Chennai (1978) and B.Tech.     ...
AGNISYS      DKOP is Spark Higher Education Program partner of Agnisys. DKOP students are given live projects from      Ag...
Pankaj Talwar, LCET, Ludhiana      Richa, Banasthali University      Mamta Rana, Jiwaji UniversityCIRCUITSUTRA TECHNOLOGIE...
Hasan KarkaraNote: Our competitors also hire our graduates!                               RECOMMENDATIONS   1. Mr Jitin Sa...
10. BANASTHALI VIDYAPITH11. CHITKARA INSTITUTE OF ENGG & TECH, RAJPURA12. DAV INSTITUTE OF ENGG & TECH, JALANDHAR13. KUMAO...
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Industrial trainingvlsi design-2011

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Industrial trainingvlsi design-2011

  1. 1. Industrial Training (Six Months/One Semester) in VLSI Design(RTL using Verilog & FPGA Design Flow) (Live Project) An Initiative by Industry Experts from Cadence, Atrenta & Patni with qualification from IITs and BITS-PilaniTraining Partners of Cadence Design Systems and Mentor Graphics (Worldwide EDA Giants) DKOP Labs Pvt. Ltd. Knowledge, Operations and Practices C-53, Lower Ground Floor, Sector – 2, Noida – 201301 Tel: 0120-4276796, 0120-4203797; Tel/Fax: 0120-4274237; Mob: +91-9971792797 Email: info@dkoplabs.com; Web: http://www.dkoplabs.com
  2. 2. MODULE TOPICS MODULE 1: OPERATING SYSTEM - LINUX1. Introduction to Linux OS2. Managing Files and Directories3. ‘Vi’ Text Editor4. Managing Documents5. Securing Files in Linux MODULE 2: SHELL SCRIPTING1. Automating Tasks using Shell Scripts2. Using Conditional Execution in Shell Scripts3. Managing Repetitive Tasks Using Shell Scripts MODULE 3: PERL & TCL/TK1. Introduction2. Scalar Data3. Lists and Arrays4. Subroutines5. Input and Output6. Hashes7. In the World of Regular Expressions8. Matching with Regular Expressions9. Processing Text with Regular Expressions10. Project in TCL-Tk MODULE 4: ADVANCED DIGITAL DESIGN1. Design Concepts2. Introduction to Logic3. Optimized Implementation of Logic Functions4. Number Representation and Arithmetic Circuits5. Combinational-Circuits Building Blocks6. Flip-Flops, Registers, Counters, and Simple Processor7. Synchronous Sequential Circuits8. Asynchronous Sequential Circuits9. Digital System Design10. Testing of Logic Circuits11. Computer Aided Design Tools MODULE 5: VERILOG HDL1. Overview of Digital Design with VerilogHDL2. Hierarchical Modeling Concepts3. Basic Concepts4. Modules and Ports
  3. 3. 5. Gate-Level Modeling6. Dataflow Modeling7. Behavioral Modeling8. Tasks and Functions9. Useful Modeling Techniques10. Timing and Delays11. Switch-Level Modeling12. User Defined Primitives13. Programming Language Interface14. Advanced Verification Techniques MODULE 6: FPGA DESIGN FLOW1. FPGA Kit Introduction2. Special FPGA Resources a. Block RAM b. DCM (Digital Clock Manager) c. Dedicated Arithmetic functions3. FPGA Kit interfacing and configuration a. LCD b. PS2 Mouse c. VGA Controller d. A/D4. Writing Synthesizable Verilog5. FPGA Design Flow using Xilinx/Altera FPGA Kit and Xilinx/Altera Tools MODULE 7: CMOS1. Basic MOS Transistor Theory2. Combinational MOS Logic Circuits3. Sequential MOS Logic Circuits4. Layout Design & Rules MODULE 8: PROJECT WORK1. Project Study2. Design & Implementation using Mentor Graphics/Cadence EDA tools3. Presentation4. Document submission5. Evaluation of Project MODULE 9: SOFT SKILLS1. Resume Writing2. Interview Facing Skills3. Presentation Preparation & Delivery4. Aptitude preparation 3/10
  4. 4. PROGRAM DETAILSBatch Commences on : July 4th, 2011 (Tentative)Total Seats : 48 ( 24 per batch )Duration : One Semester/Six Months (5 days/week, Mon-Fri, 4 hours/day)Fees : Rs 33,090/- (30,000 + 10.3% service tax) per student (Rs 5,515/- for seat confirmation Rs 16,545/- at the time of joining Rs 11,030/- within 15 days of joining) TOOLSState-of-the-art Industry version EDA Tools from Mentor Graphics and Cadence DesignSystems, Xilinx, Windows/Linux based OpenSource EDA tools and demo versions ofsome industry tools. • Verilog Design & Simulation Tools • Schematic Capture & SPICE Simulation Tools • MATLAB • Xilinx & Altera FPGA Development Kits BENEFITS FOR THE STUDENTS • Helps you in understanding the practical and industrial applications of academic curriculum • Build your knowledge to develop innovative projects during their final year of engineering • Enhances the Skill-Set in your resume for better placement prospects within the semiconductor industry • Helping build knowledge and expertise for the aspirants of higher studies abroad to face the stiff competition from students of other countries • Build your confidence through hands on exposure to various tools & technologies 4/10
  5. 5. INFRASTRUCTURE FACILITIES• Latest Configuration PCs with TFT Screens• Linux Operating System• High Speed Internet• LAN connecting all the PCs for easy distribution of tutorials etc.• LCD & LED Projectors & White Screen• Library DKOP TEAM• Manu Lauria: o Qualification: M.Tech. in Computer Science & Engineering from IIT Delhi (1989-90) and B.Tech. in Electrical Engineering from IIT Delhi (1980-1985) o Experience: More than 22 years in the Industry with 18 years in the Semiconductor industry at Cadence Design Systems and 4 years at ONGC. Rich experience in EDA software tools development - responsible for many products from concept to reality. Was part of the core leadership team of Cadence’s Noida Center for 13 years. Has managed or been part of teams that developed products in the areas of Synthesis, Simulation, Custom IC Design, Rule checking, Model Development & Web based component/design management.• Sandeep Gupta: o Qualification: M.Tech. in Computer Applications from IIT Delhi and M.Sc. Mathematics from IIT Delhi o Experience: More than Eighteen years in Semiconductor industry with Thirteen years in Cadence Design Systems. Have worked in the R&D of HDL Simulation tools and Virtuoso platform. Highly experienced in developing Software for Engineering Applications in addition to EDA tools. Proficient in C,C++, Perl, TCL-Tk languages as well as HDLs like VHDL, Verilog & SystemVerilog.• Devender Khari: o Qualification: M.E. Computer Science from BITS, Pilani and B.Tech in Computer Engineering from Shivaji University. o Experience: More than 11 years of experience in software and EDA industry with 8 years in Cadence Design Systems. Have worked in the R&D of OrCAD suite of tools, Allegro Design Editor and Virtuoso Composer. Expert in developing Software for Engineering applications as well as Web Technology and Mobile based applications. Proficient in C, C++, PHP, .NET and JAVA Languages. 5/10
  6. 6. • Chandrakant Sakharwade: o Qualification: M.Tech. in Advanced Electronics from IIT Chennai (1978) and B.Tech. in Electronics & Communication Engineering from Visvesvaraya Regional College of Engineering (1976) o Experience: More than 31 years of professional experience. Have worked as Engineering Manager with increasingly responsible positions in Engineering Design, Project Management and Engineering Management in Telecom, Embedded Systems, Electronic Component Databases (Content), and Electronic Design Automation (EDA) and Product Engineering Services domains. Applied engineering principles for successful development of multiple products and content. Have worked at Patni Computer Systems, Cadence Design Systems, Aspect Development, C-DOT & Tata Institute of Fundamental Research. • Ajay Sharma: o Qualification: M.Sc. In Electronic Science from Electronic Science Department, Kurukshetra University(2003) o Experience: 6+ years of Research Experience in the field of ASIC Design. Spent 3 years in research on Smart Sensor ASICs at SRL, University of Warwick, UK. Contributed in the whole flow from Circuit Design to Tapeout. Handled MIT (Ministry of Information Technology) initiative project, SMDP-II, at NIT, Jalandhar for year and a half. Played an instrumental role in taking designs from Circuit to Layout. Guided Masters and Bachelors Projects. • Amitav Banerjee: o Qualification: B.Tech. In Information Technology from UPTU (2010), Mentor Graphics Certification in Electronic Design & Verification using SystemVerilog (2010) o Experience: Started his career at DKOP Labs as Software Engineer. Handling multiple projects in Web Technology and Systems Programming using C, PHP, .NET, MySQL. INDUSTRY PARTNERSHIPSCADENCE DESIGN SYSTEMS DKOP is Certified Training Partner of Cadence for whole of North IndiaMENTOR GRAPHICS CORPORATION DKOP is Vanguard Partner and HEP (Higher Education Program) Partner of Mentor Graphics Corporation. 6/10
  7. 7. AGNISYS DKOP is Spark Higher Education Program partner of Agnisys. DKOP students are given live projects from Agnisys to work and deliver in tight deadlines. DKOP PLACEMENTSCompanies where we have placed our studentsST MICROELECTRONICS, GREATER NOIDA Kavita Sharma, Banasthali VidyapeethCADENCE DESIGN SYSTEMS, NOIDA Sorabh Dung, LIT, Lovely Professional University Ruchi Mittal, CDAC Rachna Raj, Banasthali University Saloni Goel, Banasthali University Sachin Kumar, LIT, Lovely Professional University Jupinder Kaur, LIT, Lovely Professional University Manvi Goel, Banasthali University Balveer Singh Koranga, GB Pant Engineering College, Pauri, UttaranchalMENTOR GRAPHICS, NOIDA Vikas Tomar, ITM, Gurgaon Jitendra Aggarwal, Amity University, NoidaAGNISYS, NOIDA Sandeep Thakur, Lovely Professional University Amit Kapoor, SSIET, Dera Bassi Nitin Ahuja, BSAITM, FaridabadNSYS, DELHI Nidhi Gupta, M.P.C.T., Gwalior Prishkrit Abrol, DAVIET, Jalandhar 7/10
  8. 8. Pankaj Talwar, LCET, Ludhiana Richa, Banasthali University Mamta Rana, Jiwaji UniversityCIRCUITSUTRA TECHNOLOGIES, NOIDA Parvinder Pal Singh, Lovely Professional UniversityDKOP LABS, NOIDA Rahul Kumar, Rai University Pushpinder Singh, SVIET – Banud Amitav Banerjee, UPTURF SILICON, NOIDA Nirmal Singh, UPTUHP, BANGALORE Hariom Pandey, UPTUSASKEN, BANGALORE Sumit Gupta, Thapar - Patiala Sumit Kumar, Thapar - PatialaPHOENIX, NOIDA Akhilesh Singh, Jiwaji UniversityRELIANCE, PUNE Ajay Gupta, Jiwaji UniversityOM NANOTECHNOLOGY, GREATER NOIDA Mohammed Sharique, Jiwaji UniversityUNIVERSITIES IN USA, CANADA & GERMANY Smriti Gurung Subeg Singh Binipal Wadhwa 8/10
  9. 9. Hasan KarkaraNote: Our competitors also hire our graduates! RECOMMENDATIONS 1. Mr Jitin Sahni Manager, HR & Recruitment Freescale Semiconductors, Noida 2. Mr. Harish Pandey Marketing Head AMDL, Bangalore 3. Mr. Upender Bhati Marketing Head AEM India Pvt. Ltd., Noida 4. Mr Anupam Bakshi CEO, AgniSys Noida 5. Mr Umesh Sisodia CEO, CircuitSutra Technologies Pvt Ltd Noida 6. Mr Sanjay Chakravarty VP, ITAAS Inc Noida 7. Prof Dinesh Sarbahi HOD, Electronics & Communication VIET, Dadri 8. Dr. S.N. Saran Director GNIT, Greater Noida DKOP TOUCHED FOLLOWING COLLEGESWe have conducted on-campus programs (Workshops/Trainings/Conferences) at following colleges: 1. LOVELY PROFESSIONAL UNIVERSITY, PHAGWARA 2. GREATER NOIDA INSTITUTE OF TECHNOLOGY, GREATER NOIDA 3. NIT, JALANDHAR 4. VISHWESHVARYA INSTITUTE OF ENGINEERING & TECHNOLOGY, DADRI 5. LIET ( LAXMI DEVI INSTITUTE OF ENGINEERING & TECHNOLOGY), ALWAR 6. SHEKHAWATI ENGINEERING COLLEGE 7. ST. MARGARET ENGG. COLLEGE, NEEMRANA 8. ITM, BHILWARA 9. YMCA, FARIDABAD 9/10
  10. 10. 10. BANASTHALI VIDYAPITH11. CHITKARA INSTITUTE OF ENGG & TECH, RAJPURA12. DAV INSTITUTE OF ENGG & TECH, JALANDHAR13. KUMAON ENGINEERING COLLEGE, DWARAHAT14. GB PANT ENGG COLLEGE, PAURI15. INSTITUTE OF TECHNOLOGY, PANTNAGAR16. SACHDEVA COLLEGE OF ENGG, MATHURA17. COLLEGE OF ENGG, ROORKEE18. JSS, NOIDA19. JIIT, NOIDA20. BS ANANGPURIA, FARIDABAD21. GRAPHICS ERA UNIVERSITY, DEHRADUN22. MITRC, ALWAR23. SIDDHI VINAYAK, ALWAR24. NC COLLEGE OF ENGG, PANIPAT25. BITS, BHIWANI26. SRI SUKHMANI INSTITUTE, DERABASSI27. SVIET, BANUD28. LUDHIANA COLLEGE OF ENGG & TECH29. DESHBHAGAT ENGG COLLEGE30. SSIET, PATTI31. RAI UNIVERSITY, FARIDABAD32. COLLEGE OF ENGG & TECH, KAPURTHALA33. RIET, JAIPUR34. ITS, GREATER NOIDA 10/10

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