Mos and cmos technology

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Mos and cmos technology

  1. 1. MOS AND CMOSTECHNOLOGIES Dr. C. Saritha Lecturer in Electronics SSBN Degree & PG College ANANTAPUR
  2. 2. OVERVIEW:- Introduction. MOS (Metal-oxide semiconductor). CMOS (Complimentary metal- oxide semiconductor). Advantages. Characteristics.
  3. 3. INTRODUCTION:- The field-effect transistor (FET) is a unipolar transistor. There are two types of field-effect transistors. There are junction field-effect transistor (JFET) and metal oxide semi-conductor (MOS).
  4. 4.  Metal gate has been replaced by polysilicon or poly in modern technologies. There are two types of MOS transistors: nMOS : Negatively doped silicon, rich in electrons. pMOS : Positively doped silicon, rich in holes.
  5. 5.  CMOS:- Both type of transistors are used to construct any gate. The former is used in linear circuits and the latter in digital circuits. MOS transistors can be fabricated less area than bipolar-transistors
  6. 6. Basic structure of MOS transistor
  7. 7.  P-channel MOS consists of a lightly doped substrate of n-type silicon material. Two regions are heavily doped by diffusion with p-type impurities to form the source and drain. The region between the two p-type sections serves as the channel.
  8. 8.  As the magnitude of the gate negative voltage on the gate increases, the region below the gate accumulates more positive carriers. The conductivity increases, and current can flow source to drain. Provide a voltage difference between these two terminals.
  9. 9.  The mode of operation can be enhancement or depletion, depends on the state of the channel region at There are four basic MOS structures. The channel can be a p-type or n-type ,depending on whether the majority carriers are holes or electrons. The mode of operation can zero voltage.
  10. 10.  If the channel is initially doped lightly with p-type impurity, a conducting channel exits at zero gate voltage and the device is said to operate in the depletion mode. In this mode current flows unless the channel is depleted by an applied gate field.
  11. 11.  If the region beneath the gate is left initially uncharged, a channel must be indused by the gate field before current can flow. Thus, the channel current is enhanced by the gate voltage and such a device is said to operate in the enhancement mode.
  12. 12.  P-channel:- The source is the terminal through which the majority carriers enter the bar. The drain is the terminal through which majority carriers leave the bar. When the gate voltage is above threshold voltage (about -2v),no current flows in the channel.
  13. 13.  P-type carriers are positive and correspond to a positive current flow from source to drain. N-channel:- In the channel MOS, the source terminal is connected to the substrate and a positive voltage is applied to the drain terminal.
  14. 14.  When the gate voltage is below the threshold voltage (about 2v). N-type carriers flow from source to drain. N-type carriers are negative, which corresponds to a positive current flow from drain to source.
  15. 15. Graphical symbols for MOStransistor:-
  16. 16.  The symbol for the enhancement type is the one with the broken-line connection between source and drain. Source to drain is the p-channel. And the drain to source is the n-channel.
  17. 17. N-channel MOS logic circuitsusing NAND gate:
  18. 18.  Working:- NAND gate uses transistor in series. The inputs A and B both high for all transistors to conduct and cause the output go low. If either input is low ,the corresponding transistor is turned off and the output is high.
  19. 19. Advantages :- The enhancement type MOS devices have been used as micro-resistors in integrated microcircuits. It is easier to fabricate MOSFET. It is widely used than JFET. The enhancement type MOSFET finds wide application in digital circuitary.
  20. 20. Complimentary mos CMOS:- Complimentary MOS (CMOS) circuits take advantage of the fact that both p-channel and n-channel devices can be fabricated on the same substrate. CMOS circuits consist of both types of MOS devices, interconnected to form logic functions.
  21. 21. CMOS LOGIC CIRCUITUSING NAND GATE:
  22. 22.  The output has low impudence to ground and produces a low state. If any input is low: The n-channel transistor is turn off and the associated p-channel transistor s is turned on. The output is coupled to VDD and goes to the high state.
  23. 23.  WORKING:- A two input NAND gate consists of two p- type units in parallel and two n-type units in series. If all inputs are high:- If all inputs are high,both p-channel transistors turn off and both n-channel
  24. 24.  Multiple- input NAND gates may be formed by placing equal number of p-type transistors and n-type transistors in parallel and series, respectively.
  25. 25.  CMOS CHARACTERISTICS:- Power dissipation is very low 0.01mw. The propagation delay time 5v ranges from 5 to 20ns. Higher fan-out. Good noise immunity. The noise margin is usually about 40 percent of the power supply voltage.
  26. 26. THANK YOU

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