Digital control systems


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Digital control systems

  1. 1. CHAPTER (6) Digital control systemsObjectives:This chapter will consider digital control loops including Interfacing with digitalcontroller, analog to digital circuits, digital to analog circuits, and digitalcontrollers. After you have read this chapter, you should be able to • Describe the digital control loop elements • Compare between analog and digital control loops • Describe A/D and D/A circuits • Identify the major components of a PLC and describe their functions • Read a basic ladder logic diagram and statement list • Describe the operation of timers and counters - 136 -
  2. 2. Digital control systems‫ــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــ‬6.1 Introduction to digital control systemsAs computers have become more reliable and miniaturized, they have taken over thecontroller function. Once analog controller is replaced by a digital one, we gain the followingadvantages: • Hardware is replaced by software, which is costly-effective • Complex function can be implemented in software so easily rather then hardware • Reliability in implementation, that means, you can simply modify the control function in software without extra cost. • Computers can be used in data logging (monitoring), supervisory control and can control multiple loop simultaneously as the computers are well fast.Digital controllers could take one of the forms: • A computer or simply microprocessor board. Microprocessors are developed in the early 1970s as a large scale integration of digital integrated circuits. Once they have developed and started to be manufactured commercially, digital controller are developed. • Microcontroller is a microprocessor system on chip as a single integrated circuit. It can be used in embedded control applications such as TV, mobile phones, Air conditioner, Video Camera, Hard disk controllers, Robots, Smart car manufacturing, ...etc. It is a digital controller that can be used for a limited number of inputs and outputs in process control applications. • Programmable logic controller (PLCs). This type of controller can handle a very large number (as hundreds or thousands) of digital inputs and outputs in industrial control applications. It has a standard interfaces with the field measurements in the industry. Therefore, it has increasing attention to replace old relay logic control cabinets in the industry by PLC developments. Analog input to the process Digital word n-bits DAC Actuator Set point Digital controller Process ADC Measurement Digital word n-bits Analog signal From the process Figure 6.1 Digital control system - 137 -
  3. 3. Digital control systems‫ــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــ‬Digital control system consists of (see figure 6.1): • Digital controller (computer, or microcontroller, or PLC) • ADC, Analog to digital converter • DAC, Digital to analog converterConnecting digital circuitry to sensor devices is simple if the sensor devices are digitalinherently themselves. Switches, relays, and encoders are easily interfaced with gate circuitsdue to the on/off nature of their signals. However, when analog devices are involved,interfacing becomes much more complex. What is needed is a way to electronically translateanalog signals into digital (binary) quantities, and visa-versa. An analog-to-digital converter,or ADC, performs the former task while a digital-to-analog converter, or DAC, performs thelatter. Error detection and controller action are determined by software. The digital controllerthen provides output directly to the actuator via digital representation, which is converted tothe analog voltage by the DAC.An ADC inputs an analog electrical signal such as voltage or current and outputs a binarynumber. In block diagram form, it can be represented as such: A DAC, on the other hand,inputs a binary number and outputs an analog voltage or current signal. Together, they areoften used in digital systems to provide complete interface with analog sensors and outputdevices for control systems such as those used in automotive engine controls: Figure 6.2 Computer control interface systemSince a digital controller is like a computer, it stores information in the form of ones andzeros, referred to as binary digits (bits). Sometimes binary digits are used individually andsometimes they are used to represent numerical values (See Appendix B to review the numbersystems). - 138 -
  4. 4. Digital control systems‫ــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــ‬6.2 Bases of ADCThe analog signal is a continuous representation of a signal, that it takes different values withtime. Digital signals have two values only or two level corresponding to logic 1 and logic zeroas shown in figure 6.3 Figure 6.3 ADC operationsThe ADC requires three operations in sequence: 1- Sampling, we need to sample the analog signal at a constant rate. The sampler could be an electronic switch. The critical question is how to select the sampling frequency. 2- Holding, that holds the sample in during the sampling period until a new sample is captured. This is necessary to convert a constant value into digital word 3- ADC, it is often sequential circuit that takes a considerable time to convert the holding sample into digital word. Different types of these circuits will be shown in section 6.4.While, DAC requires two operations in sequence: 1- DAC, different circuits are given in section 6.3. DAC circuits are, generally, faster than ADC ones and easier in implementation. Therefore, we will begin with DAC circuitry and then move to ADC circuitry in the next sections. 2- Holding, it is very difficult to apply the discrete signal that outputs from DAC directly to an analog process. It will excite the system and fatigue the actuator. Therefore, holding these samples makes them in a continuous form (stepping levels).6.2.1 Sampling and holding processThe basic concept of the sample and hold circuit is shown in figure Digital word Analog input FET - (n-bit) signal ADC + C Voltage follower Sample and hold voltage Figure 6.4 Sample and hold circuit S/H - 139 -
  5. 5. Digital control systems‫ــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــ‬The sample and hold is connected to the input of ADC. When the electronic switch (FETtransistor) is closed the capacitor voltage will track the input voltage. T some time, when aconversion of the input signal is desired, the electronic switch is opened, isolating thecapacitor from the input signal. Thus, the capacitor will hold (be charged) to the voltage whenthe switch was closed. The voltage follower allows this voltage to be impressed upon theADC input, but the capacitor does not discharge because of very high input impedance of thefollower. The start convert is then is then issued, and the conversion proceeds with the inputvoltage remaining constant from the capacitor. When the conversion is complete theelectronic switch is reclosed to capture a new sample and the above sequence is repeated.6.2.2 Selection of sampling frequencyWhen the sample period is too long (too slow), substantial details of the analog signal will bemissed. Notice how, especially in the latter portions of the analog signal, the digital outpututterly fails to reproduce the true shape. Even in the first section of the analog waveform, thedigital reproduction deviates substantially from the true shape of the wave. It is imperativethat an ADCs sample time is fast enough to capture essential changes in the analogwaveform. In data acquisition terminology, the highest-frequency waveform that an ADC cantheoretically capture is the so-called Nyquist frequency, equal to one-half of the ADCs samplefrequency. Therefore, if an ADC circuit has a sample frequency of 5000 Hz, the highest-frequency waveform it can successfully resolve will be the Nyquist frequency of 2500 Hz. Ifan ADC is subjected to an analog input signal whose frequency exceeds the Nyquistfrequency for that ADC, the converter will output a digitized signal of falsely low frequency.This phenomenon is known as aliasing. Observe the following illustration to see how aliasingoccurs. Figure 6.5 Aliasing PhenomenonIn the above figure, note how the period of the output waveform is much longer (slower) thanthat of the input waveform, and how the two waveform shapes arent even similar. Therefore,to preserve the information of the input analog signal and to be able to recover it again, thesampling frequency fs must verify the condition (Nyquist criterion) fs > 2 fB (6.1)The theoretical limit is fs=2fB, where fB is the frequency bandwidth of the controlled process.In practice, a higher sampling frequency must be chosen as fs = (6 to 25) fB (6.2) - 140 -
  6. 6. Digital control systems‫ــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــ‬The following figure illustrates the effect of sampling frequency on the spectrum of sampledsignal. Case 1: fs > 2 fB fs 2fs 3fs Case 2: fs < 2 fB (Aliasing) fs 2fs 3fs Figure 6.6 Spectrum of sampled signalIn the above figure, we have two cases for the same process that have a frequency bandwidthfB. Case1 corresponds to a good selection of the sampling frequency using equation 6.1, whilecase 2 corresponds to appearance of distortions (overlapping phenomenon of aliasing). Inorder to avoid the folding (aliasing) of the spectrum and thus of the distortions, the analogmeasurement signals must be filtered prior to sampling to eliminate high noise frequencies.Remarks 1- Frequency bandwidth for first order system is fB=1/(2π τ), where τ is the time constant 2- The system bandwidth frequency is not the only limit to select the sampling frequency, there is also other constraints due to time consideration in ADC, DAC, and microprocessor that executes the control program. In general, the sampling period has to be large enough for timing consideration and also to respect the condition in equation (6.1) to avoid aliasing effect. Finally, the sampling period Ts can be computed using the following equation 1/(2 fB) > Ts > (TADC + Tµp +TDAC) (6.3) Where TADC = conversion time of Analog to digital converter TDAC = conversion time of digital to analog converter (very small) Tµp = Execution time of the control program in microprocessor, it depends the speed of microprocessorExample: Consider a second order system with wo=1 (natural frequency) and ζ=0.7 (dampingfactor). Calculate the sampling frequency.SolutionIt is clear that the bandwidth frequency fB is fB= (wo/2π) HzThe practical rule to choose the sampling frequency fs is different than the theoretical limit inequation (6.1), it can be chosen according to fs = (6 to 25) fB ≈ 10 fB = (10/2π) Hz - 141 -
  7. 7. Digital control systems‫ــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــ‬6.3 Digital to Analog Circuits (DAC)6.3.1 The R/2nR DACThis DAC circuit, otherwise known as the binary-weighted-input DAC, is a variation on theinverting summer op-amp circuit. If you recall, the classic inverting summer circuit is anoperational amplifier using negative feedback for controlled gain, with several voltage inputsand one voltage output. The output voltage is the inverted (opposite polarity) sum of all inputvoltages: Figure 6.7 R/2n R DACFor a simple inverting summer circuit, all resistors must be of equal value. If any of the inputresistors were different, the input voltages would have different degrees of effect on theoutput, and the output voltage would not be a true sum. Lets consider, however, intentionallysetting the input resistors at different values. Suppose we were to set the input resistor valuesat multiple powers of two: R, 2R, and 4R, instead of all the same value R.Starting from V1 and going through V3, this would give each input voltage exactly half theeffect on the output as the voltage before it. In other words, input voltage V1 has a 1:1 effecton the output voltage (gain of 1), while input voltage V2 has half that much effect on theoutput (a gain of 1/2), and V3 half of that (a gain of 1/4). These ratios are not arbitrarilychosen: they are the same ratios corresponding to place weights in the binary numerationsystem. If we drive the inputs of this circuit with digital gates so that each input is either 0volts or full supply voltage, the output voltage will be an analog representation of the binaryvalue of these three bits. Figure 6.8 weighted resistors DAC - 142 -
  8. 8. Digital control systems‫ــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــ‬If we chart the output voltages for all eight combinations of binary bits (000 through 111)input to this circuit, we will get the following progression of voltages: Table 6.1 Three-bit DAC output Binary Output Voltage 000 0.00 V 001 -1.25 V 010 -2.5 V 011 -3.75 V 100 -5 V 101 -6.25 V 110 -7.5 V 111 -8.75 VNote that with each step in the binary count sequence, there results a 1.25 volt change in theoutput. If we wish to expand the resolution of this DAC (add more bits to the input), all weneed to do is add more input resistors, holding to the same power-of-two sequence of values: Figure 6.9 Weighted resistors 6-bit DACIt should be noted that all logic gates must output exactly the same voltages when in the"high" state. If one gate is outputting +5.02 volts for a "high" while another is outputting only+4.86 volts, the analog output of the DAC will be adversely affected. Likewise, all "low"voltage levels should be identical between gates, ideally 0.00 volts exactly. It is recommendedthat CMOS output gates are used, and that input/feedback resistor values are chosen so as tominimize the amount of current each gate has to source or sink. - 143 -
  9. 9. Digital control systems‫ــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــ‬6.3.2 The R-2R DACAn alternative to the binary-weighted-input DAC is the so-called R/2R DAC, which usesfewer unique resistor values. A disadvantage of the former DAC design was its requirementof several different precise input resistor values: one unique value per binary input bit. Thereis, however, a more efficient design methodology. By constructing a different kind of resistornetwork on the input of our summing circuit, we can achieve the same kind of binaryweighting with only two kinds of resistor values, and with only a modest increase in resistorcount. This "ladder" network looks like this: Figure 6.10 R-2R DACMathematically analyzing this ladder network is a bit more complex than for the previouscircuit, where each input resistor provided an easily-calculated gain for that bit. To find theinput-output relationship of this circuit, you can apply Thevenins theorem for each binaryinput (remember to consider the effects of the virtual ground), then apply the superpositiontheorem (output is equal to the sum of all individual response of each bit) to obtain the globalresponse of the circuit. Finally, you should obtain the same table as in weighted resistor case(see table 6.1). As was the case with the binary-weighted DAC design, we can modify thevalue of the feedback resistor to obtain any "span" desired. For example, if were using +5volts for a "high" voltage level and 0 volts for a "low" voltage level, we can obtain an analogoutput directly corresponding to the binary input (011 = -3 volts, 101 = -5 volts, 111 = -7volts, etc.) by using a feedback resistance with a value of 1.6R instead of 2R.In general, the output of the DAC can be defined as a scaling of some reference voltage whereeach digital input is either VR volt (logic one) or 0 volt (logic 0). Therefore, the output isgiven by: [ Vout = VR b1 2-1 + b 2 2 -2 + ... + b n 2 -n ] (6.4)Where Vout = analog voltage output VR = Reference voltage b1, b2, …,bn = n-bit binary word in 1s and 0s b1 is the MSB bn is the LSBNote that, the smallest possible change ∆Vout in the analog output is simply given by - 144 -
  10. 10. Digital control systems‫ــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــ‬ ∆Vout = VR 2 -n (6.5)For any given number in decimal N equivalent to a digital word, we find the output as N Vout = VR  n  2  (6.6)ExampleDetermine the number of bits a DAC converter must have to provide output increments of0.04 volts or less. The reference is 10 volts.SolutionBy solving the following equation, the number of required bits n can be determined ∆Vout =0.04 =10 (2-n) log (0.04) = log 10 – n log 2 n= (log 10 – log 0.04)/log 2 n= 7.966Thus, n= 8 bits will be satisfactory. This can be verified by calculating again the smallestoutput variation ∆Vout =10 (2-8) = 0.0390625 voltsExampleWhat is the output voltage of a 10-bit ADC with a 10 volt reference if the input isa) (0010110101)2=0B5Hb) 20FHWhat input is needed to get a 6.5 volt output?Solutiona) using equation 6.4 Vout = 10[2-3 + 2-5 + 2-6 + 2-8 + 2-10]= 10[0.1767578]=1.767578 voltsb) we have 20FH=52710 and 210 =1024, so Vout = (527/1024) 10 = 5.14648 voltsc) using equation 6.6 N= 1024 (6.5/10) = 665.6 ≈ 666 = 29AH in hexadecimal - 145 -
  11. 11. Digital control systems‫ــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــ‬6.4 Analog to Digital Circuits (ADC)6.4.1 Digital ramp ADCAlso known as the stair-step ramp, or simply counter A/D converter, this is also fairly easy tounderstand but unfortunately suffers from several limitations. The basic idea is to connect theoutput of a free-running binary counter to the input of a DAC, then compare the analog outputof the DAC with the analog input signal to be digitized and use the comparators output to tellthe counter when to stop counting and reset. The following schematic shows the basic idea: Figure 6.11 Digital ramp ADCAs the counter counts up with each clock pulse, the DAC outputs a slightly higher (morepositive) voltage Vo. This voltage is compared against the input voltage Vin by thecomparator. If the input voltage is greater than the DAC output, the comparators output willbe high (flag = logic 1 as digital output) and the counter will continue counting normally.Eventually, though, the DAC output will exceed the input voltage, causing the comparatorsoutput to go low (flag = logic zero as digital output). This will cause two things to happen:first, the high-to-low transition of the comparators output will cause the shift register to"load" whatever binary count is being output by the counter, thus updating the ADC circuitsoutput; secondly, the counter will receive a low signal on the active-low LOAD input, causingit to reset to 00000000 on the next clock pulse. The effect of this circuit is to produce a DACoutput that ramps up to whatever level the analog input signal is at, output the binary numbercorresponding to that level, and start over again.The fact that the circuits need to count all the way from 0 at the beginning of each countcycle makes for relatively slow sampling of the analog signal, places the digital-ramp ADC ata disadvantage to other counter strategies. Notice that the maximum allowed count rate isdetermined by the sum of the DAC settling time tdA , the comparator settling time tcom, andthe logic reaction time tL. The latter is usually negligible at all but the ultimate speeds. Theconverter is obviously slow, taking a maximum of 2n clock cycles to convert to n bits. The nconversion time is also variable - which can be a disadvantage. The maximum conversion rateis given by: 1 f max = (6.7) t dA + t com + t L - 146 -
  12. 12. Digital control systems‫ــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــ‬6.4.2 Successive approximation ADCThis circuit uses a very special counter known as a successive-approximation register (SAR).This register counts by trying all values of bits starting with the MSB and finishing at theLSB, instead of counting up in binary sequence. Throughout the count process, the registermonitors the comparators output to see if the binary count is less than or greater than theanalog signal input, adjusting the bit values accordingly to 1 or 0 value. The way the registercounts is identical to the "trial-and-fit" method of decimal-to-binary conversion, wherebydifferent values of bits are tried from MSB to LSB to get a binary number that equals theoriginal decimal number. The advantage to this counting strategy is much faster than theprevious circuit of digital ramp ASC. Without showing the inner workings of the successive-approximation register (SAR), the circuit looks like this: Figure 6.12 Successive approximation ADCThe advantage of this process is that it produces a result in a defined length of time, n cyclesfor an n-bit converter, and that this time is much smaller than the counting algorithm since2n>> n. The disadvantage is that if the value to be measured changes during the measurementperiod, then the result can be wrong. "Successive approximation" converters are by far themost popular converters for microprocessors in circumstances where a small number of bitsof accuracy are required (small # 14). For larger numbers of bits a number of factors combineto make other solutions more attractive.Example: Consider a 4 bit-converter, Vref= 10 V, and the Vin = 7 volt. Find the equivalent binary code using successive approximation technique.SolutionIn 1st clock period, start with the code 1000 that equivalent to DAC of 5V. The comparatoroutput will be 1, that means, the decision is to set this bit, the code is1000.In 2nd clock period, set next bit to 1, that means, the code to be tested is 1100, which isequivalent to 7.5 volt, the comparator output will be 0, that means, the decision is to reset thisbit, the code is 1000.In 3rd clock period, set next bit to 1, that means, the code to be tested is 1010, which isequivalent to 8.75 volt, the comparator output will be 0, that means, the decision is to resetthis bit, the code is 1000.In 4th clock period, set next bit to 1, that means, the code to be tested is 1001, which isequivalent to 6.875 volt, the comparator output will be 1, that means, the decision is to set thisbit, the code is 1001. This is final code after four clock pulses (conversion time) is 1001. - 147 -
  13. 13. Digital control systems‫ــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــ‬6.4.3 Tracking ADCInstead of a regular "up" counter driving the DAC, this circuit uses an up/down counter. Thecounter is continuously clocked, and the up/down control line is driven by the output of thecomparator. So, when the analog input signal exceeds the DAC output, the counter goes intothe "count up" mode. When the DAC output exceeds the analog input, the counter switchesinto the "count down" mode. Either way, the DAC output always counts in the properdirection to track the input signal. Figure 6.13 Tracking ADCNotice how no shift register is needed to buffer the binary count at the end of a cycle. Sincethe counters output continuously tracks the input (rather than counting to meet the input andthen resetting back to zero), the binary output is updated with every clock pulse. Anadvantage of this converter circuit is speed, since the counter never has to reset.Note the much faster update time than any of the other "counting" ADC circuits. Also notehow at the very beginning of the plot where the counter had to "catch up" with the analogsignal, the rate of change for the output was identical to that of the first counting ADC. Also,with no shift register in this circuit, the binary output would actually ramp up rather than jumpfrom zero to an accurate count as it did with the counter and successive approximation ADCcircuits. Perhaps the greatest drawback to this ADC design is the fact that the binary output isnever stable: it always switches between counts with every clock pulse, even with a perfectlystable analog input signal. This phenomenon is informally known as bit bobble, and it can beproblematic in some digital systems. This tendency can be overcome, though, through thecreative use of a shift register. For example, the counters output may be latched through aparallel-in/parallel-out shift register only when the output changes by two or more steps.Building a circuit to detect two or more successive counts in the same direction takes a littleingenuity, but is worth the effort. - 148 -
  14. 14. Digital control systems‫ــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــ‬6.4.4 Dual-Slope ADCIt is possible to avoid using a DAC if we substitute an analog ramping circuit and a digitalcounter with precise timing. This is the basic idea behind the so-called integrating ADC.Consider the following circuit, in operation the integrator is first zeroed (close SW2 for shorttime), then attached to the input (SW1 up) for a fixed time M counts of the clock (frequency1/t). At the end of that time it is attached to the reference voltage (SW1 down), a digitalcounter has start to count (start of conversion), and the number of counts N which accumulatebefore the integrator reaches zero volts output and the comparator output changes aredetermined to signal to the logic circuit that is not shown in the figure, that end of conversionis reached. Figure 6.14 Dual-Slope ADC Figure 6.15 Timing diagram of Dual-Slope ADCThe equations of operation are therefore: Vin (Mt) Vref (Nt) Vx = = RC RC Vin = Vref (N/M) (6.8)The unknown voltage is then just Vref (N/M) and is reasonably independent of everythingelse. The main problem with a simple dual slope ADC is in returning the converter to an exactzero before the start of each conversion as interpreted by an imperfect comparator. - 149 -
  15. 15. Digital control systems‫ــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــ‬6.4.5 Voltage-to-Frequency ADCThe voltage-to-frequency converter uses a linear voltage controlled oscillator to produce afrequency output. Figure 6.16 Voltage to frequency ADCConsider a simple integrating system with a switched current source as shown here. If everytime the comparator "flips" we switch on the current source I for a time t and drain a charge(It) from the capacitor, the total charge collected in a time T is given by: T Vin V Q=∫ dt = in T = N I t 0 R R (6.9)Where N = number of discharges in the integration time T Vin = average voltage inputThe average frequency is therefore, N  1  f = =  Vin ∝ Vin (6.10) T  RIt Therefore, we can easily recover the voltage by counting the output of the system for a fixedtime T as shown in figure. Figure 6.17 Counting a simple V-f outputV-f converters are normally limited in output frequency to about 100kHz which imposes alimit of 1:105 in resolution (0.001%) for a one second measurement which is stillinconveniently long. - 150 -
  16. 16. Digital control systems‫ــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــ‬6.4.6 Delta-Sigma (∆Σ) ADCOne of the more advanced ADC technologies is the so-called delta-sigma, or ∆Σ (using theproper Greek letter notation). In mathematics and physics, the capital Greek letter delta (∆)represents difference or change, while the capital letter sigma (Σ) represents summation: theadding of multiple terms together. Sometimes this converter is referred to by the same Greekletters in reverse order: sigma-delta, or Σ∆. In a ∆Σ converter, the analog input voltage signalis connected to the input of an integrator, producing a voltage rate-of-change, or slope, at theoutput corresponding to input magnitude. This ramping voltage is then compared againstground potential (0 volts) by a comparator. The comparator acts as a sort of 1-bit ADC,producing 1 bit of output ("high" or "low") depending on whether the integrator output ispositive or negative. The comparators output is then latched through a D-type flip-flopclocked at a high frequency, and fed back to another input channel on the integrator, to drivethe integrator in the direction of a 0 volt output. The basic circuit looks like this: Figure 6.18 Delta-Sigma (∆Σ) ADCThe leftmost op-amp is the (summing) integrator. The next op-amp the integrator feeds into isthe comparator, or 1-bit ADC. Next, the D-type flip-flop comes, which latches thecomparators output at every clock pulse, sending either a "high" or "low" signal to the nextcomparator at the top of the circuit. This final comparator is necessary to convert the single-polarity 0V / 5V logic level output voltage of the flip-flop into a +V / -V voltage signal to befed back to the integrator. If the integrator output is positive, the first comparator will output a"high" signal to the D input of the flip-flop. At the next clock pulse, this "high" signal will beoutput from the Q line into the non-inverting input of the last comparator. This lastcomparator, seeing an input voltage greater than the threshold voltage of 1/2 +V, saturates ina positive direction, sending a full +V signal to the other input of the integrator. This +Vfeedback signal tends to drive the integrator output in a negative direction. If that outputvoltage ever becomes negative, the feedback loop will send a corrective signal (-V) backaround to the top input of the integrator to drive it in a positive direction. This is the delta-sigma concept in action: the first comparator senses a difference (∆) between the integratoroutput and zero volts. The integrator sums (Σ) the comparators output with the analog inputsignal. Functionally, this results in a serial stream of bits output by the flip-flop. If the analoginput is zero volts, the integrator will have no tendency to ramp either positive or negative,except in response to the feedback voltage. In this scenario, the flip-flop output will - 151 -
  17. 17. Digital control systems‫ــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــ‬continually oscillate between "high" and "low," as the feedback system "hunts" back andforth, trying to maintain the integrator output at zero volts: Figure 6.19 Delta-Sigma (∆Σ) ADC with zero voltage inputBy applying a negative analog input signal to the integrator, we force its output to ramp moresteeply in the positive direction. Thus, the feedback system has to output more 1s to bring theintegrator output back to zero volts as shown in figure. Figure 6.20 Delta-Sigma (∆Σ) ADC with negative voltage inputBy applying a positive analog input signal to the integrator, we force its output to ramp moresteeply in the negative direction. Thus, the feedback system has to output more 0s to bring theintegrator output back to zero volts. A parallel binary number output can be obtained fromthis circuit by averaging the serial stream of bits together. For example, a counter circuitcould be designed to collect the total number of 1s output by the flip-flop in a given numberof clock pulses. This count would then be indicative of the analog input voltage. - 152 -
  18. 18. Digital control systems‫ــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــ‬6.4.7 Flash ADCEvery converter has its advantages – and the flash converter, converts in a flash, i.e. very fast.It is a brother to the successive approximation converter but whereas the successiveapproximation converter compares to a "guess" each time, the flash converter compares to allguesses simultaneously and then decides the "best" value from the results. Note that a flashconverter is very extravagant in hardware - but if you have to convert at 10 M samples/Secyou have to give up something! The following figure illustrates a 3-bit flash ADC circuit. Figure 6.21 Flash ADCAlso called the parallel A/D converter, this circuit is the simplest to understand. It is formedof a series of comparators, each one comparing the input signal to a unique reference voltage.The comparator outputs connect to the inputs of a priority encoder circuit, which thenproduces a binary output. Vref is a stable reference voltage provided by a precision voltageregulator as part of the converter circuit, not shown in the schematic. As the analog inputvoltage exceeds the reference voltage at each comparator, the comparator outputs willsequentially saturate to a high state. The priority encoder generates a binary number based onthe highest-order active input, ignoring all other active inputs.Not only is the flash converter the simplest in terms of operational theory, but it is the mostefficient of the ADC technologies in terms of speed, being limited only in comparator andgate propagation delays. Unfortunately, it is the most component-intensive for any givennumber of output bits. This three-bit flash ADC requires eight comparators. A four-bit versionwould require 16 comparators. With each additional output bit, the number of requiredcomparators doubles. Considering that eight bits is generally considered the minimumnecessary for any practical ADC (256 comparators needed!), the flash methodology quicklyshows its weakness in term of number of components. An additional advantage of the flashconverter, often overlooked, is the ability for it to produce a non-linear output. With equal-value resistors in the reference voltage divider network, each successive binary countrepresents the same amount of analog signal increase, providing a proportional response. Forspecial applications, however, the resistor values in the divider network may be made non-equal. This gives the ADC a custom, nonlinear response to the analog input signal. No otherADC design is able to grant this signal-conditioning behavior with just a few componentvalue changes. - 153 -
  19. 19. Digital control systems‫ــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــ‬6.5 Practical considerations of ADC circuitsPerhaps the most important consideration of an ADC is its resolution. Resolution is thenumber of binary bits output by the converter. Because ADC circuits take in an analog signal,which is continuously variable, and resolve it into one of many discrete steps, it is importantto know how many of these steps there are in total.For example, an ADC with a 10-bit output can represent up to 1024 (210) unique conditions ofsignal measurement. Over the range of measurement from 0% to 100%, there will be exactly1024 unique binary numbers output by the converter (from 0000000000 to 1111111111,inclusive). An 11-bit ADC will have twice as many states to its output (2048, or 211),representing twice as many unique conditions of signal measurement between 0% and 100%.Resolution is very important in data acquisition systems (circuits designed to interpret andrecord physical measurements in electronic form).Example:Suppose we were measuring the height of water in a 40-foot tall storage tank using aninstrument with a 10-bit ADC. 0 feet of water in the tank corresponds to 0% of measurement,while 40 feet of water in the tank corresponds to 100% of measurement. Because the ADC isfixed at 10 bits of binary data output, it will interpret any given tank level as one out of 1024possible states. To determine how much physical water level will be represented in each stepof the ADC, we need to divide the 40 feet of measurement span by the number of steps in the0-to-1024 range of possibilities, which is 1023 (one less than 1024). Doing this, we obtain afigure of 0.039101 feet per step. This equates to 0.46921 inches per step, a little less than halfan inch of water level represented for every binary count of the ADC. Figure 6.22 Digital measurement of a tank levelThis step value of 0.039101 feet (0.46921 inches) represents the smallest amount of tank levelchange detectable by the instrument. Admittedly, this is a small amount, less than 0.1% of theoverall measurement span of 40 feet. However, for some applications it may not be fineenough. Suppose we needed this instrument to be able to indicate tank level changes down to - 154 -
  20. 20. Digital control systems‫ــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــ‬one-tenth of an inch. In order to achieve this degree of resolution and still maintain ameasurement span of 40 feet, we would need an instrument with more than ten ADC bits.To determine how many ADC bits are necessary, we need to first determine how many 1/10inch steps there are in 40 feet. The answer to this is 40/(0.1/12), or 4800 steps of 1/10 inchstep in 40 feet. Thus, we need enough bits to provide at least 4800 discrete steps in a binarycounting sequence. 10 bits gave us 1023 steps, and we knew this by calculating 2 to the powerof 10 (210 = 1024) and then subtracting one. Following the same mathematical procedure, wehave (211-1 = 2047, 212-1 = 4095, and 213-1 = 8191). 12 bits falls shy of the amount neededfor 4800 steps, while 13 bits is more than enough. Therefore, we need an instrument with atleast 13 bits of resolution.Another important consideration of ADC circuitry is its sample frequency, or conversion rate.This is simply the speed at which the converter outputs a new binary number. Like resolution,this consideration is linked to the specific application of the ADC. If the converter is beingused to measure slow-changing signals such as level in a water storage tank, it could probablyhave a very slow sample frequency and still perform adequately. Conversely, if it is beingused to digitize an audio frequency signal cycling at several thousand times per second, theconverter needs to be considerably faster.Yet another measure of ADC performance is something called step recovery. This is ameasure of how quickly an ADC changes its output to match a large, sudden change in theanalog input. In some converter technologies especially, step recovery is a serious limitation.One example is the tracking converter, which has a typically fast update period but adisproportionately slow step recovery. An ideal ADC has a great many bits for very fineresolution, samples at lightning-fast speeds, and recovers from steps instantly. It also,unfortunately, doesnt exist in the real world. Of course, any of these traits may be improvedthrough additional circuit complexity, either in terms of increased component count and/orspecial circuit designs made to run at higher clock speeds. Different ADC technologies,though, have different strengths. Here is a summary of them ranked from best to worst:Resolution/complexity ratio: Single-slope integrating, dual-slope integrating, counter,tracking, successive approximation, and flash.Speed: Flash, tracking, successive approximation, single-slope integrating & counter, anddual-slope integrating.Step recovery: Flash, successive-approximation, single-slope integrating & counter, dual-slope integrating, and tracking. The following figure presents a summary for ADCperformance. Figure 6.23 Performance of ADC types - 155 -
  21. 21. Digital control systems‫ــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــ‬6.6 Programmable Logic ControllersMany manufacturing operations are ON/OFF in nature, that is a conveyor or heaters is eitheron or off, a valve is either open or closed, and so on. In the past, these types of discretecontrol functions were often provided by a system of electrical relays wired according to acomplex diagram into what was called a relay logic system. In recent years, computers havealso taken over the operation of such relay logic controllers, known as programmable logiccontrollers (PLCs). Even though originally designed to control discrete state (ON/OFF)systems, they are capable also to control analog control loops. A PLC monitors inputs, makesdecisions based on its program, and controls outputs to automate a process or machine asshown in figure. This section is meant to supply the reader with basic information on thefunctions and configurations of PLCs. Figure 6.24 PLC operation environment6.6.1 Fundamental elements in a PLCTypically a PLC system has five basic elements: • Input modules: 5 V, 24 V, 110 V, 240 V • Output modules: relay type (ac and dc switching), transistor type (dc switching), or triac type (loads with ac power supply) • Central processing module (CPU) + memory • Power supply module • Programming device • Operator interface (optional) Figure 6.25 PLC elements - 156 -
  22. 22. Digital control systems‫ــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــ‬The input module accepts a variety of digital or analog signals from various field devices(sensors) and converts them into a logic signal that can be used by the CPU. The CPU modulemakes decisions and executes control instructions based on program instructions in memory.Output modules convert control instructions from the CPU into a digital or analog signal thatcan be used to control various field devices (actuators). A power supply module is needed toconvert the main a.c. voltage to necessary voltage level for the processor and the circuits inthe input and output modules. A programming device is used to input the desired instructionsin the memory of the processor. These instructions determine what the PLC will do for aspecific input. An operator interface device allows process information to be displayed andnew control parameters to be entered. This module is optional and may be not found in someapplications.Input/output channels provide signal conditioning and isolation functions so that sensors andactuators can often be directly connected to them without the need for other circuitry.Electrical isolation from the external world is usually by means of optoisolators (the termoptocoupler is also often used).There are two common types of mechanical design: • Single box or board type, it is commonly used for small programmable controllers and is supplied as an integral compact package complete with power supply, processor, memory, and input/output units. Typically such a PLC might have 40 input/output points. • Modular and Rack types, it is commonly used a large number of input/output points. The modular type consists of separate modules for power supply, processor, memory, and input/output units. These modules are often mounted on rails within a metal cabinet. The rack type can be used for all sizes of programmable controllers and has the various functional modules packaged in individual modules which can be plugged into sockets in a base rack. (a) Single box type (b) Modular type Figure 6.26 PLC ConfigurationsExamples of functional modules for modular and rack type are: • Extension memory module to be used for large program applications. • Communication module to communicate between different PLCs in network applications. • PID module to control a fast analog input/output control loops • High speed counter module for specific applicationsSince a PLC is a computer, it stores information in the form of On or Off conditions (1 or 0),referred to as binary digits (bits). Sometimes binary digits are used individually andsometimes they are used to represent numerical values. Various number systems are used byPLCs (See Appendix B to review the number systems). - 157 -
  23. 23. Digital control systems‫ــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــ‬ Simple PLC example: Pushbuttons (sensors), in this following figure, connected to PLCinputs, can be used to start and stop a motor connected to a PLC through a motor starter(actuator to deliver high electrical power). Figure 6.27 Application examplePrior to PLCs, many of these control tasks were solved with contactor or relay controls. Thisis often referred to as hardwired control. Circuit diagrams had to be designed, electricalcomponents specified and installed, and wiring lists created. Electricians would then wire thecomponents necessary to perform a specific task. If an error was made, the wires had to bereconnected correctly. A change in function or system expansion required extensivecomponent changes and rewiring. The same, as well as more complex tasks can be done witha PLC. Wiring between devices and relay contacts is done in the PLC program. Hard-wiring,though still required to connect field devices, is less intensive. Modifying the application andcorrecting errors are easier to handle. It is easier to create and change a program in a PLC thanit is to wire and rewire a circuit. Following are just a few of the advantages of PLCs: • Smaller physical size than hard-wire solutions • Easier and faster to make changes (reliability of software) • PLCs have integrated diagnostics and override functions • Diagnostics are centrally available • Applications can be immediately documented • Applications can be duplicated faster and less expensively6.6.2 PLC terminologyThe language of PLCs consists of a commonly used set of terms; many of which are unique toPLCs. In order to understand the ideas and concepts of PLCs, an understanding of these termsis necessary.SensorA sensor is a device that converts a physical condition into an electrical signal for use by thePLC. Sensors are connected to the input of a PLC. A pushbutton is one example of a sensorthat is connected to the PLC input. An electrical signal is sent from the pushbutton to the PLCindicating the condition (open/closed) of the pushbutton contacts. - 158 -
  24. 24. Digital control systems‫ــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــ‬ Figure 6.28 Pushbutton input to PLCActuatorsActuators convert an electrical signal from the PLC into a physical condition. Actuators areconnected to the PLC output. A motor starter is one example of an actuator that is connectedto the PLC output. Depending on the output PLC signal the motor starter will either start orstop the motor. Figure 6.29 Motor starter signal from PLCDiscrete inputA discrete (digital) input is an input that is either in an ON or OFF condition. Pushbuttons,toggle switches, limit switches, proximity switches, and contact closures are examples ofdiscrete sensors which are connected to the PLCs discrete or digital inputs. In the ONcondition a discrete input may be referred to as logic 1 or logic high. In the OFF condition adiscrete input may be referred to as logic 0 or logic low. Figure 6.30 Discrete inputs to PLCA Normally Open (NO) pushbutton has a one side of the pushbutton is connected to the firstPLC input. The other side of the pushbutton is connected to a 24 VDC power supply. In theopen state, no voltage is present at the PLC input (OFF condition). When the pushbutton isdepressed (closed), 24 VDC is applied to the PLC input (ON condition). - 159 -
  25. 25. Digital control systems‫ــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــ‬Analog InputsAn analog input is an input signal that has a continuous signal. Typical analog inputs mayvary from 4 to 20 milliamps, or 0 to 10 volts. In the following example, a level transmittermonitors the level of liquid in a tank. Depending on the level transmitter, the signal to thePLC can either increase or decrease as the level increases or decreases. Figure 6.31 Analog level measurement to PLCDiscrete OutputsA discrete output is an output that is either in an ON or OFF condition. Solenoids, contactorcoils, and lamps are examples of actuator devices connected to discrete outputs. Discreteoutputs may also be referred to as digital outputs. In the following example, a lamp can beturned on or off by the PLC output it is connected to. Figure 6.32 Discrete output from PLCAnalog OutputsAn analog output is an output signal that has a continuous signal. The output may be assimple as a 0-10 VDC level that drives an analog meter. Examples of analog meter outputsare speed, weight, and temperature. The output signal may also be used on more complexapplications such as a current-to pneumatic transducer that controls an air-operated flow-control valve. Figure 6.33 Analog output from PLC - 160 -
  26. 26. Digital control systems‫ــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــ‬CPUThe central processor unit (CPU) is a microprocessor system that contains the system memoryand is the PLC decision making unit. The CPU monitors the inputs and makes decisions basedon instructions held in the program memory. The CPU performs relay, counting, timing, datacomparison, and sequential operations. Figure 6.34 CPU of a PLCProgrammingA program consists of one or more instructions that accomplish a task. Programming a PLC issimply constructing a set of instructions. There are several ways to look at a program such asladder logic, statement lists, or function block diagrams.Ladder Logic DiagramLadder logic (LAD) is one programming language used with PLCs. Ladder logic usescomponents that resemble elements used in a line diagram format to describe hard-wiredcontrol. The left vertical line of a ladder logic diagram represents the power or energizedconductor. The output element or instruction represents the neutral or return path of thecircuit. The right vertical line, which represents the return path on a hard-wired control linediagram, is omitted. Ladder logic diagrams are read from left-to-right, top-to-bottom. Rungsare sometimes referred to as networks. A network may have several control elements, but onlyone output coil. Figure 6.35 Ladder logic diagram exampleIn the example shown above I0.0, I0.1 and Q0.0 represent the first instruction combination. Ifinputs I0.0 and I0.1 are energized, output relay Q0.0 energizes. The inputs could be switches,pushbuttons, or contact closures. I0.4, I0.5, and Q1.1 represent the second instructioncombination. If either input I0.4 or I0.5 is energized, output relay Q0.1 energizes. - 161 -
  27. 27. Digital control systems‫ــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــ‬Statement listA statement list (STL) provides another view of a set of instructions. The operation, what is tobe done, is shown on the left. The operand, the item to be operated on by the operation, isshown on the right. A comparison between the statement list shown below, and the ladderlogic shown on the previous page, reveals a similar structure. The set of instructions in thisstatement list perform the same task as the ladder diagram. Figure 6.36 Statement listFunction Block DiagramFunction Block Diagram (FBD) provides another view of a set of instructions. Each functionhas a name to designate its specific task. Functions are indicated by a rectangle. Inputs areshown on the left-hand side of the rectangle and outputs are shown on the right-hand side.The function block diagram shown below performs the same function as shown by the ladderdiagram and statement list. Figure 6.37 Functional block diagramPLC ScanThe PLC program is executed as part of a repetitive process referred to as a scan. A PLC scanstarts with the CPU reading the status of inputs. The application program is executed usingthe status of the inputs. Once the program is completed, the CPU performs internaldiagnostics and communication tasks. The scan cycle ends by updating the outputs and thenstarts over. The cycle time depends on the size of the program, the number of I/Os, and theamount of communication required. - 162 -
  28. 28. Digital control systems‫ــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــ‬SoftwareSoftware is any information in a form that a computer or PLC can use. Software includes theinstructions or programs that direct hardware.HardwareHardware is the actual equipment. The PLC, the programming device, and the connectingcable are examples of hardware.Memory SizeKilo, abbreviated K, normally refers to 1000 units. When talking about computer or PLCmemory, however, 1K means 1024. This is because of the binary number system (210=1024).This can be 1024 bits, 1024 bytes, or 1024 words, depending on memory type.RAMRandom Access Memory (RAM) is memory where data can be directly accessed at anyaddress. Data can be written to and read from RAM. RAM is used as a temporary storagearea. RAM is volatile, meaning that the data stored in RAM will be lost if power is lost. Abattery backup is required to avoid losing data in the event of a power loss.ROMRead Only Memory (ROM) is a type of memory that data can be read from but not written to.This type of memory is used to protect data or programs from accidental erasure. ROMmemory is nonvolatile. This means a user program will not lose data during a loss ofelectrical power. ROM is normally used to store the programs that define the capabilities ofthe PLC.EPROMErasable Programmable Read Only Memory (EPROM) provides some level of securityagainst unauthorized or unwanted changes in a program. EPROMs are designed so that datastored in them can be read, but not easily altered. Changing EPROM data requires a specialeffort. UVEPROMs (ultraviolet erasable programmable read only memory) can only beerased with an ultraviolet light. EEPROM (electronically erasable programmable read onlymemory), can only be erased electronically.FirmwareFirmware is user or application specific software burned into EPROM and delivered as part ofthe hardware. Firmware gives the PLC its basic functionality. Figure 6.38 PLC programming using PC via serial interface - 163 -
  29. 29. Digital control systems‫ــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــ‬In order to create or change a program, the following items are needed: • PLC • Programming Device • Programming Software • Connector CableProgramming DevicesThe program is created using a special programming device and then transferred to the PLCvia a communication cable. This device uses dedicated software for application development.A personal computer (PC) or lab-top, with the dedicated software for applicationdevelopment, can also be used as a programming device. The programming software can berun Off-line or On-line. Offline programming allows the user to edit the ladder diagram andperform a number of maintenance tasks. The PLC does not need to be connected to theprogramming device in this mode. On-line programming requires the PLC to be connected tothe programming device. In this mode program changes are downloaded to the PLC. Inaddition, status of the input/output elements can be monitored. The CPU can be started,stopped, or reset.ForcingForcing is another useful tool in the commissioning of an application. It can be used totemporarily override the input or output status of the application in order to test and debug theprogram. The force function can also be used to override discrete output points. The forcefunction can be used to skip portions of a program by enabling a jump instruction with aforced memory bit.6.6.3 Programming a PLCIn order to understand the instructions a PLC is to carry out, an understanding of the languageis necessary. The language of PLC ladder logic consists of a commonly used set of symbolsthat represent control components and instructions as following.ContactsOne of the most confusing aspects of PLC programming for first-time users is the relationshipbetween the device that controls a status bit and the programming function that uses a statusbit. Two of the most common programming functions are the normally open (NO) contact andthe normally closed (NC) contact. Symbolically, power flows through these contacts whenthey are closed. The normally open contact (NO) is true (closed) when the input or outputstatus bit controlling the contact is 1. The normally closed contact (NC) is true (closed) whenthe input or output status bit controlling the contact is 0. Figure 6.39 Contacts symbol - 164 -
  30. 30. Digital control systems‫ــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــ‬CoilsCoils represent relays that are energized when power flows to them. When a coil is energized,it causes a corresponding output to turn on by changing the state of the status bit controllingthat output to 1. That same output status bit may be used to control normally open andnormally closed contacts elsewhere in the program. Figure 6.40 Coil symbolBoxesBoxes represent various instructions or functions that are executed when power flows to thebox. Typical box functions are timers, counters, and math operations. Figure 6.41 Box symbolThe inputs and outputs are all identified by their addresses, the notation used depending onthe PLC manufacturer. The Mitsubishi or Hitachi series of PLC precedes input elements by anX and output elements by Y. The Siemens series of PLC precedes input elements by I andoutput elements by a Q. The siemens notations will be used in the following examples.Example: AND operationEach rung or network on a ladder represents a logic operation. The following programmingexample demonstrates an AND operation. Two contact closures and one output coil areplaced on network 1. They were assigned addresses I0.0, I0.1, and Q0.0. Note that in thestatement list a new logic operation always begins with a load instruction (LD). In thisexample I0.0 (input 1) and (A in the statement list) I0.1 (input 2) must be true in order foroutput Q0.0 (output 1) to be true. It can also be seen That I0.0 and I0.1 must be true for Q0.0to be true by looking at the function block diagram representation. Figure 6.42 AND operation - 165 -
  31. 31. Digital control systems‫ــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــ‬Example: OR functionIn this example an OR operation is used in network 1. It can be seen that if either input I0.2(input 3) or (O in the statement list) input I0.3 (input 4), or both are true, then output Q0.1(output 2) will be true. Figure 6.43 OR operationTesting a ProgramOnce a program has been written it needs to be tested and debugged. One way this can bedone is to simulate the field inputs with an input switches as shown in figure. The program isfirst downloaded from the programming device to the CPU. The selector switch is placed inthe RUN position. The simulator switches are operated and the resulting indication isobserved on the output status indicator lamps. Figure 6.44 PLC simulation - 166 -
  32. 32. Digital control systems‫ــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــ‬Motor Starter ExampleThe following example involves a motor start and stop circuit. The line diagram illustrateshow a normally open and a normally closed pushbutton might be used in a control circuit. Inthis example a motor started (M) is wired in series with a normally open momentarypushbutton (Start), a normally closed momentary pushbutton (Stop), and the normally closedcontacts of an overload relay (OL). Figure 6.45 Motor start/stop componentsProgram InstructionA normally open Start pushbutton is wired to the first input (I0.0), a normally closed Stoppushbutton is wired to the second input (I0.1), and normally closed overload relay contacts(part of the motor starter) are connected to the third input (I0.2). The first input (I0.0), secondinput (I0.1), and third input (I0.2) form an AND circuit and are used to control normally openprogramming function contacts on Network 1. I0.1 status bit is logic 1 because the normallyclosed (NC) Stop Pushbutton is closed. I0.2 status bit is logic 1 because the normally closed(NC) overload relay (OL) contacts are closed. Output Q0.0 is also programmed on Network 1.In addition, a normally open set of contacts associated with Q0.0 is programmed on Network1 to form an OR circuit. A motor starter is connected to output Q0.0. Figure 6.46 Ladder program in the CPUNote that, momentarily depressing the Start pushbutton completes the path of current flowand energizes the motor starter (M).This closes the associated (auxiliary contact located Asmarker or memory variable in the PLC) contact Q0. When the Start button, the auxiliarycontacts Qo remains closed as the output is energized. The motor will run until the normallyclosed Stop button is depressed, or the overload relay opens the OL contacts, breaking thepath of current flow to the motor starter and opening also its associated contact. - 167 -
  33. 33. Digital control systems‫ــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــ‬6.6.4 TimersTimers are devices that count increments of time. Traffic lights are one example where timersare used. In this example timers are used to control the length of time between signal changes. Figure 6.47 Timers application in traffic lightsTimers are represented by boxes in ladder logic. When a timer receives an enable, the timerstarts to time. The timer compares its current time with the preset time. The output of thetimer is logic 0 as long as the current time is less than the preset time. When the current timeis greater than the preset time the timer output is logic 1. There are three types of timers: On-Delay (TON), Retentive On-Delay (TONR), and Off-Delay (TOF). Figure 6.48 PLC timers typesOn-Delay (TON)When the On-Delay timer (TON) receives an enable (logic 1), at its input (IN), apredetermined amount of time (preset time - PT) passes before the timer bit (T-bit) turns on.The T-bit is a logic function internal to the timer and is not shown on the symbol. The timerresets to the starting time when the enabling input goes to logic 0.Example: Consider a switch is connected to input I0.3 and a light is connected to output Q0.1 as shown in ladder program. Figure 6.49 On-Delay timer - 168 -
  34. 34. Digital control systems‫ــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــ‬In the above example, When the switch I3.0 is closed (logic 1), which is loaded into timerT37. The timer T37 has a time base of 100 ms (.100 seconds). The preset time (PT) value hasbeen set to 150. This is equivalent to 15 seconds (.100 x 150). The associated contact T37 willbe closed after 15 seconds and the light will turn on. If the switch I0.3 were opened before 15seconds had passed, then closed again, the timer would again begin timing at 0.Retentive On-Delay (TONR)The Retentive On-Delay timer (TONR) functions in a similar manner to the On-Delay timer(TON). There is one difference. The Retentive On-Delay timer times as long as the enablinginput is on, but does not reset when the input goes off. The timer must be reset with a RESET(R) instruction. The same example used with the On-Delay timer will be used with theRetentive On-Delay timer. When the switch is closed at input I0.3, timer T5 (Retentive timer)begins timing. If, for example, after 10 seconds input I0.3 is opened the timer stops. Wheninput I0.3 is closed the timer will begin timing at 10 seconds. The light will turn on 5 secondsafter input I0.3 has been closed the second time.Off-Delay (TOF)The Off-Delay timer is used to delay an output off for a fixed period of time after the inputturns off. When the enabling bit turns on the timer bit turns on immediately and the value isset to 0. When the input turns off, the timer counts until the preset time has elapsed before thetimer bit turns off.6.6.5 CountersCounters used in PLCs serve the same function as mechanical counters. Counters compare anaccumulated value to a preset value to control circuit functions. Control applications thatcommonly use counters include the following: • Count to a preset value and cause an event to occur • Cause an event to occur until the count reaches a preset valueA bottling machine, for example, may use a counter to count bottles into groups of six forpackaging. Figure 6.50 Counters in packaging applicationCounters are represented by boxes in ladder logic. Counters increment/decrement one counteach time the input transitions from off (logic 0) to on (logic 1). The counters are reset when aRESET instruction is executed. There are three types of counters: up counter (CTU), downcounter (CTD), and up/down counter (CTUD) as shown in the following figure. - 169 -
  35. 35. Digital control systems‫ــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــ‬ Figure 6.51 Counters typesUp Counter (CTU)The up counter counts up from a current value to a preset value (PV). Input CU is the countinput. Each time CU transitions from logic 0 to logic 1 the counter increments by a count of 1.Input R is the reset. A preset count value is stored in PV input. If the current count is equal toor greater than the preset value stored in PV, the output bit (Q) turns on (not shown).Down Counter (CTD)The down counter counts down from the preset value (PV) each time CD transitions fromlogic 0 to logic 1. When the current value is equal to zero the counter output bit (Q) turns on(not shown). The counter resets and loads the current value with the preset value (PV) whenthe load input (LD) is enabled.Up/Down Counter (CTUD)The up/down counter counts up or down from the preset value each time either CD or CUtransitions from a logic 0 to a logic 1. When the current value is equal to the preset value, theoutput QU turns on. When the current value (CV) is equal to zero, the output QD turns on.The counter loads the current value (CV) with the preset value (PV) when the load input (LD)is enabled. Similarly, the counter resets and loads the current value (CV) with zero when thereset (R) is enabled. The counter stops counting when it reaches preset or zero.Example: A counter might be used to keep track of the number of vehicles in a parking lot. As vehicles enter the lot through an entrance gate, the counter counts up. As vehicles exit the lot through an exit gate, the counter counts down. When the lot is full a sign at the entrance gate turns on indicating the lot is full. Figure 6.52 keep track of parking as counter application - 170 -
  36. 36. Digital control systems‫ــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــ‬Up/down counter C48 is used in this example. A switch, connected to the entrance gate, hasbeen wired to input I0.0. A switch, connected to the exit gate, has been wired to input I0.1. Areset switch, located at the collection booth, has been wired to input I0.2. The parking lot has150 parking spaces. This value has been stored in the preset value (PV). The counter outputhas been directed to output Q0.1. Output 2 is connected to a “Parking Lot Full” sign. As carsenter the lot the entrance gate opens. Input I0.0 transitions from logic 0 to logic 1,incrementing the count by one. As cars leave the lot the exit gate opens. Input I0.1 transitionsfrom a logic 0 to a logic 1, decrementing the count by 1. When the count has reached 150, theoutput Q0.1 turns on. The “Parking Lot Full” sign illuminates. When a car exits,decrementing the count to 149, the sign turns off. Note that LD is not used in this example. Figure 6.53 Ladder logic diagram6.6.6 Digital temperature controller using PLCConsider a temperature control task involving a domestic central heating system as shown infigure. Room temperature sensor Motorized pump M1 Radiators Hot water Boiler tank Motorized pump M2 Hot water tank temperature sensor Boiler temperature sensor Figure 6.54 Central heating system - 171 -
  37. 37. Digital control systems‫ــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــــ‬The central heating boiler is to be thermostatically controlled and supply hot water to theradiator system in the house and also to the hot water tank to provide hot water from the tapsin the house. Pump motors have to be switched on to direct hot water from the boiler to either,or both, of the radiator and hot water systems according to whether the temperature sensorsfrom the room temperature and the hot water tank indicate that the radiators or tank needheating. The entire system is to be controlled by a clock so that it only operates for certainhours of day. The system has the following inputs and outputs assignments:Inputs • Clock signal to operate the system using boiler (I0.0) • Boiler temperature sensor (I0.1) • Room temperature room sensor (I0.2) • Water tank temperature sensor (I0.3)Outputs • Boiler heating system (Q0.0) • Pump (M1) for feeding radiators heating system (Q0.1) • Pump (M2) for feeding the water tank (Q0.2)The Ladder diagram for this system is given as I0.2 I0.0 I0.1 Q0.0 () I0.3 Q0.0 I0.2 Q0.1 () Q0.0 I0.3 Q0.2 () Figure 6.55 Central heating system (ladder diagram)The ladder diagram consists of three networks (rungs):Network 1: Boiler heating is working when there is a request from room or tank temperaturesensors provided that the clock signal is active and that the boiler temperature sensor indicatesthat the water is not hot enough.Network 2: Pump M1 works when there is a request from the room temperature sensorprovided that the boiler is activated and there is a hot water inside it (see the associatedcontact Q0.0, it is a memory variable and not external contact).Network 3: Pump M2 works when there is a request from the water tank temperature sensorprovided that the boiler is activated and there is a hot water inside it. - 172 -