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Embedded 100912065920-phpapp02


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embedded system ppt

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  1. 1. Embedded System, A Brief Introduction
  2. 2. Part - 1 Introduction
  3. 3. Introduction <ul><li>Embedded Systems :- </li></ul><ul><ul><li>Application-specific systems which contain hardware and software tailored for a particular task and are generally part of a larger system (e.g., industrial controllers) </li></ul></ul><ul><li>Characteristics </li></ul><ul><ul><li>Are dedicated to a particular application </li></ul></ul><ul><ul><li>Include processors dedicated to specific functions </li></ul></ul><ul><ul><li>Represent a subset of reactive (responsive to external inputs) systems </li></ul></ul><ul><ul><li>Contain real-time constraints </li></ul></ul><ul><ul><li>Include requirements that span: </li></ul></ul><ul><ul><ul><li>Performance </li></ul></ul></ul><ul><ul><ul><li>Reliability </li></ul></ul></ul><ul><ul><ul><li>Form factor </li></ul></ul></ul>
  4. 4. Examples
  5. 5. Characteristics
  6. 6. Concepts of co-design <ul><li>Codesign </li></ul><ul><ul><li>The meeting of system-level objectives by exploiting the trade-offs between hardware and software in a system through their concurrent design </li></ul></ul><ul><li>Key concepts </li></ul><ul><ul><li>Concurrent : hardware and software developed at the same time on parallel paths </li></ul></ul><ul><ul><li>Integrated : interaction between hardware and software developments to produce designs that meet performance criteria and functional specifications </li></ul></ul>
  7. 7. Essential components and considerations <ul><li>Essential components :- </li></ul><ul><li>- Microprocessor / DSP core </li></ul><ul><li>- Sensors </li></ul><ul><li>- Converter ( A-D and D-A ) </li></ul><ul><li>- Actuators </li></ul><ul><li>- Memory (on-chip and off-chip ) </li></ul><ul><li>- Communication path with interfacing environment </li></ul><ul><li>Essential considerations :- </li></ul><ul><li>- Response time ;- ( Real time system ) </li></ul><ul><li>- Area, Cost, Power, Portability, Fault-tolerance </li></ul>
  8. 8. Design-flow in ES Design
  9. 9. A mix of Disciplines <ul><li>DSP, Communication, Control….. </li></ul><ul><li>Software Engineering </li></ul><ul><li>Programming Languages </li></ul><ul><li>Compiler and OS </li></ul><ul><li>Architecture, Processor and IO techniques </li></ul><ul><li>Parallel and Distributed computing </li></ul><ul><li>Real Time Systems </li></ul><ul><li>VLSI CAD </li></ul>
  10. 10. Part - 2 Specification and Modelling methods in Embedded System
  11. 11. Models and Architecture <ul><li>Models :- </li></ul><ul><li>- Conceptual view of system’s functionality </li></ul><ul><li>- A set of functional objects and rules for composing these objects. </li></ul><ul><li>Architectures :- </li></ul><ul><li>- Abstract view of system’s functionality </li></ul><ul><li>- A set of implementation components and their connections </li></ul>
  12. 12. Modeling : Introduction <ul><li>Modeling starts with System Specification </li></ul><ul><li>System Specification : Main purpose : To provide clear and unambiguous description of the system function, and to provide a documentation of initial design process </li></ul><ul><li>It supports diverse models of computation </li></ul><ul><li>It allows the application of CAD tools for design space exploration, partitioning, SW-HW synthesis, validation and testing </li></ul><ul><li>It should not constrain the implementation options </li></ul>
  13. 13. Models and Modeling <ul><li>Models :- Conceptual views of system’s functionality ; A set of functional objects and rules for composing these objects </li></ul><ul><li>One of the keys to a GOOD hardware/software Codesign process is a unified representation the allows the functionality of the system (at various levels of abstraction) to be specified in a manner that is “unbiased” towards either a hardware or software implementation. </li></ul><ul><li>Unified Representation – </li></ul><ul><ul><li>A representation of a system that can be used to describe its functionality independent of its implementation in hardware or software </li></ul></ul><ul><ul><li>Allows hardware/software partitioning to be delayed until trade-offs can be made </li></ul></ul><ul><ul><li>Typically used at a high-level in the design process </li></ul></ul><ul><li>Provides a simulation environment after partitioning is done, for both hardware and software designers to use to communicate </li></ul><ul><li>Supports cross-fertilization between hardware and software domains </li></ul>
  14. 14. Models And Modeling <ul><li>Models are used for design representation </li></ul><ul><li>Design representation can be of three types </li></ul><ul><li>- Behavioral </li></ul><ul><li>- Physical </li></ul><ul><li>- Structural </li></ul><ul><li>There are various methods of Designing ES namely </li></ul><ul><li>- Capture and Simulate : Schematic capture , simulation </li></ul><ul><li>- Describe and Synthesis : HDL , Behavioral and Logic synthesis </li></ul><ul><li>- Specify-Explore-Rene : Executable specification and other formal methods…. </li></ul>
  15. 15. Models <ul><li>State Oriented Models :- </li></ul><ul><li>- FSM : Melay and Moore models </li></ul><ul><li>- Petri Nets </li></ul><ul><li>- Hierarchical Concurrent FSM ( HCFSM ) </li></ul><ul><li>Activity Oriented Models :- </li></ul><ul><li>- Data Flow Graph ( DFG ) </li></ul><ul><li>- Flow Chart / Control Flow Graph ( CFG ) </li></ul><ul><li>Structure Oriented Models :- </li></ul><ul><li>- Components Connectivity Diagrams </li></ul><ul><li>- RT net lists, Gate net lists </li></ul>
  16. 16. Models <ul><li>Data Oriented Models :- </li></ul><ul><li>- Entry Relationship diagram </li></ul><ul><li>- Jackson’s Diagram </li></ul><ul><li>Heterogeneous Models :- </li></ul><ul><li>- Control / Data Flow Graph </li></ul><ul><li>- Structure Chart </li></ul><ul><li>- Programming Languages : C, C++, Java, Verilog, VHDL, Esterel, SDL (Speciation and Description Language), CSP (Communicating Sequential Process), SpecCharts, StateCharts etc... </li></ul><ul><li>- Object Oriented Paradigm </li></ul><ul><li>- Program state Machine </li></ul><ul><li>- Queuing model </li></ul><ul><li>- Process Networks : Kahn’s Process Network </li></ul><ul><li>- Communicating Sequential Processes ( CSP ) </li></ul><ul><li>- Synchronous Data Flow model ( SDF ) </li></ul>
  17. 17. Models <ul><li>N numbers of Models for design representation !!! Now question is which model to choose ??? </li></ul><ul><li>DSP apps uses Data flow Models </li></ul><ul><li>Control Intensive apps FSM Models </li></ul><ul><li>Similarly Event driven apps uses Reactive Models </li></ul><ul><li>Finally the choice of models largely depends on personal tastes, Application Domains, Availability of software and tools etc.... </li></ul>
  18. 18. Architectures <ul><li>We must be clear about the architecture that we are going to use for design of ES </li></ul><ul><li>It has also got a wide variety of choices, to be chosen according to the given application. </li></ul><ul><li>The choices are as follows </li></ul><ul><li>Application-specific Architecture :- </li></ul><ul><li>- Controller Architecture </li></ul><ul><li>- Datapath Architecture </li></ul><ul><li>- Finite state machine with datapath </li></ul><ul><li>General Purpose Architecture :- </li></ul><ul><li>- CISC </li></ul><ul><li>- RISC </li></ul><ul><li>- Vector machine </li></ul><ul><li>- VLIW ( Very Long Instruction Word Computer ) </li></ul>
  19. 19. System Specification <ul><li>For every design there exists an conceptual view </li></ul><ul><li>Conceptual view depends on application </li></ul><ul><li>- Computation : Conceptualize as a Program </li></ul><ul><li>- Controller : Conceptualize as a FSM </li></ul><ul><li>Goal of specification language : To capture conceptual view with minimum designer’s effort </li></ul><ul><li>Ideal language : 1-to-1 mapping between conceptual model and language construct </li></ul><ul><li>Characteristics of commonly used conceptual models </li></ul><ul><li>- Concurrency </li></ul><ul><li>- Hierarchy </li></ul><ul><li>- Synchronization </li></ul>
  20. 20. Specification Language Requirements I <ul><li>A good ES specification Language should have a bunch of feature supported such as :- </li></ul><ul><li>Concurrency :- </li></ul><ul><li>- Can exists at difference levels such as :- </li></ul><ul><li># Job Level </li></ul><ul><li># Task Level </li></ul><ul><li># Statement Level </li></ul><ul><li># Operation Level </li></ul><ul><li># Bit Level </li></ul><ul><li>- Two types of concurrency within a behavior :- </li></ul><ul><li># Data driven </li></ul><ul><li># Control driven </li></ul>
  21. 21. Specification Language Requirements II <ul><li>State Transitions :- </li></ul><ul><li>- System are often modeled as state-based, e.g. Controller </li></ul><ul><li>- difficult to capture using programming construct </li></ul><ul><li>Hierarchy :- </li></ul><ul><li>- Required for managing system complexity </li></ul><ul><li>- Allows system modeler to focus on one sub-system at a time </li></ul><ul><li>- Two types of hierarchy :- </li></ul><ul><li># Structural Hierarchy </li></ul><ul><li># Behavioral Hierarchy </li></ul><ul><li># Concurrent Decomposition :- fork-join , process </li></ul><ul><li># Sequential Decomposition :- procedure, state machine </li></ul>
  22. 22. Specification Language Requirements III <ul><li>Behavioral Completion :- </li></ul><ul><li>- Behavior completes when all computation performed </li></ul><ul><li>- Advantages : Behavior can be viewed with inter-level transitions and allows natural decomposition into sequential behavior </li></ul><ul><li>Communication :- </li></ul><ul><li>- Concurrent behavior exchange data </li></ul><ul><li>- Are of two types </li></ul><ul><li># Shared memory model </li></ul><ul><li># Message passing model </li></ul>
  23. 23. Specification Language Requirements IV <ul><li>Synchronization :- </li></ul><ul><li>- Needed when concurrent behavior executes at different speeds </li></ul><ul><li>- Required when :- </li></ul><ul><li># Data exchange between behavior </li></ul><ul><li># Different activities must be performed simultaneously </li></ul><ul><li>- Types </li></ul><ul><li># Control dependent :- by reset , fork-join etc... </li></ul><ul><li># Data dependent :- synchronization by :- </li></ul><ul><li># Common event </li></ul><ul><li># Status detection </li></ul><ul><li># Common variable </li></ul>
  24. 24. Specification Language Requirements V <ul><li>Exception handling :- </li></ul><ul><li>- Occurrence of event terminates current computation </li></ul><ul><li>- Control transferred to appropriate next mode </li></ul><ul><li>- Ex :- Reset, Interrupt </li></ul><ul><li>Timing :- </li></ul><ul><li>- Required to implement / represent real time situation </li></ul><ul><li>- Ex :- </li></ul><ul><li>Wait for 100 ns </li></ul><ul><li>A <= A+1 after 200ns etc.. </li></ul>
  25. 25. Specification Languages Examples <ul><li>A good ES specification Language should support all the above characteristics of ES </li></ul><ul><li>Essential Characteristics :- </li></ul><ul><li># State Transition </li></ul><ul><li># Exceptions </li></ul><ul><li># Behavioral Hierarchy </li></ul><ul><li># Concurrency </li></ul><ul><li># Programming Construct </li></ul><ul><li># Behavioral Completion </li></ul><ul><li>Some commonly used languages for ES specification :- </li></ul><ul><li>VHDL, Verilog, Esterel, SDL, CSP, SpecChart, StateChart </li></ul>
  26. 26. Specification Languages Examples : A comparison
  27. 27. HW-SW Partitioning
  28. 28. Hardware/Software Partitioning <ul><li>Definition </li></ul><ul><ul><li>The process of deciding, for each subsystem, whether the required functionality is more advantageously implemented in hardware or software </li></ul></ul><ul><li>Goal </li></ul><ul><ul><li>To achieve a partition that will give us the required performance within the overall system requirements (in size, weight, power, cost, etc.) </li></ul></ul><ul><li>This is a multivariate optimization problem that when automated, is an NP-hard problem </li></ul>
  29. 29. HW/SW Partitioning Issues <ul><li>Partitioning into hardware and software affects overall system cost and performance </li></ul><ul><li>Hardware implementation </li></ul><ul><ul><li>Provides higher performance via hardware speeds and parallel execution of operations </li></ul></ul><ul><ul><li>Incurs additional expense of fabricating ASICs </li></ul></ul><ul><li>Software implementation </li></ul><ul><ul><li>May run on high-performance processors at low cost (due to high-volume production) </li></ul></ul><ul><ul><li>Incurs high cost of developing and maintaining (complex) software </li></ul></ul>
  30. 30. Partitioning Approaches <ul><li>Start with all functionality in software and move portions into hardware which are time-critical and can not be allocated to software ( software-oriented partitioning) </li></ul><ul><li>Start with all functionality in hardware and move portions into software implementation ( hardware-oriented partitioning) </li></ul>
  31. 31. System Partitioning <ul><li>Structural :- </li></ul><ul><li># Implement structure and then partition ... </li></ul><ul><li>Functional :- </li></ul><ul><li># System partitioning in the context of HW-SW partitioning is known as functional partitioning </li></ul><ul><li># Approach:- System’s functionality is described as collection of indivisible functional objects </li></ul><ul><li># Each system’s functionality is either implemented in either hardware or software </li></ul><ul><li># Advantages:- Enables better size/performance tradeoff </li></ul><ul><li># Uses fewer objects </li></ul><ul><li># Better for Algorithms / Humans </li></ul><ul><li># Permits HW-SW solutions </li></ul><ul><li># But is harder than graph partitioning </li></ul>
  32. 32. Partitioning Metrics <ul><li>Deterministic estimation techniques </li></ul><ul><ul><li>Can be used only with a fully specified model with all data dependencies removed and all component costs known </li></ul></ul><ul><ul><li>Result in very good partitions </li></ul></ul><ul><li>Statistical estimation techniques </li></ul><ul><ul><li>Used when the model is not fully specified </li></ul></ul><ul><ul><li>Based on the analysis of similar systems and certain design parameters </li></ul></ul><ul><li>Profiling techniques </li></ul><ul><ul><li>Examine control flow and data flow within an architecture to determine computationally expensive parts which are better realized in hardware </li></ul></ul>
  33. 33. Binding Software to Hardware <ul><li>Binding: assigning software to hardware components </li></ul><ul><li>After parallel implementation of assigned modules, all design threads are joined for system integration </li></ul><ul><ul><li>Early binding commits a design process to a certain course </li></ul></ul><ul><ul><li>Late binding, on the other hand, provides greater flexibility for last minute changes </li></ul></ul>
  34. 34. Issues in Partitioning <ul><li>Specification abstraction level </li></ul><ul><li>Granularity </li></ul><ul><li>System-component allocation </li></ul><ul><li>Metrics and estimations </li></ul><ul><li>Partitioning algorithms </li></ul><ul><li>Objective and closeness functions </li></ul><ul><li>Partitioning algorithms </li></ul><ul><li>Output </li></ul><ul><li>Flow of control and designer interaction </li></ul>
  35. 35. Issues in Partitioning (cont.) Output High Level Abstraction Decomposition of functional objects <ul><li>Metrics and estimations </li></ul><ul><li>Partitioning algorithms </li></ul><ul><li>Objective and closeness functions </li></ul>Component allocation
  36. 36. Specification Abstraction Levels <ul><li>Task-level dataflow graph </li></ul><ul><ul><li>A Dataflow graph where each operation represents a task </li></ul></ul><ul><li>Task </li></ul><ul><ul><li>Each task is described as a sequential program </li></ul></ul><ul><li>Arithmetic-level dataflow graph </li></ul><ul><ul><li>A Dataflow graph of arithmetic operations along with some control operations </li></ul></ul><ul><ul><li>The most common model used in the partitioning techniques </li></ul></ul><ul><li>Finite state machine (FSM) with datapath </li></ul><ul><ul><li>A finite state machine, with possibly complex expressions being computed in a state or during a transition </li></ul></ul>
  37. 37. Specification Abstraction Levels (Cont.) <ul><li>Register transfers </li></ul><ul><ul><li>The transfers between registers for each machine state are described </li></ul></ul><ul><li>Structure </li></ul><ul><ul><li>A structural interconnection of physical components </li></ul></ul><ul><ul><li>Often called a netlist </li></ul></ul>
  38. 38. Granularity Issues in Partitioning <ul><li>The granularity of the decomposition is a measure of the size of the specification in each object </li></ul><ul><li>The specification is first decomposed into functional objects, which are then partitioned among system components </li></ul><ul><ul><li>Coarse granularity means that each object contains a large amount of the specification. </li></ul></ul><ul><ul><li>Fine granularity means that each object contains only a small amount of the specification </li></ul></ul><ul><ul><ul><li>Many more objects </li></ul></ul></ul><ul><ul><ul><li>More possible partitions </li></ul></ul></ul><ul><ul><ul><ul><li>Better optimizations can be achieved </li></ul></ul></ul></ul>
  39. 39. System Component Allocation <ul><li>The process of choosing system component types from among those allowed, and selecting a number of each to use in a given design </li></ul><ul><li>The set of selected components is called an allocation </li></ul><ul><ul><li>Various allocations can be used to implement a specification, each differing primarily in monetary cost and performance </li></ul></ul><ul><ul><li>Allocation is typically done manually or in conjunction with a partitioning algorithm </li></ul></ul><ul><li>A partitioning technique must designate the types of system components to which functional objects can be mapped </li></ul><ul><ul><li>ASICs, memories, etc </li></ul></ul>
  40. 40. Metrics and Estimations Issues <ul><li>A technique must define the attributes of a partition that determine its quality </li></ul><ul><ul><li>Such attributes are called metrics </li></ul></ul><ul><ul><ul><li>Examples include monetary cost, execution time, communication bit-rates, power consumption, area, pins, testability, reliability, program size, data size, and memory size </li></ul></ul></ul><ul><ul><ul><li>Closeness metrics are used to predict the benefit of grouping any two objects </li></ul></ul></ul><ul><li>Need to compute a metric’s value </li></ul><ul><ul><li>Because all metrics are defined in terms of the structure (or software) that implements the functional objects, it is difficult to compute costs as no such implementation exists during partitioning Two key metrics are used in hardware/software partitioning </li></ul></ul><ul><ul><li>Performance: Generally improved by moving objects to hardware </li></ul></ul><ul><ul><li>Hardware size: Hardware size is generally improved by moving objects out of hardware </li></ul></ul>
  41. 41. Partitioning Approaches <ul><li>Traditional Approaches </li></ul><ul><ul><li>Take Objective function as a weighted sum along with constrains considerations </li></ul></ul><ul><ul><li>Aim:- To minimize Power, Delay, cost, Area etc... </li></ul></ul><ul><ul><li>Here is the objective function values which is obviously multimodal with multiple maxima and minima. </li></ul></ul>A B C A, B - Local minima C - Global minimum
  42. 42. Basic partitioning algorithms <ul><li>Clustering and multi-stage clustering [Joh67, LT91] </li></ul><ul><li>Group migration (a.k.a. min-cut or Kernighan/Lin) [KL70, FM82] </li></ul><ul><li>Ratio cut [KC91] </li></ul><ul><li>Simulated annealing [KGV83] </li></ul><ul><li>Genetic evolution </li></ul><ul><li>Integer linear programming </li></ul>
  43. 43. Functional Partitioning Algorithms <ul><li>For Hardware :- </li></ul><ul><li># BUD </li></ul><ul><li># Aparty </li></ul><ul><li>For Systems :- </li></ul><ul><li># Vulcan I </li></ul><ul><li># Vulcan II </li></ul><ul><li># Cosyma </li></ul><ul><li># SpecSyn </li></ul>
  44. 44. Summary <ul><li>Partitioning heavily influence design quality </li></ul><ul><li>Functional partitioning is necessary </li></ul><ul><li>Executable specification enables </li></ul><ul><li># Automation </li></ul><ul><li># Exploration </li></ul><ul><li># Documentation </li></ul><ul><li>Variety of algorithm exist </li></ul><ul><li>Variety of techniques exist for different applications </li></ul>
  45. 45. Thank You