Multilevel arch & str org.& mips, 8086, memory

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Multilevel arch & str org.& mips, 8086, memory

  1. 1. Need for Memory Hierarchy (Unit-1,3)(M.M. Chapter 12) <ul><li>The memory unit is an essential component in a digital computer since it is needed for storing program and data. </li></ul><ul><li>A small computer with a limited application may be able to fulfill its intended task without the need of additional storage capacity. </li></ul><ul><li>Most general-purpose computers would run more efficiently if they were equipped with additional storage beyond the capacity of the main memory. there is just not enough space in one memory unit to accommodate all the programs used in a typical computer. </li></ul><ul><li>It is more economical to use low-cost storage devices to serve as a backup for storing the information that is not currently used by the CPU. </li></ul><ul><li>The memory unit that communicates directly with the CPU is called the main memory . </li></ul><ul><li>Devices that provide backup storage are called auxiliary memory . The most common auxiliary memory devices used in computer systems are magnetic tapes and magnetic disks. They are used for storing system programs, large data files, and other backup information. </li></ul><ul><li>Only programs and data currently needed by the processor reside in main memory. </li></ul>
  2. 2. <ul><li>The total memory capacity of a computer can be visualized as hierarchy of components. </li></ul><ul><li>The memory hierarchy system consists of all storage devices employed in a computer system from the slow but high-capacity auxiliary memory to a relatively faster main memory, to an even smaller and faster cache memory accessible to the high-speed processing logic. </li></ul><ul><li>The overall goal of Memory Hierarchy is to obtain the highest possible average access speed while minimizing the total cost of the entire memory system. </li></ul>I/O Processor Magnetic disks Magnetic tapes Main Memory CPU Cache Memory
  3. 3. <ul><li>At the bottom of the hierarchy are the relatively slow magnetic tapes used to store removable files. </li></ul><ul><li>Next are the magnetic disks used as backup storage. </li></ul><ul><li>The main memory occupies a central position by being able to communicate directly with the CPU and with auxiliary memory devices through an I/O processor. </li></ul><ul><li>Cache Memory :- L1 cache & L2 cache </li></ul><ul><li>A special very high speed memory called cache. </li></ul><ul><li>It is sometimes used to increase the speed of processing by making current programs and data available to the CPU at a rapid rate. </li></ul><ul><li>The cache memory is employed in computer system to compensate for the speed differential between main memory access time and processor logic. </li></ul><ul><li>The Cache memory is concerned with the transfer of information between main memory & CPU. </li></ul><ul><li>L1 cache is a small, fast memory cache that is built onto a CPU and helps speed access to important and frequently-used data. </li></ul><ul><li>L1 cache is typically smaller and faster than L2 cache . </li></ul><ul><li>L1 cache is an abbreviation of Level 1 cache. </li></ul>
  4. 4. <ul><li>While I/O processor manages data transfers between auxiliary memory and main memory, the cache organization is concerned with the transfer of information between main memory and CPU. </li></ul><ul><li>Many operating systems are designed to enable the CPU to process a number of independent programs concurrently . This concept is called multiprogramming , refers to the existence of two or more programs in different parts of the memory hierarchy at the same time. </li></ul><ul><li>The part of the computer system that supervises the flow of information between auxiliary memory and main memory is called the memory management system. </li></ul>
  5. 5. Main Memory <ul><li>The technology used for main memory is based on Semiconductor Integrated Circuits. </li></ul><ul><li>Main Memory : RAM & ROM </li></ul><ul><li>RAM (volatile) : SRAM & DRAM </li></ul><ul><li>SRAM consist of internal flip-flops to store binary information. The stored information remains valid as long as power is applied to the unit. </li></ul><ul><li>SRAM is easier to use & has shorter read/write cycles. </li></ul><ul><li>DRAM stores information in the form of electrical charges that are applied to capacitors. </li></ul><ul><li>The stored charge on the capacitors tend to discharge with time. </li></ul><ul><li>It needs refreshing. </li></ul><ul><li>DRAM offers reduced power consumption & larger storage capacity in a single memory chip. </li></ul>
  6. 6. <ul><li>ROM : Read only Memory </li></ul><ul><li>It is also Random Access, permanent. </li></ul><ul><li>ROM is required to store initial program called bootstrap loader. </li></ul><ul><li>Its function is to start the computer software operating when power is turned on. </li></ul><ul><li>The hardware of the computer sets the Program Counter (PC) to the first address of the bootstrap loader. </li></ul><ul><li>It loads a portion of the O.S. from disk to main memory & then control is transferred to the O.S. </li></ul>
  7. 7. Multilevel Viewpoint of a Machine <ul><li>Each higher level is built on a preceding one and provides more abstract instructions that are translated to the lower level to be executed. </li></ul><ul><li>Each higher level is a virtual machine related to the language describing its capabilities. </li></ul>
  8. 8. Multilevel Computer Problem oriented language level Assembly Language Operating System machine level Instruction Set Architecture Micro-architecture level Digital Logic Level Level 5 Level 3 Level 2 Level 1 Level 0 Level 4
  9. 9. <ul><li>Microarchitecture also known as Computer organization at a lower level. </li></ul><ul><li>It is the description of the system that involves how the constituent parts of the system are interconnected and how they interoperate in order to implement the ISA. </li></ul><ul><li>It is the way a given instruction set architecture (ISA) is implemented on a processor. </li></ul><ul><li>A given ISA may be implemented with different microarchitectures. </li></ul><ul><li>Implementations might vary due to different goals of a given design or due to shifts in technology. </li></ul><ul><li>Computer architecture is the combination of microarchitecture and instruction set design. </li></ul><ul><li>Instruction Set Architecture (ISA) is the abstract image of a computing system that is seen by a machine language (or assembly language ) programmer. </li></ul><ul><li>ISA includes the instruction set , word size , memory address modes , processor registers , and address and data formats. </li></ul>
  10. 10. Computer Level Hierarchy Level 6 User Executable Program Level 5 High Level Lang. C++, Java etc. Level 4 Assembly Lang. Assembly Code Level 3 System Software Operating System, Library Code Level 2 Machine Level Instruction Set Architecture Level 1 Control Unit Microprogrammed or Hardwired Level 0 Digital Logic Circuits, gates etc.
  11. 11. Functions of Operating System <ul><li>Process Management </li></ul><ul><li>Memory Management </li></ul><ul><li>File Management </li></ul><ul><li>Device Management </li></ul><ul><li>Types of Control Unit </li></ul><ul><li>Micro Program is a program written in a low level lang. that is implemented by the hardware. This results in CISC architecture. </li></ul><ul><li>Hardwired CU consist of hardware that directly executes machine instructions. This design results in RISC architecture. </li></ul>
  12. 12. Structured Organization of a computer System System Bus CPU Main Memory Disk Controller Video Subsytem Interfaces Audio Hard Disks VDU Serial (COM) Parallel (LPT) Port
  13. 13. The Functions performed by a computing System <ul><li>Data Processing Functions : carried out by CPU </li></ul><ul><li>Data Movement Functions : Registers & Memory </li></ul><ul><li>Control Functions : carried out by CU </li></ul><ul><li>Data Storage Functions : Memory Units </li></ul><ul><li>System Bus Structure : Communication pathway connecting two or more devices like CPU, Main Memory or I/O. Bus is a group of physical wires. </li></ul><ul><li>Address Bus (Unidirectional) </li></ul><ul><li>Data Bus (Bidirectional) </li></ul><ul><li>Control Bus (Unidirectional) </li></ul>
  14. 14. MIPS and MFLOPS as Performance Metrics <ul><li>MIPS rating of a CPU refers to how many low level machine code instructions, a processor can execute in one sec. </li></ul><ul><li>One way to measure CPU performance is MIPS, or Million Instructions per second. </li></ul><ul><li>MIPS = Instruction count / Execution time * 10 6 </li></ul><ul><li>Since, Execution time = Instruction count * CPI / Clock rate </li></ul><ul><li>(CPI- Cycles per instruction) </li></ul><ul><li>Equation becomes </li></ul><ul><li>MIPS = Clock rate / CPI * 10 6 </li></ul><ul><li>Since MIPS is a rate of operations per unit time, CPU performance can be specified as the inverse of execution time, with faster machines having a higher MIPS rating. </li></ul><ul><li>Advantages: </li></ul><ul><li>Easy to understand </li></ul><ul><li>Faster machines will have higher MIPS rating and appear to have better performance. </li></ul>
  15. 15. <ul><li>However, there are problems with using MIPS as a performance metric. </li></ul><ul><li>MIPS is dependent on the instruction set of the CPU, making it difficult to compare the MIPS ratings of processors with different instruction sets. </li></ul><ul><li>MIPS can vary inversely to performance. </li></ul><ul><li>MFLOPS : Mega FL oating point OP erations per S econd. One million floating point operations per second. ( FL oating point O perations P er S econd) </li></ul><ul><li>The measurement of floating point calculations. </li></ul><ul><li>The FLOPS is a measure of a computer 's performance , especially in fields of scientific calculations that make heavy use of floating point calculations , similar to the older, simpler, instructions per second . </li></ul><ul><li>Used for finding the performance of specialized computers like supercomputers. </li></ul><ul><li>MFLOPS depends on programming behavior and hardware design of the computer. </li></ul><ul><li>The programs which has no floating point operation have rating zero. </li></ul><ul><li>MFLOPS can measure the performance of the system more correctly than MIPS. </li></ul>
  16. 16. <ul><li>MFLOPS - </li></ul><ul><li>No. of floating point operations in program / execution time * 10 6 </li></ul><ul><li>Advantage: </li></ul><ul><li>Useful in comparing performance of scientific applications machine. </li></ul><ul><li>Intended to provide a fair comparison between such machines such a flop is the same on all machines. </li></ul><ul><li>Problems: </li></ul><ul><li>Not all machines implemented the same set of flops – some operations are synthesized from some primitive flops. </li></ul>
  17. 17. Language Of the Machine 8086 <ul><li>8086 is a 16bit N-Channel, HMOS Microprocessor. </li></ul><ul><li>It Consumes less power. </li></ul><ul><li>It draws 360 mA on 5 Volt. </li></ul><ul><li>The 8086 operates in both single processor and multiple processor configurations to achieve high performance. </li></ul><ul><li>It is manufactured for standard temperature range 32’f – 180’f as well as extended temperature range from 40’f – 180’f. </li></ul><ul><li>Its clock frequencies for different versions are 5, 8 and 10 MHz. </li></ul><ul><li>It is built on single semiconductor chip and packaged in 40 pin IC package. The type of package is DIP (Dual Inline Package). </li></ul><ul><li>It uses 20 address lines & 16 data lines. </li></ul><ul><li>It can directly address upto 2 20 = 1Mbit of memory. </li></ul><ul><li>16 bit data word is divided into low order byte & high order byte. </li></ul><ul><li>20 address lines are multiplexed lines – 16 low address lines are time multiplexed with data & 4 high address lines are time multiplexed with status signals. </li></ul>
  18. 19. 8086 CPU is divided into independent Functional Parts: <ul><li>Bus Interface Unit (BIU) </li></ul><ul><li>Execution Unit (EU) </li></ul><ul><li>BIU sends out addresses, fetches instructions from memory, reads data from ports & memory and write data to ports & memory. </li></ul><ul><li>It handles all transfers of data & addresses on buses or execution unit. </li></ul><ul><li>EU tells BIU where to fetch instruction or data from & decodes instructions & execute instructions. </li></ul><ul><li>EU contains control circuitry which direct internal operations, decoder in EU translates instructions fetched from memory into series of actions which EU carries out. </li></ul><ul><li>EU has 16 bit ALU which can add, subtract, AND, OR, XOR, increment, decrement, complement or shift binary numbers. </li></ul><ul><li>A 16 bit register in EU has 9 active flags where flag is a flip-flop that indicates some conditions produced by execution of an instruction. </li></ul>
  19. 20. Register Organization of 8086 <ul><li>8086 has fourteen 16 bit registers classified as : </li></ul><ul><li>General purpose Register : Ax, Bx, Cx, Dx </li></ul><ul><li>Pointer & Index Register : SP, BP, SI, DI </li></ul><ul><li>Segment register : CS (Code), DS (Data), SS (Stack), ES (Extra) </li></ul><ul><li>Instruction pointer & status register </li></ul>
  20. 21. Language levels used to write a program for a microcomputer: <ul><li>Machine Language </li></ul><ul><li>Assembly Language </li></ul><ul><li>High level Language </li></ul><ul><li>Statement in Assembly Language </li></ul>Label Field OPcode field Operand field Comment field NEXT: ADD AL, 07H ;
  21. 22. Simulation Using MASM (Microsoft Assembler) <ul><li>Need for Assembler : </li></ul><ul><li>Learn how computer works at low level. </li></ul><ul><li>Write device drivers </li></ul><ul><li>Optimize program for speed & size. </li></ul><ul><li>Debug, hack & dissect other programs </li></ul><ul><li>Bootstrap new computer system </li></ul><ul><li>Communicate with input, output directly </li></ul><ul><li>Write utilities in HLL using features not available in those languages. </li></ul><ul><li>MASM for microprocessor can be used in 2 ways: </li></ul><ul><li>With models that are unique to a particular assembler </li></ul><ul><li>With full segment definition that allow full control over the assembly process & are universal to all assemblers. </li></ul>
  22. 23. <ul><li>CAO Model Question Paper </li></ul><ul><li>Unit – 1 </li></ul><ul><li>Q: 1 Explain Stored program control concept of various types of </li></ul><ul><li>computers. </li></ul><ul><li>Q: 2 On what basis Flynn has classified computers? Explain. </li></ul><ul><li>Q: 3 What are the characteristics of CISC architecture ? How is it </li></ul><ul><li>different from RISC architecture? </li></ul><ul><li>Q: 4 Explain Immediate and indexed addressing mode. Discuss their </li></ul><ul><li>advantages and disadvantages. </li></ul><ul><li>Q: 5 How do you classify instructions in an instruction set? Explain </li></ul><ul><li>any two instructions in each category with suitable examples. </li></ul><ul><li>Q: 6 Discuss the two metrics to measure the performance of a </li></ul><ul><li>computer system. What are their advantages & Disadvantages? </li></ul><ul><li>Q: 7 Distinguish between SRAM and DRAM. </li></ul><ul><li>Q: 8 Discuss Multilevel viewpoint of a Machine. </li></ul>

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