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Amogh_resume_06-march-15

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Amogh_resume_06-march-15

  1. 1. RESUME Amogh Eshappa Setra 4300 The Woods Dr #2101 Email: amogh.shettar@gmail.com San Jose, CA-95136 Linkedin: linkedin.com/in/amoghsetra Tel: (+1) 408-674-0795 OBJECTIVE: To secure a summer intern position in a company wherein using my abilities I will be able to bring growth to myself, and be an asset to the company. EDUCATION: Master of Science, Computer Engineering (Specialization: Computer Networks) Aug 2014 –May 2016 (expected) San Jose State University, San Jose, California 3.65/4.0 (GPA) Bachelor of Engineering, Electronics and Communications Engineering Sept 2007- June 2011 Visvesvaraya Technological University, Belgaum, Karnataka 71.48% (GPA 3.85/4.0)) SKILL SET: WORK EXPERIENCE: Nearly 3 years of strong professional experience in Cognizant Technology Solutions, Bangalore as a Java Developer. • Cognizant Technology Solutions, Bangalore (Sept 2011- July 2014) – Worked as a Software Engineer in developing and implementing the Web Portal Application for ALLY Group[ally.com/auto] (Earlier General Motors Acceptance Corporation) for Desktop and Mobile app(iOS and Android) on JAVA Spring Frame Work (Spring MVC Archt.). And also worked on Portlet-Spring migration for Ally Dealer [ally.com/dealer/] ACCOLADES:  Secured Second Prize in the event at Juniper Networks - Student Innovation Contest held on 14th Nov 2014  Received the appreciation certificate for the performance in work delivered from the Client : Ally Inc  Bright Spark – May 2014, Bright Spark – Nov 2013 , Oscar of the Month – Dec 2012  One among top 2 % rank (2866) under engineering stream in Karnataka CET-2007 conducted by KEA, India.  University level topper in High Performance Computer Networks.  Have been a consistent high performer in all my classes. RELEVANT COURSEWORK:  Graduate: Network Programming and Applications (Fall 2014), Network Architecture and Protocols (Fall 2014), Algorithms and Data Structures (Spring 2015), Operating System Design (Spring 2015), Computer Architecture (Spring 2015), Advanced μC Computer Design (Spring 2015), Digital Design (Fall 2014)  Undergraduate: Computer Communication Networks, High Performance Computer Networks, Fundamentals of CMOS VLSI, Analog and mixed mode VLSI Design, Fundamentals of HDL (Verilog). ACADEMIC PROJECT: • Troubleshooting IP CLOS Fabrics for Next Generation Data Center Clouds - Juniper Networks , Fall 2014 Analyzed the challenges related with IP Fabrics (Leaf and Spine model) and provided efficient solution for management of the network and handling of the network equipment for the Next Generation Data Centers. • Team File Sharing. (Network Programming and Application - Fall 2014) - Fall 2014 Designing and implementing a socket program for the user, a web server backend which allows the user to upload the any kind of files (say JPEG images) and a cross domain communication mechanism using CURL to allow a file from one domain to be sent and saved in another domain securely. • DHCP Server and IP pool server management Design (Network Arch. And Protocol-Fall 2014) - Fall 2014 Designing the DHCP Server and the management of IP pool server to configure IP with lease & renewal time. • Design And Implementation Of Micro-Power Neural Amplifier in 0.18μm technology(Cadence) - Fall 2011 Designed a Current Mirror Operational Transconductance Amplifier (OTA), two stage to achieve a gain of 100 dB with maximum power dissipation of 6μW. Designed a Neural Amplifier using OTA and feedback elements as parallel combination of Pseudo-MOS resistors and capacitors, to achieve a gain of 40dB , phase margin of 80 degrees, to get the cutoff frequencies with lower as 151.9 mHz and upper as 7.01 KHz using 5pF load to meet above specifications in process. Programming Languages Advanced JAVA(Spring FW), C++, SQL/PLSQL, Core JAVA,HDL (VERILOG), NXP LPC1769 (ARM Cortex CPU) and Intel 8051 Micro-Controllers (Assembly & C), Intel 8086 Micro -Processors (Assembly), HTML, JSP, PHP, CURL. Engineering Tools Cadence: Virtuoso Schematic and Layout Editor (0.18-μm CMOS technology). MATLAB and Code Compressor Studio: Signal Processing Xilinx: Simulation and verification on FPGA, lpcxpresso IDE : NXP microcontroller Keil: IDE Tool by ARM for IDE and simulation of Micro-controllers, Tasm/Masm: Turbo Assembler/Microsoft Macro Assembler Micro-processors. Eclipse, Putty, Oracle Weblogic server, SQL Developer, Wireshark, Fiddler. Platforms Windows 95/98/2000/XP/Vista/7/8, MAC OS, iOS, Linux (Red Hat), Ubuntu * References: Available upon request. March 23, 2015 - San Jose, CA

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