ePIXfabJoint Consortium Expertise        Amit Khanna     Coordinator, ePIXfab
Contents• Introduction  – About IMEC, LETI and IHP  – ePIXfab Aim  – ePIXfab Users• EU FP7 Support Action ESSenTIAL• Servi...
imecAT A GLANCE
MISSION▸ World-leading research in nano-electronics.▸ Scientific knowledge with innovative power of  global partnerships I...
Imec in the world                                 imec The Netherlands                                                    ...
IMECAMPUS6   Total: 8000 m2 Clean Room
Clean Room 2                            IMECAMPUS    3200 m2 Clean Room    300 mm pilot line, 65nm baseline    Ball Room, ...
IMECAMPUS     R&D & Prototyping          Facility      Heterogeneous        IntegrationClean Room 14800m2 Clean Room1750m2...
CMORE 200mm Process capabilities       Litho                        DRIE                Low stress dielectrics            ...
CMORE ToolBox                                                                                                             ...
Silicon Photonics @ImecTechnology development for Optical chip-to-chip  and chip-to-board Interconnect .     • Program wit...
IMEC’S Silicon photonics platform iSiPP vision for optical I/O                                                            ...
Silicon photonics platform                                                Technology roadmap                  Fiber Couple...
CMORE                                 Turn your silicon Concept into a Product(Co-)development                            ...
Silicon Photonics Technology Offering   Technology Exploration                          Development on Demand             ...
Silicon Photonics Technology Offering   Technology Exploration                         Development on Demand              ...
ABOUT LETI
300mm platformFocus on advanced modules,50 process equipments,Strong in-line metrology,Designed for short-loop with indust...
200mm platformFull integration line for advanced devices,SPC and in-line metrology,Open to academia for scaling up new con...
BHT MEMS200 platform    Integration with alternative materials (magnetic, OLED,    thick metals, molecular for biology, …)...
State of the art 200mm microsystems equipments                     All standard processes                           • Deep...
Characterization platforms                                          Complete platform for morpho, chemical &Nanocaracteri...
A complete set of research platforms  From advanced concepts to pilot lines         Short loops with industrial sites     ...
The ePIXfab activivies on 200mm platform           Building 41      200&300mm wafers (FE)                                 ...
Silicon Technology Platform and its « customers »                                             DTSi                   Facil...
ABOUT IHP
ePIXfab          To establish access to silicon photonics technology     for small scale users and emergence of a fab-less...
Users                              Industry                              Research Institute                              U...
ESSenTIAL        An EU FP7 Project supporting ePIXfab (2011-14)ePIXfab services specifically targeting (SME) industrial ta...
Multi Project Wafers (MPW)           send in designusers                                  mask                            ...
MPW technology2 layer Passive Technology           Modulator Schematic Cross-sec,                                     2 le...
Device cross-section after processing          WG                         FC                        70nm220nm           Si...
Top cladding        1.25um planarized oxide              5um protective resist                                    5um     ...
Deep and shallow etch• Star coupler: shallow etch for less contrast                                  70nm               22...
Performance,                 standard passives     Device      Design       Target        Performance     Grating     315/...
Cross Section: Advanced passives• 220nm + 380nm SOI in one design:• 69% efficiency fiber couplers, ridge waveguides, ...  ...
Performance,          advanced passivesDevice    Design           Target      PerformanceGrating   0.3/0.3 FC layer, 1550n...
Modulators Process Lateral vs. interdigitated diodes design Performances comparison
Outline: Process Lateral vs. interdigitated diodes design Performance comparison
Process flow•   Buried Oxide 2000nm (tBOX)•   Crystalline Si 220nm (tWG)•   Fiber Coupler height of 150nm (tFC)
Process flow•   Pre-Metal Dielectric is 1000nm (tPMD)•   1000nm (tPMD) is to avoid optical losses•   due to metal routing ...
Process flow• Cu Metallization 600nm (tM1)
Si                      •      Passivation 330nm (tPASS)SiO2N1 implanted SiNPLUS implanted Si                      •      ...
Outline: Introduction Process Lateral vs. interdigitated diodes design Performance comparison
Design of Lateral PN junction                                                                  P+ impl N+ impl            ...
V L and Optical Loss  ∏       ∏ dependence to “d”:N region distance to P                    2.5                           ...
Design of interdigitated PN junction                                                       L= 1.6µm                       ...
Outline: Introduction Process Lateral vs. interdigitated diodes design Performance comparison
Comparison of two diodes in DC regime             4                                                          2.7          ...
Frequency response and eye diagram of EO modulation          0.5 mm Interdigitated PN junction                            ...
Passive + heater MPW offer                     THERMAL TUNING ELEMENT                 A way towards closed loop operationT...
Heaters                                                       8                                                       1   ...
E.g Heaters results                                     hox=500nm, Q=13000                                     hox=600nm, ...
Technology                     SOI wafer: Layer stack                              220nm SOI / 2um BOX                    ...
Heater module•Fc@ fixed dose @etching 70nm                                      220nm                                     ...
MPW Lateral PiN Ge Photodetectors                  offer      Leti Ge PDs integrated at the end of the waveguide•   No gds...
MPW Standardized                              Leti offer MPW                                Photodetector                 ...
Ge-on-Si lateral pin photodetectors of LETI
Epitaxy of germanium Low T /HighT cycle growth   of Ge thick layers on                                   2.8 µm         Ge...
Centura RP-CVD Tool         Reduced Pressure-Chemichal Vapour Deposition toolEpi Centura :              Epitaxy           ...
Strained Ge absorption   Absorption coefficient @ 1.3 µm (1.55 µm) : 10 000 cm-1 (4500 cm-1);Direct band gap : 0.81 eV (bu...
Mask DUV 248nm minimum CD specificationsFollow the Design rules Manual for the specifications for each layersAnd fill in t...
Photodetectors lithographies DUV 248nm5 layers in DUV 248 to build PD ‘s devicesBlock 1                      User 1Block 2...
Lateral diode: DC characteristics                               •   Higher dark current / vertical                        ...
Lateral diode: RF characteristics                                                                   10E1                  ...
Parametric minimum performance targeted• Parametrics performance at 1.55µmResponsivity e.g >0.5A/WDark current < 3µA @ -...
Packaging & Integration for Silicon Photonics
Fibre Coupled Semiconductor Lasers (high speed)           optical fibre         isolator              laser               ...
Hybrid Integration (high speed photodiodes)     fibre in gripper                                            welded fibreAs...
Photonics Design (optical, mechanical, thermal) Mechanical Design of Laser Package     (inset shows actual image)         ...
Fibre Coupling to Silicon Waveguides              ePIXfab Silicon Photonics Workshop, April 2012.
Fibre Coupling to Silicon Waveguides                                                                           output fibr...
Fibre Coupling to Silicon Waveguides (tolerances)                                                                3dB ± 5 m...
Fibre Coupling to Silicon Waveguides (ePIXfab) packaged SOI ring resonator       Linear Planar Gratings                   ...
Fibre Coupling to Silicon Waveguides (ePIXfab)Insertion Loss (dB)                                                         ...
Fibre Coupling to Silicon Waveguides (modulators, ...)                         Si photonic chip                         (m...
Fibre Coupling to Silicon Waveguides (future offering)Silicon platform(high density interconnect)             angled Silic...
Active Device Integration on Silicon Photonics                   flexible connector                   (3-sections for tune...
VTT
Design KitsDesign Rule Manual     Manual describing the design rules necessary to follow for design acceptance at the fabT...
Training and Support 5-day training, 2/yearProgram:•   Technology•   Design rules•   Supply chain•   Procedures•   Hands-...
Industrial Use• Evaluation excercises• MPW chips & packages• Transfer to foundry services:                                ...
Contact InformationAddress:  ePIXfab  IMEC-Ghent University  Dept. of Information Technology  Sint-Pietersnieuwstraat 41, ...
ePIXfab Technology and Partners
ePIXfab Technology and Partners
ePIXfab Technology and Partners
ePIXfab Technology and Partners
ePIXfab Technology and Partners
ePIXfab Technology and Partners
ePIXfab Technology and Partners
ePIXfab Technology and Partners
ePIXfab Technology and Partners
ePIXfab Technology and Partners
ePIXfab Technology and Partners
ePIXfab Technology and Partners
ePIXfab Technology and Partners
ePIXfab Technology and Partners
ePIXfab Technology and Partners
ePIXfab Technology and Partners
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ePIXfab Technology and Partners

  1. 1. ePIXfabJoint Consortium Expertise Amit Khanna Coordinator, ePIXfab
  2. 2. Contents• Introduction – About IMEC, LETI and IHP – ePIXfab Aim – ePIXfab Users• EU FP7 Support Action ESSenTIAL• Services – MPW – Packaging and Integration – Training and Support
  3. 3. imecAT A GLANCE
  4. 4. MISSION▸ World-leading research in nano-electronics.▸ Scientific knowledge with innovative power of global partnerships ICT, healthcare and energy.▸ Industry-relevant technology solutions.▸ International top talent in a unique high-tech environment committed to provide building blocks for a better life in a sustainable society. © IMEC 2011 / CONFIDENTIAL 4
  5. 5. Imec in the world imec The Netherlands imec office imec Japan imecimec office US Belgium China imec imec Taiwan India 5
  6. 6. IMECAMPUS6 Total: 8000 m2 Clean Room
  7. 7. Clean Room 2 IMECAMPUS 3200 m2 Clean Room 300 mm pilot line, 65nm baseline Ball Room, Clean sub-FAB Continuous operation: 24hrs / 7 days R&D on advanced CMOS scaling7 Total: 8000 m2 Clean Room
  8. 8. IMECAMPUS R&D & Prototyping Facility Heterogeneous IntegrationClean Room 14800m2 Clean Room1750m2 Class 1200mm pilot line, 130nm CMOSContinuous operation: 8 24hrs / 7 days Total: 8000 m2 Clean Room
  9. 9. CMORE 200mm Process capabilities Litho DRIE Low stress dielectrics Metals, plating Centura platform Endura metal ASM 1100 • high etch rate • SiO2, SiC, SiN • Ti,TiN,Ta,TaN, AlCu, Cu, W ... • I-line, DUV, 193nm • high aspect ratio • Low temp SiO2 • Ni plating • CD down to 50nm • angle capability • Low stress <100MPa • Compensation for low stressSiGe, poly Si, c-Si Release Wafer Bonding In line defect monitor PRIMAXX Suss XBC300HF KLA• c-Si low resistivity • Dry HF release • Anodic, Metal, polymers • Defect detection &• Poly-Si, SiGe • no stiction and more classification• Low stress and gradient • no residues • Glass, Cu-Cu, Cu-Sn • Regular monitoring9 STEPHANE DONNAY JUNE 10, 2010 9
  10. 10. CMORE ToolBox Electrical Environmental Device Technologies130/90/65 nm SiGe HBT HV MEMS Si Photonics Imagers Novel CMOS 24-600V Components hybrid diode array Test & Reliability ROIC Optical Materials Analysis PackagingMultilayer Thin 3D TSV MEMS Capping Assembly Film Thermo- Defect Mechanical Inspection Embedded Systems, Design & Software Digital Analog Modeling TCAD MEMS System RF Custom System 1 E f  V- MpBIAS Mp- Mp+ V 2W  Solutions I BIAS Mn- W Mn+ Bar resonator 10
  11. 11. Silicon Photonics @ImecTechnology development for Optical chip-to-chip and chip-to-board Interconnect . • Program with industry partners: Intel – Samsung – Panasonic – Fujitsu – Roadmap for design and integration of passive and active modules Dedicated project two application domains: Optical communication (Bio)Sensors
  12. 12. IMEC’S Silicon photonics platform iSiPP vision for optical I/O program Fiber Couplers Waveguides Heaters LasersOptical I/Os for chip-to-chip and chip-to-board interconnect Ge p+ III-V p-Si SiN [100nm] n+ p+ p+ p-Si Ge n n n n+ c-Si + p p+ c-Si Passives Photodetectors Modulators Co-integration of all electro-optical components on a single opto-silicon interposer platform CW CW CW CW LASER l1 LASER l2 LASER l3 LASER l4 CPL CPL CPL CPL SPL SPL SPL SPL Drivers MOD l4 l1 – l4 Transmit SERIALIZER MOD l3 MOD l2 CPL M MOD l1 Drivers MOD l4 l1 – l4 MOD l3 MOD l2 CPL M MOD l1 Drivers MOD l4 l1 – l4 MOD l3 MOD l2 CPL M MOD l1 DESERIALIZER Amplifiers DET l1 – l4 Relying on CMOS DET DET Receive CPL D DET Amplifiers DET l1 – l4 DET DET fabrication technology: CPL D DET Amplifiers DET l1 – l4 DET DET CPL D DET CMOS Photonics Interconnect waveguides ultra-compact Target = E-O/O-E transceivers low-cost and power-efficient >1Tb/s @1pJ/bit
  13. 13. Silicon photonics platform Technology roadmap Fiber Couplers Waveguides Heaters Lasers Ge p+ III-V p-Si SiN [100nm] n+ p+ p+ p-Si Ge n n n n+ c-Si + p p+ c-Si Passives Photodetectors Modulators 2014: 2013: on-Si lasers Ge detectors 2012: 2µm High-speed low-power E-O modulators III-V / silicon lasers 2011: 10Gb/s drivers passive silicon photonics platformMany years of experience with Ge photodetectorpassive optical components:waveguides, couplers, ... First promising results on active MRR modulators electro-optical components
  14. 14. CMORE Turn your silicon Concept into a Product(Co-)development Prototyping Production Process Prototyping development High-volumeConcept Product Low-volume Packaging Transfer manufacturingDesign Qualification manufacturing Testing @ foundry partner @ imec Reliability
  15. 15. Silicon Photonics Technology Offering Technology Exploration Development on Demand MPW R&D Runs • Generic Platform Definition • Design engineering • Shared fabrication runs • Material, Device and Circuit • Platform tuning towards • No design engineering Research customer specifications • Best effort basis (schedule • Device Models • Dedicated fabrication runs and performance) • Specific add-on modules development Technology Exploration Development on Demand MPW R&D RunsOffering Type Program-based (“CORE”), sharing Project-based (“CMORE”), bilateral “ePIXfab” results amongst all program imec <-> customer partnersBusiness offering Deliverables Know-How and IP Prototype Chips and low volume Proof of Concept Samples for R&D manufacturing for commercial use academic use Know-How and IP Shared amongst partners without Bilateral sharing No IP involved accounting Dedicated clausules possible Financials Program entrance fee Project (co)development cost Price per unit area and/or per Yearly partnership fee wafer
  16. 16. Silicon Photonics Technology Offering Technology Exploration Development on Demand MPW R&D Runs • Generic Platform Definition • Design engineering • Shared fabrication runs • Material, Device and Circuit • Platform tuning towards • No design engineering Research customer specifications • Best effort basis (schedule • Device Models • Dedicated fabrication runs and performance) • Specific add-on modules development Technology Exploration Development on Demand MPW R&D RunsOffering Type Program-based (“CORE”), sharing Project-based (“CMORE”), bilateral “ePIXfab” results amongst all program imec <-> customer partnersTechnology Modules Passive 2-level waveguides Available Available Available Passive 4-level waveguides Available Available Available Integrated Heaters Available Available 2012-2Q Depletion Modulators Available Available 2012-3Q MOS Modulators Available Available 2013 Ge Photo detectors Available 2012-2Q >2013 III-V-on-Si Bonding Available To be discussed Not planned Laser Flip-Chip >2012-2H >2012-2H Not plannedToolset (Wafer size) 130nm (200mm) 130nm (200mm) 130nm (200mm) 2012: 45nm (300mm) 2013: 45nm (300mm))
  17. 17. ABOUT LETI
  18. 18. 300mm platformFocus on advanced modules,50 process equipments,Strong in-line metrology,Designed for short-loop with industry,Advanced substrate development 300mm CMOS Integration & adv. modules
  19. 19. 200mm platformFull integration line for advanced devices,SPC and in-line metrology,Open to academia for scaling up new concepts,Long practise of short-loop with industry. 200mm ‘CMOS’ new concepts & Beyond CMOS 300mm CMOS Integration & adv. modules
  20. 20. BHT MEMS200 platform Integration with alternative materials (magnetic, OLED, thick metals, molecular for biology, …) Capacity for pilot line Allocated capacity for key partners 200mm ‘CMOS’ new conceptsMore Than Moore & Beyond CMOS 300mm 200mm CMOS Integration & adv. modules
  21. 21. State of the art 200mm microsystems equipments All standard processes • Deep RIE • PVD, PECVD, RIE • Litho tracks Thick metal electroplating • Semi automatic wet benches New alloy material development (3 targets Cosputtering ) Double sided ASML exposure with focus drill-downOLEDS deposition Cluster
  22. 22. Characterization platforms Complete platform for morpho, chemical &Nanocaracterisation about 50 tools: physical characterization,Ion Beam, X ray, optical analysis etc… Coupled with Synchrotron, Open to services through SERMA 200mm ‘CMOS’ new concepts More Than Moore 300mm 200mm & Beyond CMOS CMOS Integration & adv. modules Nanoscale Characterization
  23. 23. A complete set of research platforms From advanced concepts to pilot lines Short loops with industrial sites Cooperative with academia and industry 200mm ‘CMOS’ new concepts More Than Moore & Beyond CMOS 300mm 200mm CMOS Integration & adv. modules Nanoscale Exploratory Characterization Technology
  24. 24. The ePIXfab activivies on 200mm platform Building 41 200&300mm wafers (FE) We are here
  25. 25. Silicon Technology Platform and its « customers » DTSi Facilities Characterization Maintenance Process Heterogeneous µelectronic integration Technological Interface Optronic BioMore Moore More than Moore
  26. 26. ABOUT IHP
  27. 27. ePIXfab To establish access to silicon photonics technology for small scale users and emergence of a fab-less ecosystem IC technology (Multi Project Wafers) Packaging TrainingePIXfab is a collaboration between research institutes, coordinated byImec 2006 2012 ePIXfab is supported by the EU (FP6, FP7)
  28. 28. Users Industry Research Institute University•Academic Research, biggest user group•Industry, evaluation of technology picking up
  29. 29. ESSenTIAL An EU FP7 Project supporting ePIXfab (2011-14)ePIXfab services specifically targeting (SME) industrial take-up of advanced silicon photonics  Active Modules in Multi-Project Wafer Service  Packaging and Integration  Advanced Design kits & Support  Training and Workshops  Free Feasibility Studies for EU SMEs
  30. 30. Multi Project Wafers (MPW) send in designusers mask integration Image ePIXfab website fabrication wafers distributed
  31. 31. MPW technology2 layer Passive Technology Modulator Schematic Cross-sec, 2 level implants4 layer Passive Technology Heater devices left, optical microscope. Right, SEM micrograph
  32. 32. Device cross-section after processing WG FC 70nm220nm Si2000nm SiO2 Si substrate Pieter Dumon IMEC confidential 2009 41
  33. 33. Top cladding 1.25um planarized oxide 5um protective resist 5um 1250nm 70nm220nm 70nm Si 220nm Si2000nm SiO2 SiO2 2000nm Si substrate Si substrate Pieter Dumon IMEC confidential 2009 42
  34. 34. Deep and shallow etch• Star coupler: shallow etch for less contrast 70nm 220nm 500nm 15µm 2µm 5µm oxide silicon
  35. 35. Performance, standard passives Device Design Target Performance Grating 315/315 FC 1550nm , TE 25-30 % Coupler layer, 25 coupling periods efficiency Strip 450X220 1550nm, TE Air clad- 2.5 Waveguide dB/cm Oxide Clad- 1.5dB/cm44
  36. 36. Cross Section: Advanced passives• 220nm + 380nm SOI in one design:• 69% efficiency fiber couplers, ridge waveguides, ... RFC poly FCW WG FC 150nm 220nm Si 220nm Si 70nm 2000nm SiO2 Si substrate
  37. 37. Performance, advanced passivesDevice Design Target PerformanceGrating 0.3/0.3 FC layer, 1550nm , 60 % couplingCoupler 25 periods TE efficiency
  38. 38. Modulators Process Lateral vs. interdigitated diodes design Performances comparison
  39. 39. Outline: Process Lateral vs. interdigitated diodes design Performance comparison
  40. 40. Process flow• Buried Oxide 2000nm (tBOX)• Crystalline Si 220nm (tWG)• Fiber Coupler height of 150nm (tFC)
  41. 41. Process flow• Pre-Metal Dielectric is 1000nm (tPMD)• 1000nm (tPMD) is to avoid optical losses• due to metal routing over waveguide
  42. 42. Process flow• Cu Metallization 600nm (tM1)
  43. 43. Si • Passivation 330nm (tPASS)SiO2N1 implanted SiNPLUS implanted Si • Process flow Aluminium PadsP1 implanted SiPPLUS implanted Si tPASS ttPAD PADNiSiSiO2 PMD tM1W contactSiO2 IMDCu metal 1 tPMDAlCu pads tWG tFC tBOX BOX
  44. 44. Outline: Introduction Process Lateral vs. interdigitated diodes design Performance comparison
  45. 45. Design of Lateral PN junction P+ impl N+ impl P-type dopant d N-type dopant distribution distribution P++ N ++ Oxide Net doping distribution d 4 5 Optical loss n eff 3.5 4.5 Optical loss (dB/mm) P++ P N N++ neff (10 ) -4 3 4 w 2.5 3.5• waveguide width: 500 nm• waveguide height: 220 nm -80 -40 0 40 80 120 3 160 d (nm)• slab height: 150 nm• doping concentration: 1e18 /cm3 6 V reverse bias
  46. 46. V L and Optical Loss ∏ ∏ dependence to “d”:N region distance to P 2.5 4.7 VL 2.3 Optical loss 4.5 Optical loss (dB/mm) 2.1 4.3 VL (V·cm) 1.9 4.1 1.7 3.9 1.5 3.7 1.3 3.5 1.1 3.3 -80 -40 0 40 80 120 160 d (nm)
  47. 47. Design of interdigitated PN junction L= 1.6µm 1.4 µm w 5 5 w=250 nm w=250 nm Optical Loss (dB/mm) 4 w=300 nm 4.5 w=300 nm w=400 nm w=400 nm (10-4) 3 4 eff 2 3.5 n 1 3 0 2.5 0 1 2 3 4 5 6 0 1 2 3 4 5 6 Reverse Bias (V) Reverse Bias (V) • VπLπ=0.62 V∙cm for a reverse bias of -1 V when w is 250 nm; • Reducing w can improving the modulation efficiency and cutting the loss;
  48. 48. Outline: Introduction Process Lateral vs. interdigitated diodes design Performance comparison
  49. 49. Comparison of two diodes in DC regime 4 2.7 Loss: lateral PN n : lateral PN eff Optical Loss (dB/mm) 3 n : interdigitated PN 2.3 eff Loss: interdigitated PN (10-4) 2 1.9 eff n 1 1.5 0 1.1 0 1 2 3 4 5 6 Reverse Bias (V) Lateral PN Interdigitated PN (1×1018/cm3) (1×1018/cm3) VπLπ at -1 V (V∙cm) 1.55 1.12 Loss at 0 V (dB/mm) 2.3 2.5 Capacitance at 0 V (fF/mm) 438 1590
  50. 50. Frequency response and eye diagram of EO modulation 0.5 mm Interdigitated PN junction 1.5 mm lateral PN junction -25 -30 0.5 mm 1.5 mm -30 -35 -35 |S21| 2 (dB)|S21| 2 (dB) -40 -40 -45 -45 f3dB of |S21| at 0 V: 4.3 GHz f3dB of |S21| at 0 V: 5.5 GHz f3dB of |S21|2 at 0 V : 2.6 GHz f3dB of |S21|2 at 0 V: 3.6 GHz -50 -50 -55 0.1 0.2 0.5 1 2 5 10 20 -55 Frequency (GHz) 0.1 0.2 0.5 1 2 5 10 20 Frequency (GHz) • 10 Gbit/s • 10 Gbit/s • Vpp= 3 V • Vpp= 2 V • Bias=-2.5 V • Bias=-1.5 V •PRBS: 215-1 •PRBS: 215-1 Length f3dB of |S21| Power consumption Performance @ 10Gb/s Bias (V) Vpp (V) ER (dB) (mm) at 0 (GHz) (pJ/bit) Lateral PN junction 1.5 5.5 -1.5 2 8.5 0.47 Interdigitated PN junction 0.5 4.3 -2.5 3 7.5 1.25
  51. 51. Passive + heater MPW offer THERMAL TUNING ELEMENT A way towards closed loop operationThermal tuning efficiency depends on:Material volume to be heatedThermal coupling efficiencyExpected time responseLow power implies:IntegrationScaling down active areas
  52. 52. Heaters 8 1 total Input OutputE.G Resonator Ring with heater Ti TiN 9.00E-007 8.50E-007 8.00E-007 l=3nm/10mW Group B #8 P0mW 7.50E-007 Group B #8 P2mW 7.00E-007 Group B #8 P4mW 6.50E-007 6.00E-007 Group B #8 P6mW Intensity (a. u.) 5.50E-007 Group B #8 P8mW 5.00E-007 Group B #8 P10mW 4.50E-007 4.00E-007 3.50E-007 3.00E-007 2.50E-007 2.00E-007 1.50E-007 1.00E-007 5.00E-008 0.00E+000 1526 1528 1530 1532 1534 1536 1538 1540 1542 1544
  53. 53. E.g Heaters results hox=500nm, Q=13000 hox=600nm, Q=37000The oxide thickness is fixed to 600nm, a compromise between opticallosses generated by the Ti/TiN layer and thermal tuning efficiency.
  54. 54. Technology SOI wafer: Layer stack 220nm SOI / 2um BOX N° Polarity Drawing grid Name of level Function Mask en nm Layer3 mask FC Fiber Coupler 01 1 Dark Fieldlayers WG Wave Guide 02 1 Light Field HEAT HEATER 03 1 Light Field Rules of critical dimension HEAT layer Values nm Minimum width lines 120 nm Minimum width spaces 250 nm SiO2 deposition 600nm Ti/TiN Deposition Litho of HEATER layer 03 CD min 120nm CD control in the outer control borderPassive Process + Etch Ti/TiN Stripping resist CD control measurement
  55. 55. Heater module•Fc@ fixed dose @etching 70nm 220nm FC WG 70nm Heater SiO2•Minimum CD: 120nm 2000nm SiO2•WG @ sweep dose @etching 220nm•Minimum CD: 120nm Si substrate•Heater @ fixed dose @etching 110nm•Minimum CD: line 120nm space 250nm
  56. 56. MPW Lateral PiN Ge Photodetectors offer Leti Ge PDs integrated at the end of the waveguide• No gds available but 11µm Pin A• Define a Pcell with a black box with defined Pin POPT optical connection 12µm 0.5µm RF connectionsWe will add the gds file for PD cell during mask Pin K integration Electrical PIN Design Rule Manual BlackBox Technological Document Photodetector Optical PIN
  57. 57. MPW Standardized Leti offer MPW Photodetector RF electrodes 01/06/2012 Input waveguide LETI CALL sign in Passives + PhotodetectorLateral PIN Ge diode 10 µm Sensitivity > 0.5A/W 10E1 3 0 -3 AC response (dB) -6 -9 -12 0V bias 0.5V bias -15 1.0V bias 2.0V bias -18 0.1 1 10 100 frequency (GHz)
  58. 58. Ge-on-Si lateral pin photodetectors of LETI
  59. 59. Epitaxy of germanium Low T /HighT cycle growth of Ge thick layers on 2.8 µm Ge Si(001)ECS Trans. 3, Vol. 7 (2006) 789 Si 1 µm400°C / 750°C Growth + 5 x{890°C, 5 min. / 750°C, 5 min.} M .D . Gethermal cycling : promotes theglide of threading dislocationstowards the substrat edges => {111} S.F .TDD ~ 107 cm-2; tensily strained<= different dilat. coeff. Si 50nm
  60. 60. Centura RP-CVD Tool Reduced Pressure-Chemichal Vapour Deposition toolEpi Centura : Epitaxy Epitaxy Process gases :- Mainframe - Carrier gas : H2- Pumps - SiGeC growth :- Scrubber SiH4 , SiCH6 and GeH4 (used gases) - Doping :- Gas cabinet n : AsH3 and PH3etc p : B2H6 - Selectivity : SiH2Cl2 + HCl Cool down - Pre-clean wafer centering Clean room wall
  61. 61. Strained Ge absorption Absorption coefficient @ 1.3 µm (1.55 µm) : 10 000 cm-1 (4500 cm-1);Direct band gap : 0.81 eV (bulk Ge)  0.78 eV (Ge/Si(001)) : tensile-strain.
  62. 62. Mask DUV 248nm minimum CD specificationsFollow the Design rules Manual for the specifications for each layersAnd fill in the table of layers the minimum CD for your gds or each layer Light field or Control Specification Define others CD Dark Minimum alignment with s of of Layer Acronym Description field CD layer overlays 1 FC Fiber coupler D (space 315nm) S400/L500/S400 none 2 WG Waveguide L (line 120nm) L400 2 on 1 +/-150nm
  63. 63. Photodetectors lithographies DUV 248nm5 layers in DUV 248 to build PD ‘s devicesBlock 1 User 1Block 2Block3 User 2 Mask Cost sharing different #Block 4 users User 3Block 5Block6 Maximum design field for 248nm mask rectangular 18.8 x 24.6 mm Maximum 6 blocks
  64. 64. Lateral diode: DC characteristics • Higher dark current / vertical • Few µA @ -1V • 30nA @ -0.1V0.8 A/W ± 0.2 A/W at 1.55 µm 73
  65. 65. Lateral diode: RF characteristics 10E1 3 0 AC response (dB) -3 -6 -9 -12 0V bias 0.5V bias -15 1.0V bias 2.0V bias -18 0.1 1 10 100 frequency (GHz)• Clear dependency of the BW width implantation spacing
  66. 66. Parametric minimum performance targeted• Parametrics performance at 1.55µmResponsivity e.g >0.5A/WDark current < 3µA @ -0.5 V biasBandwith > 10GHz at -3dB in S21 @ -2V bias
  67. 67. Packaging & Integration for Silicon Photonics
  68. 68. Fibre Coupled Semiconductor Lasers (high speed) optical fibre isolator laser focusing lens collimation lens
  69. 69. Hybrid Integration (high speed photodiodes) fibre in gripper welded fibreAssembly of Fibre in Butterfly Package Packaged 10G Burst Mode Receiver (modified laser welding system) (SiGe BMRx chip on CPW)
  70. 70. Photonics Design (optical, mechanical, thermal) Mechanical Design of Laser Package (inset shows actual image) Thermo-Mechanical Design of APD Array (APD array with integrated electronics)
  71. 71. Fibre Coupling to Silicon Waveguides ePIXfab Silicon Photonics Workshop, April 2012.
  72. 72. Fibre Coupling to Silicon Waveguides output fibre input fibre straight SOI waveguide Input and Output Coupling to Straight Waveguides ePIXfab Silicon Photonics Workshop, April 2012.
  73. 73. Fibre Coupling to Silicon Waveguides (tolerances) 3dB ± 5 mm 1dB ± 2.5° ePIXfab Silicon Photonics Workshop, April 2012.
  74. 74. Fibre Coupling to Silicon Waveguides (ePIXfab) packaged SOI ring resonator Linear Planar Gratings Insertion Loss (dB) Wavelength (nm) ePIXfab Silicon Photonics Workshop, April 2012.
  75. 75. Fibre Coupling to Silicon Waveguides (ePIXfab)Insertion Loss (dB) Curved Planar Gratings Ring Resonator Wavelength (nm) (Device #3 / Die:-2,-2) (peak transmission of -8.33dB) ePIXfab Silicon Photonics Workshop, April 2012.
  76. 76. Fibre Coupling to Silicon Waveguides (modulators, ...) Si photonic chip (modulator) electrical pins (not high speed) ePIXfab Silicon Photonics Workshop, April 2012.
  77. 77. Fibre Coupling to Silicon Waveguides (future offering)Silicon platform(high density interconnect) angled Silica waveguide standard fibre array block ePIXfab Silicon Photonics Workshop, April 2012.
  78. 78. Active Device Integration on Silicon Photonics flexible connector (3-sections for tuneable laser) ball lens & prism tunable laser 1,4 mm (AlN) tunable laser submount with grating coupling optics (submount can support high speed electronics) ePIXfab Silicon Photonics Workshop, April 2012.
  79. 79. VTT
  80. 80. Design KitsDesign Rule Manual Manual describing the design rules necessary to follow for design acceptance at the fabTechnology handbook Describes details of processing and performance characteristics of optical devices wherever available.DRC deck Using standard EDA tools (Mentor Graphics). Check the DRC errors yourself by running the DRC scriptSample gds files Of typical block sizes, standard grating couplers, etc.CAD software support Design kits with technology decks, building blocks and p-cells are available in the following software – PhoeniX (Imec, Leti) – Ipkiss (Imec) – PhotonDesign (under development) – Cadence IC (Leti)
  81. 81. Training and Support 5-day training, 2/yearProgram:• Technology• Design rules• Supply chain• Procedures• Hands-on design training (PhoeniX or Ipkiss) 1 day workshop, 1/year Upcoming Workshop: ECOC, Amsterdam, Sep 2012 Upcoming training: April 2012, full Next Training: November, 5-9, IHP Germany
  82. 82. Industrial Use• Evaluation excercises• MPW chips & packages• Transfer to foundry services: ePIXfab website – advanced prototyping – development-on-demand – low volume production• Meet us near you
  83. 83. Contact InformationAddress: ePIXfab IMEC-Ghent University Dept. of Information Technology Sint-Pietersnieuwstraat 41, 9000 Gent, BelgiumWebsite: www.ePIXfab.euEmail: info@ePIXfab.euCall: + +32-9-264 3324Fax: +32-9-264 3593

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