UML, SysML and MARTE in Use, a      High Level Methodology for Real-time            and Embedded Systems                  ...
Presentation Outline• Introduction• MADES Overview   – Project Consortium, Motivations, SysML, MARTE, Approach and     Cha...
Project Consortium• Project type: Collaborative  Project (STREP)• Duration: 30 months• Project start: February 1, 2010• Pr...
Partner RolesUser needs, models and Use      Research/developmentCases                              Politecnico di Milano...
Motivations                            • Need of effective design                              methodologies for Real-    ...
SysML• For Systems Engineering    Aspects such as Non Functional     properties, Time concepts are     not present for RT...
MARTE• For RTES design and  specifications   –   Co-Design,   –   Non Functional properties,   –   Time aspects,   –   Sys...
The Vision       “MADES aims to develop a holistic, model-driven approach to       improve the current practice in the dev...
MADES Approach              Design activities exploit a dedicated            language developed as an extension to        ...
MADES Case StudiesMADES PROJECT– FP7 248864
End User Requirements• System Specification   – Requirements modeling   – Functional system design• System Co-Design   –  ...
Challenges for MADES• MARTE : designed to enable flexibility   – Drawback: Large number of concepts (700+ pages of specs) ...
Challenges for MADESMADES PROJECT– FP7 248864
MADES Methodology                             • Effective SysML/MARTE subset                                    SysML for...
MADES Implementation Approach                             • Generic MADES                               methodology, guide...
MADES Diagrams                    Requirements diagram                    SysML based requirements for initial system func...
MADES Diagrams                    Refined Functional Specification diagram                    Refinement of SysML concepts...
MADES Diagrams                    Detailed Hardware Specification diagram                    Refinement of hardware concep...
MADES Diagrams                        Clock Specification diagram                        Definition of system clock types ...
Modelio (Screenshot)                      Dedicated commands in Diagram Palette   Diagram Explorer                        ...
Car Collision Avoidance System• A system able to detect and prevent collisions   – Either using a radar tracking module   ...
Requirements specification  GOALS• Analyze high level requirements (or customer requirements)• Produce low level requireme...
Extract of CCAS SpecificationsSystem Requirements MADES PROJECT– FP7 248864
Functional Spec and Refined functionalspecification  GOALS• Identify SysML blocks and their relations• Identify what are t...
Extract of CCAS SpecificationsFunctional Specifications                               Mapping                             ...
Hardware Spec and Detailed HW Spec   GOALS• Hardware Specification to specify generic hardware concepts: memories,  proces...
Extract of CCAS Specifications                              Hardware                             SpecificationMADES PROJEC...
Extract of CCAS Specifications                                   Detailed                                  Hardware       ...
Software Spec and Detailed Software Spec  GOALS• Expressing execution platform software aspects such as  schedulers and ta...
Extract of CCAS Specifications                                   Software                                 SpecificationsMA...
Extract of CCAS Specifications                               Detailed                               Software              ...
Allocation specification  GOALS• Instantiating software and hardware defining number of  instances• Mapping (software to h...
Extract of CCAS Specifications                                  Allocation                                 SpecificationMA...
MADES Integrated Tool Set: Architecture  MADES PROJECT– FP7 248864
MADES: Verification and ValidationMADES PROJECT– FP7 248864
MADES: Verification and Validation Temporal Logic: Example of temporal propertiesMADES PROJECT– FP7 248864
MADES: Verification and Validation                                 Verification                                   ResultsM...
MADES: CCAS Hardware Generation• Automatic generation of implementation hardware from  MADES design models                ...
MADES: Synthesis on Execution Platform                  Synthesis                  Place & Route                 Programming
MADES: CCAS Software Generation• Through Anvilj and MADES Design models XMI,  MADES generates platform-specific software f...
MADES: CCAS Software Generation• Integrated into the Eclipse development environment• AnvilJ translate the to java output ...
Case Study - Refactoring of architecture Objective: a previously single-core program to be distributed automatically on a ...
Case Study - Single core platformMADES PROJECT– FP7 248864
Case Study - Detailed Software SpecMADES PROJECT– FP7 248864
Case Study – Two processor architectureMADES PROJECT– FP7 248864
Case Study – new allocation diagram                            Allocation diagram was modified to allocate                ...
AnvilJ - Refactoring of architecture• AnvilJ performed the refactoring and the code for  the new architecture was automati...
Conclusion• MADES : SysML/MARTE methodology   – Combined usage of the two complex profiles   – High level Modeling, Verifi...
Thanks!                   Alessandra Bagnato                   TXT e-solutions – Corporate Research Division              ...
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MADES Seminar @ Laboratory of Model-Driven Engineering Applied to Embedded Systems - CEA LIST Institute

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Lieu: salle 1073 (Nano-innov – Bat. 862)

Date: 24 Septembre 2012

Heure: 14:00 – 15:00

Orateur: Alessandra Bagnato

Titre: UML, SysML and MARTE in Use, a High Level Methodology for Real-time and Embedded Systems

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Résumé/Abstract

Rapid evolution of real-time and embedded systems (RTES) is continuing at an increasing rate, and new methodologies and design tools are needed to reduce design complexity while decreasing development costs and integrating aspects such as verification and validation. Model-Driven Engineering offers an interesting solution to the above mentioned challenges and is being widely used in various industrial and academic research projects.

The proposed seminar aims at presenting the development context and needs that have fostered the creation of a methodology and a set of UML, SysML and MARTE model-based diagrams within the research and development work carried out EU funded MADES project [http://www.mades-project.org/] which aims to develop novel model-driven techniques to improve existing practices in development of RTES for avionics and surveillance embedded systems industries.

The seminar aims at highlighting the current practice and needs in real Avionics development case studies and in particular takes advantage of the vision of an avionics system integrator, highlighting the perspective of the different needs of its different customers within the Avionics industry that have been taken as a basis to build the methodology and the set of diagrams.

The MADES Project is expected to deliver important improvements in each phase of embedded systems development lifecycle by providing new tools and technologies that support design, validation, simulation, and code generation, while providing better support for component reuse.

MADES technologies are expected to reduce development costs of complex embedded systems for the Aerospace, Defence and other key European industries, while enabling a next generation of highly complex embedded systems to be developed that are more reliable, yet costing less to maintain and evolve as industry needs change and hardware capabilities increase.

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MADES Seminar @ Laboratory of Model-Driven Engineering Applied to Embedded Systems - CEA LIST Institute

  1. 1. UML, SysML and MARTE in Use, a High Level Methodology for Real-time and Embedded Systems Alessandra Bagnato 24th September 2012, Laboratory of Model-Driven Engineering Applied to Embedded Systems - CEA LIST Institute SeminarMADES PROJECT– FP7 248864
  2. 2. Presentation Outline• Introduction• MADES Overview – Project Consortium, Motivations, SysML, MARTE, Approach and Challenges• MADES Methodology – Through a Car Collision Avoidance System (CCAS) example• Refactoring of architecture through code generator module example• Conclusions MADES PROJECT– FP7 248864
  3. 3. Project Consortium• Project type: Collaborative Project (STREP)• Duration: 30 months• Project start: February 1, 2010• Project end: July 31, 2012• Objective: Embedded Systems Design• 6 partners MADES PROJECT– FP7 248864
  4. 4. Partner RolesUser needs, models and Use Research/developmentCases  Politecnico di Milano(IT)  Cassidian [EADS] (DE)  University of York (UK)  TXT E Solutions (IT)Standardization and Technology/IT industrydissemination  Softeam (FR)  Open Group (UK)  TXT e-solutions (IT)MADES PROJECT– FP7 248864
  5. 5. Motivations • Need of effective design methodologies for Real- Time and Embedded Systems (RTES) • High abstraction level based approaches are promising: reducing time to market and system complexity – Model Driven Engineering, UMLMADES PROJECT– FP7 248864
  6. 6. SysML• For Systems Engineering  Aspects such as Non Functional properties, Time concepts are not present for RTES specifications  Allocation aspects• Widely adapted in the industry with supporting tools MADES PROJECT– FP7 248864
  7. 7. MARTE• For RTES design and specifications – Co-Design, – Non Functional properties, – Time aspects, – System analysis possible• Specification are complex to use• Currently lacks sufficient tool support and complete methodologies MADES PROJECT– FP7 248864
  8. 8. The Vision “MADES aims to develop a holistic, model-driven approach to improve the current practice in the development of embedded systems. The proposed approach covers all phases, from design to code generation and deployment”MADES PROJECT– FP7 248864
  9. 9. MADES Approach Design activities exploit a dedicated language developed as an extension to OMGs MARTE and SysML profiles Validation include the verification of key properties on designed artifacts, closed- loop simulation Code generation addresses both hardware description languages and conventional programming languagesMADES PROJECT– FP7 248864
  10. 10. MADES Case StudiesMADES PROJECT– FP7 248864
  11. 11. End User Requirements• System Specification – Requirements modeling – Functional system design• System Co-Design – Software design – Hardware design – Allocation – Timing and Scheduling – Behavior• Verification, Simulation, Code Generation and Synthesis MADES PROJECT– FP7 248864
  12. 12. Challenges for MADES• MARTE : designed to enable flexibility – Drawback: Large number of concepts (700+ pages of specs) – Same concept can be applied to different UML elements (classes, instances, connectors, ports, attributes) – Same design may be modeled in different ways using MARTE concepts from different MARTE packages and different UML elements – Current academic/industrial MARTE modeling tools are too generic : provide all concepts, no usage tips – Lack of guidelines and examples• SysML and MARTE combination: poorly expressed – Not effective dedicated methodologies or tools – Need of lowering entry barriers MADES PROJECT– FP7 248864
  13. 13. Challenges for MADESMADES PROJECT– FP7 248864
  14. 14. MADES Methodology • Effective SysML/MARTE subset  SysML for functional specificationsSysML  MARTE for non functional and co-design specifications  UML behavioral specificationsMARTE supported  Integration of Verification and Validation (V&V) + code generation concepts • Dedicated diagrams • Influence on future revisions of SysML and MARTE standards MADES PROJECT– FP7 248864
  15. 15. MADES Implementation Approach • Generic MADES methodology, guidelines and examples to guide system designers:  Modeling, Verification  Code generation, Synthesis • Reducing ambiguities • Reducing design time and costs • Reinforce formality for Validation and Verification MADES PROJECT– FP7 248864
  16. 16. MADES Diagrams Requirements diagram SysML based requirements for initial system functional requirements UML behavioral diagrams Use case, Activity, Sequence, State and Interaction overview for initial system behavior Functional/Internal Functional Specification diagrams Description of system functionality by means of SysML block and internal block descriptionsMADES PROJECT– FP7 248864
  17. 17. MADES Diagrams Refined Functional Specification diagram Refinement of SysML concepts into MARTE aspects, addition of non functional properties Hardware Specification diagram Description of generic hardware : nodes, memories, communication channels, clocks etc Software Specification diagram Description of application tasks and software aspects running on hardware platformMADES PROJECT– FP7 248864
  18. 18. MADES Diagrams Detailed Hardware Specification diagram Refinement of hardware concepts with details closer to execution platform details Detailed Software Specification diagram Description of underlying OS (if any), refinement of software aspects Allocation Specification diagram Mapping of software and hardware aspects of the systemMADES PROJECT– FP7 248864
  19. 19. MADES Diagrams Clock Specification diagram Definition of system clock types and clocks, clock and timing constraints for hardware/software aspects• Dedicated commands in each MADES diagram to speed up the design process – Implemented in Modelio Open Source CASE tool – Valuable input from partners to improve design experience – Increased efficiency, decrease in design time MADES PROJECT– FP7 248864
  20. 20. Modelio (Screenshot) Dedicated commands in Diagram Palette Diagram Explorer MADES tabMADES PROJECT– FP7 248864
  21. 21. Car Collision Avoidance System• A system able to detect and prevent collisions – Either using a radar tracking module – Or an image processing module MADES PROJECT– FP7 248864
  22. 22. Requirements specification GOALS• Analyze high level requirements (or customer requirements)• Produce low level requirementsBY MEANS• SysML requirement diagrams• SysML requirement objects and their relation
  23. 23. Extract of CCAS SpecificationsSystem Requirements MADES PROJECT– FP7 248864
  24. 24. Functional Spec and Refined functionalspecification GOALS• Identify SysML blocks and their relations• Identify what are the «active» functionality and resources• Refine blocks to MARTE active and passive unitsBY MEANS• SysML blocks• MARTE’s High level Application Modeling package is used to differentiate between active and passive system components.• MARTE ppUnit and rtUnit stereotypes
  25. 25. Extract of CCAS SpecificationsFunctional Specifications Mapping Refined Functional Specifications MADES PROJECT– FP7 248864
  26. 26. Hardware Spec and Detailed HW Spec GOALS• Hardware Specification to specify generic hardware concepts: memories, processing nodes, communication channels, etc• Detailed Hardware Specification to refine the abstract hardware concepts (e.g. processing node -> PowerPC (adding information about frequency, number of cores, etc)) BY MEANS• By means of MADES Hardware diagram and MARTE’s Generic Resource Modeling concepts• By means of MADES Detailed Hardware diagram and MARTE’s Hardware Resource Modeling package
  27. 27. Extract of CCAS Specifications Hardware SpecificationMADES PROJECT– FP7 248864
  28. 28. Extract of CCAS Specifications Detailed Hardware SpecificationMADES PROJECT– FP7 248864
  29. 29. Software Spec and Detailed Software Spec GOALS• Expressing execution platform software aspects such as schedulers and tasks; as well as their attributes and policies (e.g. priorities, etc.).BY MEANS• The MADES Software Specification Diagram and MARTE’s Generic Resource Modeling package• MADES Detailed Software Specification Diagram and MARTE’s Software Resource Modeling concepts
  30. 30. Extract of CCAS Specifications Software SpecificationsMADES PROJECT– FP7 248864
  31. 31. Extract of CCAS Specifications Detailed Software SpecificationsMADES PROJECT– FP7 248864
  32. 32. Allocation specification GOALS• Instantiating software and hardware defining number of instances• Mapping (software to hardware) or refining (SysML blocks to MARTE RtUnit/Ppunit concepts)• Enabling to create complete “configurations” of the systemBY MEANS• MADES Allocation diagram
  33. 33. Extract of CCAS Specifications Allocation SpecificationMADES PROJECT– FP7 248864
  34. 34. MADES Integrated Tool Set: Architecture MADES PROJECT– FP7 248864
  35. 35. MADES: Verification and ValidationMADES PROJECT– FP7 248864
  36. 36. MADES: Verification and Validation Temporal Logic: Example of temporal propertiesMADES PROJECT– FP7 248864
  37. 37. MADES: Verification and Validation Verification ResultsMADES PROJECT– FP7 248864
  38. 38. MADES: CCAS Hardware Generation• Automatic generation of implementation hardware from MADES design models XMI MHS MADES PROJECT– FP7 248864
  39. 39. MADES: Synthesis on Execution Platform Synthesis Place & Route Programming
  40. 40. MADES: CCAS Software Generation• Through Anvilj and MADES Design models XMI, MADES generates platform-specific software from architecturally-neutral software specifications.• Programmers – write Java code for a standard desktop computer (architectural neutral code ) without having to consider the true target hardware – deploy their code by writing a simple text file that places some of the threads and object instances onto the processors of the target hardware. MADES PROJECT– FP7 248864
  41. 41. MADES: CCAS Software Generation• Integrated into the Eclipse development environment• AnvilJ translate the to java output code, according to the provided mappings, to work on the target hardware https://rtslab.wikispaces.com/AnvilJ
  42. 42. Case Study - Refactoring of architecture Objective: a previously single-core program to be distributed automatically on a two processor architecture. Radar Control Panel Mock-up - 5 Java Tasks MADES PROJECT– FP7 248864
  43. 43. Case Study - Single core platformMADES PROJECT– FP7 248864
  44. 44. Case Study - Detailed Software SpecMADES PROJECT– FP7 248864
  45. 45. Case Study – Two processor architectureMADES PROJECT– FP7 248864
  46. 46. Case Study – new allocation diagram Allocation diagram was modified to allocate the tasks in a different wayMADES PROJECT– FP7 248864
  47. 47. AnvilJ - Refactoring of architecture• AnvilJ performed the refactoring and the code for the new architecture was automatically generated.• The result was to move the panel data task to the second processor. The panel data GUI was run on the second processor and was still communicating with changing code.• For more details on AnvilJ please visit https://rtslab.wikispaces.com/AnvilJ MADES PROJECT– FP7 248864
  48. 48. Conclusion• MADES : SysML/MARTE methodology – Combined usage of the two complex profiles – High level Modeling, Verification & Validation, Code generation and eventual platform implementation on FPGA• MADES diagrams and guidelines available • 10 dedicated diagrams + 5 UML behavioral diagrams – Available as open source at http://www.modelio.org/ • Rapid prototyping of RTES• Possible positive influences on future versions of OMG specifications MADES PROJECT– FP7 248864
  49. 49. Thanks! Alessandra Bagnato TXT e-solutions – Corporate Research Division alessandra.bagnato@txt.it alebagnato@yahoo.com MADES Project Web Site: http://www.mades-project.org/The research leading to these results has received funding from the EuropeanCommunitys Seventh Framework Programme (FP7/2007-2013) undergrant agreement n° 248864. MADES PROJECT– FP7 248864

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