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The continuous rapid evolution of modern embedded systems has given rise to new challenges: such as increasingly complex design processes that cause delays in time to market and escalation of overall design costs. Additionally, these systems are more prone to containing errors, and it becomes more relevant to provide designers with effective tools to aid them in overcoming the difficulties related to the overall system design, verification and validation as soon as possible. During research carried out in several European projects related to real-time embedded systems, relevant industrial and academic end users feedback were gathered and summarized. This resulted in creation of novel design methodologies that were integrated in a high level modelling environment to increase the overall system design productivity. The requests and feedback deriving from the carried out research projects and aiming to guide embedded system designers taking full advantage of high level methodologies by utilizing the UML standard and its SysML and MARTE profiles are summarized in the presentation.