branch ins 8051

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branch ins 8051

  1. 1. BRANCH INSTRUCTIONS CALL, JMP, RET
  2. 2. Branching instructions <ul><li>Program branching instructions are used to </li></ul><ul><li>control the flow of actions in a program </li></ul><ul><li>Some instructions provide decision making capabilities and transfer control to other parts of the program. </li></ul><ul><ul><li>e.g. conditional and unconditional branches </li></ul></ul>
  3. 3. CALL  ACALL & LCALL <ul><li>The 8051 provides 2 forms for the CALL instruction: </li></ul><ul><ul><li>Absolute Call – ACALL </li></ul></ul><ul><ul><ul><li>Uses an 11-bit address </li></ul></ul></ul><ul><ul><ul><li>The subroutine must be within the same 2K page . </li></ul></ul></ul><ul><ul><li>Long Call – LCALL </li></ul></ul><ul><ul><ul><li>Uses a 16-bit address </li></ul></ul></ul><ul><ul><ul><li>The subroutine can be anywhere. </li></ul></ul></ul><ul><ul><li>Both forms push the 16-bit address of PC on the stack and update the stack pointer. </li></ul></ul>
  4. 4. Absolute Call – ACALL addr11 <ul><li>This instruction unconditionally calls a subroutine indicated by the address </li></ul><ul><li>2 byte instruction : The upper 3-bits of the address combine with the 5-bit opcode to form the 1 st byte and the lower 8-bits of the address form the 2 nd byte </li></ul><ul><li>Eg. ACALL LOC_SUB </li></ul><ul><li>If SP=07H initially </li></ul><ul><li>label “LOC_SUB” is at memory 0567H, </li></ul><ul><li>then executing instruction at 0230H (PC), </li></ul><ul><ul><li>SP=09H, internal RAM locations 08H and 09H will contain 32H and 02H respectively and PC=0567H </li></ul></ul>
  5. 5. LONG CALL - LCALL addr16 <ul><li>It is a Long call, the subroutine may therefore begin anywhere in the full 64 kB program memory address space </li></ul><ul><li>3 byte instruction </li></ul><ul><li>LCALL LOC_SUB </li></ul><ul><li>Initially, SP=07H </li></ul><ul><li>label “LOC_SUB” is at memory 4100H </li></ul><ul><li>Executing the instruction at 0230H ( PC), </li></ul><ul><ul><li>SP=09H , internal RAM locations 08H and 09H contain 33H and 02H respectively and PC=4100H </li></ul></ul>
  6. 6. RETURN  RET & RETI <ul><li>The 8051 provides 2 forms for the return instruction: </li></ul><ul><ul><li>Return from subroutine – RET </li></ul></ul><ul><ul><ul><li>Pop the return address from the stack and continue execution there. </li></ul></ul></ul><ul><ul><li>Return from ISR – RETI </li></ul></ul><ul><ul><ul><li>Pop the return address from the stack. </li></ul></ul></ul><ul><ul><ul><li>Restore the interrupt logic to accept additional interrupts at the same priority level as the one just processed . </li></ul></ul></ul><ul><ul><ul><li>Continue execution at the address retrieved from the stack. </li></ul></ul></ul><ul><ul><ul><li>The PSW is not automatically restored. </li></ul></ul></ul>
  7. 7. JUMP  SJMP <ul><li>The 8051 provides four different types of unconditional jump instructions: </li></ul><ul><li>Short Jump – SJMP addr </li></ul><ul><ul><ul><li>Uses an 8-bit signed offset relative to the 1 st byte of the next instruction . </li></ul></ul></ul><ul><ul><ul><li>the range of destination allowed is from -128 to+127 bytes from the instruction </li></ul></ul></ul><ul><li>SJMP RELSRT </li></ul><ul><ul><ul><li>If the label RELSRT is at program memory location 0120H and the SJMP instruction is located at address 0100H ( PC) ,after executing the instruction, PC=0120H </li></ul></ul></ul>
  8. 8. JUMP  LJMP <ul><li>Long Jump – LJMP </li></ul><ul><ul><ul><li>Uses a 16-bit address . </li></ul></ul></ul><ul><ul><ul><li>3 byte instruction capable of referencing any location in the entire 64K of program memory. </li></ul></ul></ul><ul><li>LJMP FAR_ADR </li></ul><ul><li>If the label FAR_ADR is at program memory location 3456H </li></ul><ul><ul><li>the LJMP instruction at location 0120H (PC) </li></ul></ul><ul><ul><li>After instruction, it loads the PC with 3456H </li></ul></ul>
  9. 9. JUMP  AJMP <ul><ul><li>Absolute Jump – AJMP </li></ul></ul><ul><ul><ul><li>Uses an 11-bit address . </li></ul></ul></ul><ul><ul><ul><li>2 byte instruction </li></ul></ul></ul><ul><ul><ul><li>The 11-bit address is substituted for the lower 11-bits of the PC to calculate the 16-bit address of the target. </li></ul></ul></ul><ul><ul><ul><li>The location referenced must be within the 2K Byte </li></ul></ul></ul><ul><li>AJMP NEAR </li></ul><ul><ul><ul><li>If the label NEAR is at program memory location 0120H , the AJMP instruction at location 0234H (PC) loads the PC with 0120H </li></ul></ul></ul>
  10. 10. Indirect Jump <ul><li>This instruction adds the 8-bit unsigned value of the ACC to the 16-bit data pointer and the resulting sum is returned to the PC </li></ul><ul><li>Neither ACC nor DPTR is altered </li></ul><ul><li>No flags are affected </li></ul><ul><li>MOV DPTR, #LOOK_TBL </li></ul><ul><li>JMP @A + DPTR </li></ul><ul><li>LOOK_TBL: AJMP LOC0 </li></ul><ul><li>AJMP LOC1 </li></ul><ul><li>AJMP LOC2 </li></ul><ul><ul><ul><li>If the ACC=02H , execution jumps to LOC2 </li></ul></ul></ul><ul><ul><ul><li>AJMP is a two byte instruction </li></ul></ul></ul>
  11. 11. CONDITIONAL JUMP <ul><li>The 8051 supports different conditional jump instructions. </li></ul><ul><ul><li>ALL conditional jump instructions use an 8-bit address. </li></ul></ul><ul><ul><li>Jump on Zero – JZ / JNZ </li></ul></ul><ul><ul><ul><li>Jump if the A == 0 / A != 0 </li></ul></ul></ul><ul><ul><ul><ul><li>The check is done at the time of the instruction execution. </li></ul></ul></ul></ul><ul><ul><li>Jump on Carry – JC / JNC </li></ul></ul><ul><ul><ul><li>Jump if the C flag is set / cleared. </li></ul></ul></ul>
  12. 12. CONDITIONAL JUMP <ul><ul><li>Jump on Bit – JB / JNB </li></ul></ul><ul><ul><ul><li>Jump if the specified bit is set / cleared. </li></ul></ul></ul><ul><ul><ul><li>Any addressable bit can be specified. </li></ul></ul></ul><ul><ul><li>Jump if the Bit is set then Clear the bit – JBC </li></ul></ul><ul><ul><ul><li>Jump if the specified bit is set. </li></ul></ul></ul><ul><ul><ul><li>Then clear the bit. </li></ul></ul></ul>
  13. 13. Compare and Jump if Not Equal – CJNE <ul><ul><li>Compare the magnitude of the two operands and jump if they are not equal. </li></ul></ul><ul><ul><ul><li>The values are considered to be unsigned. </li></ul></ul></ul><ul><ul><ul><li>The Carry flag is set / cleared appropriately. </li></ul></ul></ul><ul><ul><ul><li>CJNE A, direct, rel </li></ul></ul></ul><ul><ul><ul><li>CJNE A, #data, rel </li></ul></ul></ul><ul><ul><ul><li>CJNE Rn, #data, rel </li></ul></ul></ul><ul><ul><ul><li>CJNE @Ri, #data, rel </li></ul></ul></ul>
  14. 14. Decrement and Jump if Not Zero – DJNZ <ul><ul><li>Decrement the first operand by 1 and jump to the location identified by the second operand if the resulting value is not zero. </li></ul></ul><ul><li>DJNZ 20H,LOC1 </li></ul><ul><li>DJNZ 30H,LOC2 </li></ul><ul><li>DJNZ 40H,LOC3 </li></ul><ul><ul><ul><li>If internal RAM locations 20H, 30H and 40H contain the values 01H, 5FH and 16H respectively, </li></ul></ul></ul><ul><ul><ul><li>the above instruction sequence will cause a jump to the instruction at LOC2 , with the values 00H, 5EH, and 15H in the 3 RAM locations </li></ul></ul></ul>
  15. 15. NOP <ul><li>This is the no operation instruction </li></ul><ul><li>The instruction takes one machine cycle operation time </li></ul><ul><li>Hence it is useful to time the ON/OFF bit of an output port </li></ul><ul><li>CLR P1.2 </li></ul><ul><li>NOP </li></ul><ul><li>NOP </li></ul><ul><li>NOP </li></ul><ul><li>NOP </li></ul><ul><li>SETB P1.2 </li></ul>

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