ADVEInc     Electronics & IC Design Services               www.advlsi.com                  Pierre Dermy02/25/2010     Adva...
Simulation of             Integrated Circuits (IC’s)             Used in Medical Products     • Medical Electronics:      ...
IC Design?          Complexity is out-of-hand• 2010 Si die:   4 X 1980-size, 0.03 m min. feature size,                 1,2...
IC Design? ~ 100 % Virtual Prototyping• Detailed design flow:  System partitioning into manageable blocks  Mix of bottom-u...
Simulations - Purpose and Goals                     “No untested feature”             • Design Validation - Exhaustive    ...
Hierarchical modeling                   and simulation        • Cell-based design:          hierarchy of function blocks, ...
Hierarchical test benches                  and test suites     • Hardware and software/firmware integration       thorough...
IC Design Example 1: ASIC Block Diagram                 Medical Implant Vibrator Capsule02/25/2010           Advanced VLSI...
Structure ASIC and Full-Custom Design Flow      Resources Plan &             Functional &Technical                   Techn...
IC Design Example 2             High power and large bandwidth amplifier• Key technical specifications:  Max. operating vo...
IC Example 2: Circuit Schematics  Class-AB Output (1), Predriver (2), Feedfwd Comp. (3)                                  ...
IC Example 2: Circuit Schematics  Input Stage (1), Biasing Network (2)                                                   ...
IC Example 2: SPICE circuit simulation test bench                                             • Circuit simulation environ...
IC Example 2: Circuit simulation test bench                                 • Device Under Test, Prototype Breadboard     ...
IC Example 2: Circuit simulation results – Basic IC characteristics and operation             OpAmp Bode Diagram          ...
IC Example2 : Circuit simulation results – Basic PCB application, nominal test conditions02/25/2010                    Adv...
IC Example 2: Circuit simulation results - Monitoring of supply current, design optimization02/25/2010                    ...
IC Example 2: Circuit simulation results – IC under stress, extreme operation for failure                                 ...
IC Example 2: Circuit simulation results – Detailed operation to remedy failure mode             Deep microprobing:       ...
IC meets all technical specifications                First-pass tape-out success• Refined circuits models:  All electrical...
Projects Portfolio Example: IC Mask Layout – Basic Cells / Building Blocks02/25/2010                    Advanced VLSI Engi...
Projects Portfolio Example: IC Mask Layout – Major Sections with strict constraints02/25/2010                     Advanced...
Projects Portfolio Example: IC Mask Layout – Top Level / Die Assembly02/25/2010                   Advanced VLSI Engineerin...
Projects Portfolio Example: Netlist  Logic and Circuit Simulations – Design Validation                                  T...
Cell libraries, SRAM, PLL, and ADC Design                  and Si Foundry Contract Services                               ...
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ADVEInc "Meet the Experts Forum 25February2010 - Electronics & IC Design Services

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Examples and methods of integrated circuit design: Analog, Digital, RF, SRAM. Mostly full custom, design for test and manufacturing i.e. high-yied and first-pass transfer to production! (30 years of experience, we have seen and done it all...)

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ADVEInc "Meet the Experts Forum 25February2010 - Electronics & IC Design Services

  1. 1. ADVEInc Electronics & IC Design Services www.advlsi.com Pierre Dermy02/25/2010 Advanced VLSI Engineering, Inc. 1
  2. 2. Simulation of Integrated Circuits (IC’s) Used in Medical Products • Medical Electronics: Very high reliability and long operating life Thoroughly tested, fully characterized Stable characteristics over time FDA approved/certified • Two types of IC’s Very low-power: A/nA, standby mode High peak power, temperature surges02/25/2010 Advanced VLSI Engineering, Inc. 2
  3. 3. IC Design? Complexity is out-of-hand• 2010 Si die: 4 X 1980-size, 0.03 m min. feature size, 1,200,000,000 transistors• Moving into 3-D Integration: through-die via, die stack-up• Critical circuits: hard to see/identify, cannot be probed Behaviors vary with time and operating sequences• Hardware similar to software: unforeseen side effects• Photomasks, tooling, Si-fab equipment costs up by 100 X• Hierarchical computer models and simulations of IC’s replace breadboards and proof-of-design PCB’s02/25/2010 Advanced VLSI Engineering, Inc. 3
  4. 4. IC Design? ~ 100 % Virtual Prototyping• Detailed design flow: System partitioning into manageable blocks Mix of bottom-up and top-down methods Library of specialized and well characterized circuit cells• Each level of hierarchy: models – simulations – test suites• Si technology (CMOS/BiCMOS): device models very critical correlation to Physics and lab. measurements• BSIM => Failure. Use EKV (EPFL), evolve to SP models• Stick to Physics, avoid empirical I/V curve-fitting• A well-characterized technology means well-understood parametric variances: the most critical for success02/25/2010 Advanced VLSI Engineering, Inc. 4
  5. 5. Simulations - Purpose and Goals “No untested feature” • Design Validation - Exhaustive Accurate and well documented operation according to all detailed functional and performance specifications • Design Optimization Power consumption, circuit stability • Quality Assurance: Manufacturing Yield Long-term Reliability02/25/2010 Advanced VLSI Engineering, Inc. 5
  6. 6. Hierarchical modeling and simulation • Cell-based design: hierarchy of function blocks, macrocells, circuit cells from a well characterized library • Behavioral/Functional Level: C/C++, System C/Verilog, VerilogA, Matlab, MathCAD • RTL: Verilog, VerilogA, VHDL • Logic/Gate Level: Verilog, VHDL • Circuit level: SPICE, Eldo02/25/2010 Advanced VLSI Engineering, Inc. 6
  7. 7. Hierarchical test benches and test suites • Hardware and software/firmware integration thorough/exhaustive test plan • Documentation: IC design and production test • Test bench and test suite for each level of modeling-simulation • Test bench: IC model, test hardware, set of conditions and environment (Specs) • Test Suite: test cases and ops sequences, stacked and imbricated like Russian dolls02/25/2010 Advanced VLSI Engineering, Inc. 7
  8. 8. IC Design Example 1: ASIC Block Diagram Medical Implant Vibrator Capsule02/25/2010 Advanced VLSI Engineering, Inc. 8
  9. 9. Structure ASIC and Full-Custom Design Flow Resources Plan & Functional &Technical Technology Project Timeline Specifications Evaluation &/^ Selection Design Structure & Partition Design Adjustment Models: Test, Validation & QA Plan Parameters & Procedures Devices, Base Cells & Macros Behavioral & RTL Macrocells Test Benches models logic & ckt design Test Suites Logic & Ckt Synthesis Hierarchical Schematics Test Fixtures Physical Design I C M a s k L a y o ut Proto Evaluation Validation Procedure02/25/2010 Advanced VLSI Engineering, Inc. 9
  10. 10. IC Design Example 2 High power and large bandwidth amplifier• Key technical specifications: Max. operating voltage 30 V DC Gain A0 > 60 dB Unity gain bandwidth > 100 MHz Capacitive load 100 pF Full rail output swing• Application requirements: Operation with supply voltage down to 5.0 V Stability with resistive and low-capacitive load• Wish-list and feature to get “design wins” and sell: Optimum power efficiency ESD and shorts protection02/25/2010 Advanced VLSI Engineering, Inc. 10
  11. 11. IC Example 2: Circuit Schematics  Class-AB Output (1), Predriver (2), Feedfwd Comp. (3) Bipolar OpAmp for EMI Filter VCC: 30 V, UGBW: 100 MHz, CL: 100 pF ( 1) (3) ( 2)02/25/2010 Advanced VLSI Engineering, Inc. 11
  12. 12. IC Example 2: Circuit Schematics  Input Stage (1), Biasing Network (2) (1) ( 2) Bipolar OpAmp for EMI Filter VCC: 30 V, UGBW: 100 MHz, CL: 100 pF02/25/2010 Advanced VLSI Engineering, Inc. 12
  13. 13. IC Example 2: SPICE circuit simulation test bench • Circuit simulation environment and controls • Links to DUT and Test Bench schematics • Technology parameters, Si device models with manufacturing tolerances • Test conditions, load and application parameters • Circuit models with various levels of refinement to include 2nd order effects02/25/2010 Advanced VLSI Engineering, Inc. 13
  14. 14. IC Example 2: Circuit simulation test bench • Device Under Test, Prototype Breadboard or PCB, connectors to test equipment • Power supplies, input signal generators • Type of test, signal probes and measured signals and parameters02/25/2010 Advanced VLSI Engineering, Inc. 14
  15. 15. IC Example 2: Circuit simulation results – Basic IC characteristics and operation OpAmp Bode Diagram Under nominal conditions (PVT) P: Process / technology parameters skew V: Supply voltage T: Die operating temperature Circuit design adjustments: Transistor and resistor sizes I/V biasing points Specified DC Gain and UGB Stability under ranges of output load and supply voltage02/25/2010 Advanced VLSI Engineering, Inc. 15
  16. 16. IC Example2 : Circuit simulation results – Basic PCB application, nominal test conditions02/25/2010 Advanced VLSI Engineering, Inc. 16
  17. 17. IC Example 2: Circuit simulation results - Monitoring of supply current, design optimization02/25/2010 Advanced VLSI Engineering, Inc. 17
  18. 18. IC Example 2: Circuit simulation results – IC under stress, extreme operation for failure modes Sensitivity analysis: Effect of LF/DC input bias and device drifts Onset of oscillations and possible circuit instability Design refinements and improved noise immunity02/25/2010 Advanced VLSI Engineering, Inc. 18
  19. 19. IC Example 2: Circuit simulation results – Detailed operation to remedy failure mode Deep microprobing: Very difficult to perform on a physical prototype, requiring special test set-up and Si die access Impossible to perform in submicron semiconductor technologies02/25/2010 Advanced VLSI Engineering, Inc. 19
  20. 20. IC meets all technical specifications First-pass tape-out success• Refined circuits models: All electrical parasitics (wire and connector RC’s, inductive couplings, device leakages, noise sources…)• Manufacturing tolerances, device aging, thermal effects• Post-processing of simulation results: Tabulations, curve fittings, Shmoo plots and distributions Comparison and correlation to lab. measurements• Design closure: All the bugs out, improved reliability Some prediction of manufacturing yield02/25/2010 Advanced VLSI Engineering, Inc. 20
  21. 21. Projects Portfolio Example: IC Mask Layout – Basic Cells / Building Blocks02/25/2010 Advanced VLSI Engineering, Inc. 21
  22. 22. Projects Portfolio Example: IC Mask Layout – Major Sections with strict constraints02/25/2010 Advanced VLSI Engineering, Inc. 22
  23. 23. Projects Portfolio Example: IC Mask Layout – Top Level / Die Assembly02/25/2010 Advanced VLSI Engineering, Inc. 23
  24. 24. Projects Portfolio Example: Netlist  Logic and Circuit Simulations – Design Validation T-SPICE circuit simulation waveforms over full PVT ranges * Process skew combinations: strong/nominal/weak active devices and high/nominal/low ckt parasitics (IC die, package, PCB) * Supply Voltage: min., nominal, max. * Operating Temperature (die junction and thermal effects analysis)02/25/2010 Advanced VLSI Engineering, Inc. 24
  25. 25. Cell libraries, SRAM, PLL, and ADC Design and Si Foundry Contract Services • Cell library: CMOS 0.25um, 1 poly, 4 metal • SRAM: 256Kx4 bits, 6 nsec R/W • Buffered PECL I/O • Circuit design and IC layout compatible with three Si foundries • Total effort: 6 man-months • Entirely designed with L-Edit Pro, T-Spice Pro Advanced VLSI A Division of Tanner Research, Inc. Engineering offers complete solutionsJoint marketing campaign with CAD tool vendor (1999) specializing in multiple sourcing to Si foundries02/25/2010 Advanced VLSI Engineering, Inc. 25

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