Integrated solar energy harvesting and storage


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Integrated solar energy harvesting and storage

  1. 1. Integrated solar energyharvesting and Storage K.V.Abhinav(09B91A0435)
  2. 2. Presentation Overview• Wireless Sensor System Overview• Energy Harvesting & Storage• Design Considerations• Experimental Results• Conclusion
  3. 3. Wireless Sensor System• A wireless sensor system uses sensors to monitor physical or environmental conditions• A typical system consist of one or more transmitter nodes sending measurement date to a receiver or base connected to a host PC that monitors or records the data.• The predominant wireless sensor standards being deployed in the field currently are ISA100.11a, Wireless Hart and Zigbee
  4. 4. Transmitter(Node) operation It typically measures temperature, humidity, voltage or current Radio transmit power, transmit cycle time and ambient conditions effect the power consumption. Short range radio consumes most power. Radio wakes periodically from sleep mode and transmit measurement data to the receiving base. During each transmit ion of data the current drain placed on the battery usually spikes to levels in the hundreds of milliamps
  5. 5. Powering the Transmitter(Node) Most wireless transmitters are currently powered by limited-life (non-rechargeable) Lithium or Alkaline batteries. The Lithium Thionyl Chloride battery technology provides the highest energy density, three times higher than Alkaline (Zinc Manganese Dioxide) batteries. A standard 3.6V C size cell on average has a capacity of 8500 mAh Generally they have the widest operating temperature range of -76F to + 185 F, ideal for industrial and field applications Alkaline batteries are sometimes used in wireless transmitter design but they lack the same length of performance and reliability.
  6. 6. What is Energy Harvesting ??Energy Harvesting, or energy scavenging, is the process bywhich energy is derived from ambient external sources thatwould otherwise be lost as heat, light, sound, vibration ormovement. This free energy is captured, and stored.The process, also known as energy scavenging, capturesresidual energy as a byproduct of a natural environmentalphenomenon or industrial process and is thereforeconsidered "free energy." More often than not, this residualenergy is released into the environment as waste
  7. 7. Energy Scavenging Photodiodes The above figure shows the block diagram of a typical wireless sensor node powered by light, mechanical vibration, and a battery. Light energy and vibrations are converted to electrical energy by Photodiodes and electromechanical transducers, respectively. The system’s energy gathering ability will depend on environmental conditions which change over time and the scavenged energy needs to be regulated before being used. The sensor node consists of an analog-to-digital converter (ADC) that samples sensor data, a DSP core, and an RF transceiver. For low duty cycles, average power for this system can be under 5 μW.
  8. 8. Design Considerations The layout and design of an energy scavenging photodiode must balance several competing factors. The charge generated in the depletion region of the photodiode is stored in on-chip capacitors; Therefore the physical layout of the diodes should facilitate both the solar energy harvesting and capacitive energy storage. Light reaching the photodiode depletion region must first pass through the passivation layers and around the storage capacitance, which is constructed on top of the diode to reduce area.
  9. 9. Design Considerations Optical efficiency (OE), defined as the fraction of incident light onto the chip’s surface which reaches the photodiode, is influenced by three loss factors: reflection losses, absorption losses, and critical angle losses. Once photons reach the photodiode, the quantum efficiency (QE) determines how many photons will generate electron-hole pairs. The product of OE and QE should be maximized by the geometry of the energy scavenging photodiode and storage capacitances to maximize output power.
  10. 10. Design Considerations To explore the photodiode design tradeoffs experimentally, three different geometries were fabricated and tested. The first design (D1) is shown in Figure (a) and is similar to a passive pixel structure used for a CMOS imager. The p-substrate and n-well form the diode. The second design (D2) is shown in Figure (b). This structure uses fingers of p-diffusion inside the n-well in addition to the n-well to p-substrate junction to form more diodes connected in parallel with the well-substrate diode. The final design (D3) is shown in Figure (c). The D2 layout is similar to the D3 layout except every other p- diffusion finger is replaced with an n-diffusion.
  11. 11. Top view of photodiodes D1, D2 and D3
  12. 12.  The goal of this work is to determine the maximum energy per area that can be gathered from solar energy and stored in a standard CMOS logic process. To determine the energy capacitance per area must be calculated. The total capacitance is given by where Ev is the energy stored in the capacitor, ΔVsolar is the voltage difference between the metal plates Ct is the total capacitance, which is made up of the metal capacitance Cm and the diode capacitance Cd.
  13. 13. Experimental Results The experimental light source was a typical tungsten filament incandescent bulb chosen to model indoor environmental conditions. At high light intensities, D3 generates more power per area than the other designs. However, D3 shows the highest sensitivity of output power to varying load resistance. For all three diodes, the optimal load resistance is a function of light intensity, with high intensity yielding lower optimal load resistance. D1 is least sensitive to light intensity and load resistance. No significant power loss was observed from the blocking of light by the storage capacitance
  14. 14. Experimental results The below figures show the measured output power plotted versus light intensity and load resistance for the three photodiodesFor Diode(D1) For Diode(D2) For Diode(D3)
  15. 15. Conclusion The above figure plots a figure-of-merit (FOM) for each photodiode which is defined as the maximum delivered power for a given level of illumination divided by the product of the open circuit voltage (VOC) and the short circuit current (ISC).
  16. 16. Conclusion Design D1 has the best FOM for low to moderate light intensities, but falls off significantly at high intensity. Design D3 has the largest FOM with high light conditions. For comparisons in terms of scaling each diode was laid out in three different sizes: 36 μm2, 108 μm2 and 338 μm2. Larger photodiodes showed slightly better metrics which are largely attributed to lateral photocurrents. In more advanced technologies the capacitance per unit area will increase as the minimum distance between plates shrinks. However, for the case where vertical parallel plate storage capacitors are constructed above the photodiodes this decrease in distance will negatively impact the OE due to a smaller aperture size.