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Metal Oxide TFT Turnkey Manufacturing Solutions for a-Si TFT Lines
Tian Xiao, Gang Yu, Chan-Long Shieh, Jung-Woo Park, Fat...
wet etchants such as PAN (mixture of phosphoric, acetic and
nitric acids) or copper etchants during S/D etching. At the sa...
curves with lower mobility. Sputtering in oxygen environment
also accelerates the change in conductivity and chemical
stoi...
Table 2. Performance Summary of Two Versions of BCE
Type Metal Oxide TFT on SiNx GI (W=8µm and L=3µm)
The metal oxide TFT ...
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  1. 1. Metal Oxide TFT Turnkey Manufacturing Solutions for a-Si TFT Lines Tian Xiao, Gang Yu, Chan-Long Shieh, Jung-Woo Park, Fatt Foong, Karman Lee, Juergen Musolf, Guangming Wang, Kristoffer Ottosson, Kaixia Yang, Jeff Wang, Bruce Berkoff and Boo Nilsson CBRITE Inc., Goleta, California, USA Contact Author E-mail: tianxiao@cbriteinc.com Abstract There is strong incentive to upgrade a-Si TFT lines with minimal investments to enable high-end display manufacturing. We developed an oxide TFT manufacturing process which keeps the high-throughput SiNx GI and wet BCE process used in a-Si TFT lines, enabling high resolution LCD and OLED display manufacturing with minimal equipment upgrade and production costs. Author Keywords Oxide TFT; Back channel etch (BCE); Silicon nitride GI; High mobility and stability; LCD/OLED/LED display 1. Introduction With smartphones, tablets and on-board displays driving growth in small and medium displays and 4K TVs driving growth in large displays, competition in the display industry is becoming increasingly fierce with market dynamics clearly favoring displays that offer higher resolution and lower power consumption at an affordable price. Despite of high expectation for metal oxide TFT to become a winner in the competition, due to its inherent advantage in large-area uniformity and high mobility, which should translate to high performance/price ratio, actual adoption of oxide TFT in the display industry has been slower than expected. Part of the reason is that companies with high-generation a-Si TFT lines are reluctant to make significant investments to upgrade or re-balance their production tools to allow for the use of different materials or process flow which are required to manufacture IGZO TFT. For example, SiNx gate insulator (GI) used in a-Si TFT lines has to be replaced by SiO2 gate insulator to enable IGZO TFT manufacturing, which not only adds re-tooling costs and lowers productivity due to much slower deposition process for PECVD-based SiO2, but also introduces inconsistency and yield issues associated with hydrophilic and porous SiO2 GI. When hydrogen-rich SiNx GI is used, diffusion of hydrogen into IGZO channel causes serious Vth shift or even channel shorting[1] . Even if IGZO TFT on SiNx GI can be made to work in the enhancement mode, it usually exhibits unacceptably large negative Vth shift under negative bias illumination stress[2] . Switching to SiO2 GI, or at least using SiO2/SiNx double GI with SiO2 in contact with IGZO appears to be the industry solution at this moment. However, this approach takes a serious toll on the yield and consistency of IGZO TFT devices: SiO2 layer is generally more hydrophilic than SiNx layer and easily attracts moisture at humidity levels greater than 50%RH, severely degrading IGZO TFT device characteristics resulting in very negative Vth, accompanied by huge hysteresis and kinks in transfer curves[3] . This could easily become a killer yield issue in TFT fabs where humidity levels are maintained at greater than 50%RH. In addition, PECVD SiO2 GI is more porous than SiNx GI, and if used alone could cause TFT channel to short due to diffusion of copper from bottom gate into the IGZO channel[1] . To overcome this dilemma, CBRITE has developed a robust metal oxide semiconductor material which is less sensitive to the hydrogen-rich SiNx GI and demonstrated in SID’2015 that high- throughput SiNx GI can be used in combination with organic etch-stopper to manufacture high-performance metal oxide TFT[4] . This year, we went a step further by keeping the high- throughput SiNx GI while eliminating the ES process, further reducing production costs and improving display performance (higher resolution and lower power consumption). By sticking to PECVD SiNx as gate insulator, depositing channel layer with sputtering tool originally set up for ITO, and keeping the high- throughput wet BCE process, metal oxide TFT can be manufactured on existing a-Si TFT lines with capacity comparable to that for a-Si TFT, without the need for significant capital investments to upgrade or re-balance the production tools. Moreover, much higher performance than IGZO-based TFT has been demonstrated, in terms of both mobility and reliability, which exceeds the demanding specifications of next- generation LCD and OLED display products. Thus, metal oxide TFT turnkey manufacturing solutions for a-Si TFT lines can be implemented at low costs, maximizing the competitive edge of oxide TFT over the incumbent a-Si or poly-Si TFT technologies. 2. Experiments and Results Inverted staggered BCE type TFT structure, as shown in Fig.1, was used to fabricate CBRITE metal oxide TFT. Figure 1. Structure of CBRITE Metal Oxide TFT Table 1 summarizes the tools used to process each layer of CBRITE metal oxide TFT, along with comparison with a-Si TFT process. By using high mobility metal oxide semiconductors with ionic X-O bonds reinforced by strong covalent bonds formed between metals or metalloids and oxygen (Y-O) as channel layer, stable localized X-O-Y structure is formed, with the strong Y-O bonds stabilizing the X-O bonds nearby, making the channel layer highly resistant to commercial 26-1 / T. Xiao Invited Paper 318 • SID 2016 DIGEST ISSN 0097-966X/16/4701-0318-$1.00 © 2016 SID
  2. 2. wet etchants such as PAN (mixture of phosphoric, acetic and nitric acids) or copper etchants during S/D etching. At the same time, the channel layer also becomes highly tolerant of hydrogen Table 1. Tools Used to Process CBRITE Metal Oxide TFT Fig.2. Transfer Curves and Vth during Heating in Pure N2 (BCE oxide TFT on SiNx GI with W=8µm and L=3µm) diffusion from the hydrogen-rich SiNx GI during annealing. Examples of element “X” include In, Ga, Zn, Cd etc., and examples of element “Y” include B, Si, Ge and Al etc. Fig.2 shows the transfer curves of such BCE type metal oxide TFT on SiNx GI (W=8µm and L=3µm) during heating from room temperature to 140C in pure N2 (0%O2) environment. Strong X-O-Y bonds in the channel layer make them highly tolerant of high concentrations of hydrogen in PECVD SiNx GI and help inhibit oxygen loss in an oxygen-free environment at high temperatures, resulting in excellent temperature stability. Note that 140C is only the heater limit for in-situ testing of transfer curves on the probe station, and stable and positive Vth in oxygen-free environment is expected at much higher temperature judging from the Vth vs. temperature trend in Fig.2. Also note that the off current is below the detection limit of the test system up to 140C, with current on/off ratio greater than 109 at Vg=±15V. In general, robustness of the channel layer material is proportional to its concentration of covalent bond forming “Y” elements, as evidenced by the rapidly slowing etching rate (e.g., in oxalic acid) with the increase of “Y” concentration. An example of this is illustrated in Fig.3, where the “Y” element in this case is aluminum. However, higher concentrations of “Y” elements also tend to decrease the carrier density and mobility, therefore a delicate balance needs to be made between the ionic “X-O” bonds and the covalent “Y-O” bonds when designing a channel composition with desired mobility and stability. Fig.3. Etch Rate in Oxalic Acid (40°C) vs. Aluminum Oxide Concentration in Metal Oxide Semiconductor Fig.4 shows the mobility curves together with the transfer curves for a high-mobility BCE type metal oxide TFT on SiNx GI with W=8µm and L=3µm. With a sharp sub-threshold slope of 0.15V/Dec, current and mobility rises very rapidly with the gate voltage. Fig.5 shows the 5-point Id-Vg uniformity on the same sample, where the active layer thickness non-uniformity has been determined to be larger than 25%. It can be seen that great Vth uniformity can still be maintained (ΔVth<0.5V) despite of such large variation in active layer thickness, suggesting great process latitude in manufacturing environment where film non- uniformity can usually be controlled to under 10%. One of the reasons for the high mobility (33 cm2 /Vs at Vg=Vth+10V) and superb uniformity is the fact that the metal oxide semiconductor layer is sputtered without flowing oxygen, contrary to the conventional practice in IGZO sputtering. Sputtering with oxygen partial pressure could cause negative oxygen ion bombardment on the film being deposited, causing non-uniform damage which translates to divergent transfer Layer Tool Comparison to a-Si TFT Gate Sputter Wet Etch Same tools, materials and etchants as a-Si TFT GI PECVD Same tool and material (SiNx) as a-Si TFT Channel Sputter Wet Etch Same sputter tools and wet etchants as ITO process in a-Si TFT lines, but using proprietary channel materials with XOYO composition and X-O-Y bonds S/D Sputter Wet Etch Same sputter tools and wet etchants as a-Si TFT, but with no need for n+ layer dry etch Passivation (PV) PECVD or Coating Option of either PECVD PV layer or slit coated (or spin coated) organic PV layer Planarization (PLN) (for High PPI LCD) Coating Same tools and materials for PLN process (slit coating or spin coating) Pixel Electrode Sputter Wet Etch Same tools, materials and etchants as a-Si TFT Invited Paper 26-1 / T. Xiao SID 2016 DIGEST • 319
  3. 3. curves with lower mobility. Sputtering in oxygen environment also accelerates the change in conductivity and chemical stoichiometry of target surface, further contributing to non- uniform device characteristics across the substrate with prolonged use of target. Sputtering in oxygen can also become a major maintenance and safety issue if cryopump is used in the sputtering system. Therefore sputtering with no oxygen not only enhances TFT performance, but also ensures long-term stability of active layer sputtering process, while greatly improving the TFT fab operational efficiency and safety. Fig.4. Mobility and Transfer Curves for BCE Type Metal Oxide TFT on SiNx GI with W=8µm and L=3µm Fig.5. Five-point Id-Vg Uniformity on 3” Substrate with Active Layer Thickness Non-uniformity > 25% (BCE type metal oxide TFT on SiNx GI with W=8µm and L=3µm) Fig.6 shows the transfer curve uniformity of CBRITE BCE type metal oxide TFT on 400mm x 500mm glass substrate manufactured from an actual production line using commercial etchant, which exhibits even tighter Vth spread (ΔVth=0.3V) compared to Fig.5. Fig.6. Five-point Id-Vg Uniformity of CBRITE BCE Type Metal Oxide TFT Manufactured on 400mm x 500mm Substrate at Production Line Fig.7 demonstrates the superior BTS stability (especially NBTIS stability) at 60C for CBRITE BCE type metal oxide TFT on SiNx GI with W=8µm and L=3µm. There is usually a trade-off between mobility and NBTIS stability, and Table 2 summarizes the overall performance of a “high mobility” version and a “high NBTIS stability” version BCE process on SiNx GI intended for TFT-LCD display products. Fig.7. BTS stability at 60C for BCE Type Metal Oxide TFT on SiNx GI with W=8µm and L=3µm 26-1 / T. Xiao Invited Paper 320 • SID 2016 DIGEST
  4. 4. Table 2. Performance Summary of Two Versions of BCE Type Metal Oxide TFT on SiNx GI (W=8µm and L=3µm) The metal oxide TFT summarized in Table 2 is ideal for high pixel count TFT-LCD retina displays for mobile phones/pad phones/tablets/2-in-1s/laptops applications. In addition, such TFT is also suitable for next generation TV products with 4Kx2K and 8Kx4K formats and with high frame rate. It is also worth noting that the use of much denser SiNx GI (as opposed to more porous SiO2 GI required by IGZO TFT) also helps to suppress the copper diffusion from copper gate lines used in large size high resolution TV products. With a passivation layer and optional PLN layer following S/D patterning, and a pixel electrode over, one could achieve high aperture ratio backplane for LCD or for top emission OLED. For large size LCD and bottom emission OLED TV, one could complete entire backplane with 4-5 masks. One of the designs with metal oxide layer for both channel layer and transparent pixel electrode has been disclosed[5] . Backplane for IPS-LCD can be achieved with a six mask process. Fig.8 shows the uniformity and transfer/output characteristics of a BCE type oxide TFT on SiNx GI (W=5µm, L=6µm) tailored for OLED/LED display applications, exhibiting high mobility of over 45 cm2 /Vs and excellent transfer and output characteristics. Fig.8. Uniformity and Transfer/Output Characteristics of BCE Type Metal Oxide TFT on SiNx GI with W=5µm and L=6µm Tailored for OLED/LED Display Applications Fig.9. Constant Current Stress Stability at 60C of BCE Type Metal Oxide TFT on SiNx GI with W=5µm and L=6µm Tailored for OLED/LED Display Applications Fig.9 shows the constant current stress stability at 60C of such TFT, which is sufficient to meet the lifetime requirements for portable and TV OLED displays, or LED display products. 3. Conclusion We developed an oxide TFT manufacturing process which keeps the high-throughput SiNx GI and wet BCE process used in a-Si TFT lines, enabling high resolution LCD and OLED/LED display manufacturing with minimal equipment upgrade capital expenditures and production costs. With exceptionally wide processing latitude and superb consistency enabled by the robust metal oxide semiconductor material coupled with manufacturing friendly sputtering deposition process, such metal oxide TFTs not only possess high mobility and large current switch ratio, but also exhibit exceptional stability sufficient for next generation LCD and OLED/LED displays either for portable products or for large size TVs. They are also promising for many non-display applications including radiation imagers and chemical/biochemical sensors. 4. References [1] Chun Wei Wu et al., “Improvement of Stability on a-IGZO LCD”, SID 2013 Digest, p.97-99 [2] Jae Kyeong Jeong, “Photo-bias instability of metal oxide thin film transistors for advanced active matrix displays”, J. Mater. Res., 28/16, 2013, p.2071-2084 [3] Ken Hoshino, Bao Yeh and John F. Wager, “Impact of humidity on the electrical performance of amorphous oxide semiconductor thin-film transistors”, Journal of the SID, 21/7, 2013, p.310-316 [4] Gang Yu, Chan-Long Shieh, Tian Xiao, Karman Lee, Fatt Foong, Guangming Wang, Juergen Musolf, Zhao Chen, Frankie Chang, Kristoffer Ottosson, Jung-Woo Park, Jason Chen and Chen-Yue Li, “High Throughput MOTFT with Organic Etch-Stopper and SiNx Gate Insulator”, SID 2015 Digest, p.296-299 [5] Chan-Long Shieh, Fatt Foong and Gang Yu, US Patent 8,187,929 Invited Paper 26-1 / T. Xiao SID 2016 DIGEST • 321

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