This document discusses the implementation of digital signal processing (DSP) algorithms on field programmable gate arrays (FPGAs). It describes DSP and FPGAs, two common design approaches (custom and automated model-based), and the typical design flow. The design flow involves system modeling, simulation with floating-point data, data type conversion to fixed-point, hardware implementation, and simulation. The most challenging part is converting the design from floating-point to fixed-point arithmetic to reduce hardware usage while maintaining accuracy.