Single Molecule Chips• Chip constructed atom by atom of carefully arranged atoms• Missing atoms in lattice determine logic• Some designs use the full molecule for computation, some only surface level• 1000 of these fit inside conventional circuit• Much lower power per function
Nvidia 10 teraflops processor• Graphics chip enabling exascale computing – Very handy for brain emulation among other things – Targeted for 2018 completion• graphics core that can process a floating point operation using just 10 picojoules of power – Picojoules in current Fermi chips – 1000 cores
Nanoscale light sensors• Critical to optical interconnect of nanoscale computational components• Connection to atom scale components – Single molecules, quantum dot interconnect• Device < 4 nm wide• Can be tuned electrically to different color sensitivity – Tie this to per neuron colored light signalling?
Racetrack memory• Shock proof permanent storage 100,000 times faster than hard disks• Contains millions to billions of nanowires• Racetrack-equipped computers would boot up instantly• Nearly 3 orders of magnitude less power use than RAM, much less hard disk
Graphene Transistors• Multi-transistor functionality possible per transitor• 10-10000 times faster than best silicon transistors• Behavior of graphene transistor can be changed on the fly – Triple mode N, P, and neutral • Enables operation as amplifier changing frequency and phase of signal
Quantum Dot Memory• 1 TB per cm2 – Extremely high density• Non-volatile – Longer life (MTMF) than HD • Up to 1 million years!!• > 100 faster than DRAM – < 10 ns• Nanotube memory is contender – But apparent manufacturing problems of high yield sufficiently pure nanotubes – Stable in vacuum and in presence of high ionizing radiation • (great for space based systems)
Multicore -> Many Core• 2 – 4 cores common• 10 – 12 in pipeline• Tilera has 100-core processor – 546 gigabit per second performance• Huge software problem – New paradigm of programming? – Automated conversion code? – May need new operating system tech
3D chips• Multiple layers of circuitry vertically interconnected into single chip – Vs 3D packaging which does not integrate into single device• Heat dissipation issues – requires forced fluid cooling in denser circuits• Benefits – Smaller footprint – Speed due to short wire lengths – 10 to 100 times less power – Potentially cheaper fabrication – Higher connectivity – Heterogeneous integration