1. ECE 505: Advanced Power Electronics
Taught by Professor Jeffrey N. Denenberg
Title: Design of a Switching Power Pole: Buck Converter
Final Project
Fall 2014
Report by Robert Garrone
Master’s Candidate in Electrical and Computer
Engineering

2. Background
Voltage conversion is of major importance in power distribution in networks of devices.
Conversion between DC and AC as well as voltage and current level from supply to device is an
obvious need in almost every application. However, methods to do so are not always equal
with respect to feasibility, efficiency and cost.
In AC systems, the problem of stepping up or stepping down voltage and current is
handled by a transformer in nearly every case. The transformer can be discussed as a near-
fundamental circuit element. Its principle of operation is similar to that of an inductor; current
moving through its windings induce a magnetic flux in between its windings also known as its
core. A transformer is nothing more than two inductors with a mutual core, and thus they have
the same magnetic flux passing through them. The transformer exploits the fact that the
voltage and current of either side of the transformer is proportional to the number of turns on
either side of the transformer. This is known as the turns-ratio. For an ideal transformer,
𝑁 𝑝
𝑁𝑠
=
𝑉𝑝
𝑉𝑠
=
𝐼𝑠
𝐼𝑝
Where N is the number of turns, V is voltage and I is current. The subscripts s and p denote
primary (where the initial AC power enters the transformer) and secondary (where the
transformed proportionally to the turns-ratio). Of course, no transformer is ideal: the core
material and construction as well as the frequency of the AC power being transformed can
affect the transformer’s efficiency, although transformers can operate at very high efficiencies.
In DC systems, an efficient method of DC-DC conversion requires more components and
active circuitry. One can simply use a voltage divider to obtain voltage conversion or use a
Zener diode at some fixed voltage in a circuit to obtain DC-DC conversion, but this is rather
power inefficient and puts stress on components in the form of heat dissipation.
The most effective DC-DC conversion is with the use of a switching power pole. In a
switching power pole, power is switched at some fixed frequency from the source supply to the
load. What determines the output voltage is both the topology of the circuit and the duty cycle
of the switching signal. This duty cycle is created by modulating a square wave signal so that its
ratio of time high to time low is altered. This alteration of the square wave signal is the duty
cycle of the signal. This technique is referred to as pulse width modulation or PWM.
A buck converter steps down the voltage proportional to the duty cycle, whereas a
boost converter steps up the voltage proportional to the duty cycle. A buck-boost converter can
do both stepping down and stepping up as a function of the duty cycle. The equations for these
converters are

3. Buck: 𝑉𝑜 = 𝑉𝑖𝑛 ∙ 𝐷
Boost: 𝑉𝑜 = 𝑉𝑖𝑛 ∙
1
1−𝐷
Buck-Boost: 𝑉𝑜 = 𝑉𝑖𝑛 ∙
𝐷
1−𝐷
Each of these topologies are readily found in literature in both novel and fundamental forms.
This project report will focus solely on the buck converter and an analysis of its operation.
Inverters and rectifiers, while important to DC-AC and AC-DC conversion, are not
essential to this discussion of buck converters in this report.
The Buck Converter in Detail
A buck converter is comprised essentially of a switch, a flyback diode, an inductor, a
capacitor and the load. The inductor, capacitor and load form a sort of filter that determines
the ripple of the switched output.
The buck converter operates by switching power on and off of the filter circuit. The
inductor in the circuit allows for current to flow controlled and continuously if the inductance is
of an appropriate magnitude.
In the on-state, where the switch is closed, the inductor has current pass through
it and initially generates an opposing voltage to the source across it, resulting in a decreased
voltage at the load. As the rate of change of current decreases, the inductor voltage drops in

4. magnitude, thus increasing the voltage at the load, and the inductor begins storing energy in
the form of a magnetic field about its core. If the switch is opened while the inductor is still
charging, there will always be a voltage drop across the inductor. Therefore, the load will
always be at a lower voltage than the source. When the switch is opened, the magnetic field
breaks down and current flows from the inductor to the rest of the circuit by way of the flyback
diode. This current through the load creates a voltage across the load. If the switch is switched
back to the closed position before the inductor completely discharges (keeping the converter in
continuous conduction mode), the voltage at the load will always be greater than zero volts.
The relationships of voltage across and current through the inductor are given as
𝑉𝐿 = 𝐿 ∙
𝑑𝐼𝐿
𝑑𝑡
𝐼𝐿 = 𝐼𝐿( 𝑂) +
1
𝐿
∫ 𝑉𝐿 ∙ 𝑑𝑇
𝑡
0
Thus, the voltage across the inductor at any given moment is directly proportional to its
inductance and the rate of change of the current through it. This also means that the rate of
change of current in an inductor varies with the inductance itself. Initial inductor current before
state change also contributes to the total current through the inductor at any given time.
Current at the load may have some ripple, an AC artifact of the charging-discharging cycles of
the inductor,
∆𝐼𝐿 =
1
𝐿
( 𝑉𝑖𝑛 − 𝑉𝑜) 𝐷𝑇
where the ripple current is related to the inductance and proportional to the voltage difference
between input and output as well as the duty cycle and period of the square wave PWM signal.
Because capacitors see AC as essentially a short, it can be safely assumed that
∆𝐼𝐿( 𝑡) ≅ 𝐼𝐶 (𝑡)
∴ ∆𝑉𝐶 =
1
𝐶
∫ 𝐼𝐶 𝑑𝑡 = 𝑉𝑜𝑟𝑖𝑝𝑝𝑙𝑒
Voltage ripple at the output is related to inductor current ripple, supply voltage, output voltage,
duty cycle, frequency of the switch and component values. This can be corrected for with
careful component selection and careful switching frequency selection. The addition of a high
frequency transformer to lower the duty cycle required for a step-down and/or the addition a
feedback controller can also help minimize ripple in the converter.

5. Buck Converter Requirements for This Project
The task assigned was to design a dc-dc converter with a 10-15V input and and output
of 5.5V±.5V with up to 2A output. An example circuit was given:

6. In simulation, the circuit puts out around 5V and 2A for a load of 2.5Ω. However, its
efficiency is relatively low. The efficiency, where
𝑒𝑓𝑓𝑖𝑐𝑖𝑒𝑛𝑐𝑦 =
𝑃𝑜𝑢𝑡
𝑃𝑖𝑛
with a 28W input and a 10.29W output, is 36.75% with a 2.5Ω load.
Designing a DC-DC Switching BuckConverter
A buck converter consists primarily of 3 components: A PWM generator, a switch and a
filtering circuit with a flyback diode. The PWM generator and the switch and filtering circuit will
be treated as two separate topics.
The system depicted is designed to be built out of real world components that I had on
hand. Admittedly, it cannot do 2A output safely without failure occurring. Therefore, I
intentionally limited my design to handle around 1A with the components chosen as well as

7. implementing a current limiting circuit to prevent damaging currents if low resistance elements
or short circuits occurred.
This being said, a more developed circuit with a step down ideal transformer was also
designed so as to meet specifications, but was not physically built or prototyped.
PWM Generation
The circuit above depicts the 555 timer circuit, a comparator and a difference amplifier
serving as a feedback controller that governs the output of the comparator.
To generate a PWM signal, a 555 timer was used as an astable oscillator and the output
was taken off of the charging-discharging capacitor. This resulted in the generation of a
sawtooth wave. The 555 timer has trigger and threshold pins. If capacitor C1’s voltage drops
below 1/3 the value of the rail voltage, the trigger pin senses this and begins timing. Then, if the
threshold pin sees a voltage 2/3 that of the rail voltage, the open collector discharge pin sinks
the charge on capacitor C1. The capacitor is charged by the constant current source (the pnp
transistor) linearly, and discharges rapidly through the discharge pin of the 555 to ground,
producing a sawtooth voltage signal as an output taken from C1. The PNP transistor is biased by
R1 and R7 to be in a saturated-ON mode, since the voltage across R7 will always be about 1/3
the rail voltage. Resistor R8 controls the flow of current to C1. Essentially, this limits the
variation of current being sourced to C1 as a result of a change in the rail voltage.

8. The frequency of this sawtooth wave is directly related to the values of the charging-
discharging capacitor, the PNP transistor’s emitter resistor and the base-emitter resistor. This
circuit yields about 1.75 kHz, an acceptable switching frequency. This frequency was obtained
by manipulating the resistor values of the constant current source. A more rigorous small-signal
analysis of the transistor could be done but for our purposes the guess-check iterative approach
works just fine.
Square wave generation occurs when the comparator’s positive terminal exceeds the
voltage of the negative terminal. If one connects the positive terminal to the sawtooth output
of capacitor C1 and the negative terminal to a feedback network with a proper reference, the
comparator will produce a square wave at the necessary duty cycle. Simply put, when the
sawtooth wave exceeds the voltage that the feedback network is putting out, the comparator
will output the rail voltage. Otherwise, the comparator puts out close to 0V. The resulting
waveform, for example, when compared to the sawtooth wave looks like this with an 11.5V rail

9. Admittedly, at higher rail voltages, the square wave becomes less pronounced due to the more
demanding duty-cycle requirements. At 13.8V:

10. This poor quality output does however do the job of switching the MOSFET switch to get the
appropriate output voltage.
The feedback controller is a simple difference amplifier whose gain is controlled by the
relationship of its input resistors to its feedback resistors. R4 and R5 are the input resistors and
R2 and R9 are the output resistors in the above circuit diagram. If R4=R5=Rin and R2=R9=Rf, the
output of the amplifier can be defined as
𝑉𝑜𝑢𝑡 = (𝑉𝑝𝑜𝑠 − 𝑉𝑛𝑒𝑔) ∗
𝑅𝑓
𝑅𝑖𝑛
Where Vpos and Vneg are voltage inputs to the op-amp. In the difference amplifier used, Rf =
100kΩ and Rin = 1.2kΩ, yielding a closed loop gain of around 84. In terms of feedback control, β
can be calculated from
𝐺 =
𝐴
1 + 𝐴𝛽
Where G is the closed loop gain, A is the open loop gain of the op-amp and β is our feedback
factor. Here, our G is defined as the ratio of Rf to Rin, yielding about 83 V/V. If A = 100,000 V/V

11. (around this much for a 741 op-amp), we have a β of about .01. This low gain ensures no
overshoot and an overdamped response from the output.
The reference voltage was generated by a reversed-biased 5.6V Zener diode (1N4734A) set up
so that about 1mA would flow through it at 13.8V. A constant-current source such as the PNP
transistor circuit on the 555 timer circuit could have been used to mitigate the effects of a
changing rail voltage as the Zener voltage is sensitive to changes in this current.
Increasing Rf to 10MΩ for a gain of 8333V/V yields:

12. With an obvious underdamped response and overshoot obtained with a low filter capacitance
of 200uF (previously 2000uF) as well to enhance this effect. For our purposes, a high-gain, very
fast feedback configuration was unnecessary.
Switch and Filter

13. With the PWM generator embedded into the switch and filter, the circuit depicted will generate
outputs of 5.5V±.5V.
Key elements of this design are the IRF510 MOSFET, which turns saturation-on with 1.8V
applied to its gate. A 100µH inductor and a 2000µF capacitor form the filtering network along
with the load resistor.
An extra feature added is the TIP32G power PNP transistor, which can turn on when
resistor R6 reaches a voltage greater than .7V. This transistor will sink excess current. Using
Ohm’s law, the minimum amount of current that will trigger the TIP32G to sink current is
around .7A given the .7V turn on voltage necessary across the 1Ω (and also between the
emitter and base) sensing resistor. Adjusting the sensing resistor value adjusts the allowable
current through to the filter network before sinking occurs. Of course, any large current will
automatically saturate Q1 and sink all of the current to ground, as in a short circuit event.
The IRF510 was chosen because it can safely handle around 5A continuously (if properly
heat-sinked). The D3 protection diode across the drain and source is to protect from reverse
currents destroying it in the event of a failure of the D2 diode. The IRF has a built-in protection
diode and the datasheet says it can handle a 5.6A continuous source-drain current in the event
of a failure, but extra precautions were taken regardless.
The TIP32G is similarly robust and can safely handle up to 3A continuously and can
survive a 5A transient event. I put it into the circuit because of the continual failure of diode D2
at low resistive loads and high output currents. With the configuration shown in the above

14. switch and filter circuit, the output is the overdamped oscilloscope figure shown in the
feedback section across the 10Ω load.
This circuit does not perform well with a load lower than 10Ω in terms of efficiency and
does not tolerate a voltage lower than 11V for the source input. Given a 13.85V source that has
2.05A drawn from it and a 5.52V, 2.21A output without the current limiting circuit connected,
the input is 28.39W and the output is 12.2W, with a 43% efficiency.
Physical model
A physical model was made and demonstrated in class on 12/8/14 with satisfactory results.
From left to right: The 555 timer circuit, the comparator circuit, the difference amplifier circuit,
the IRF510 switch (red alligator clip), the TIP32 current limiting circuit, the 100µH inductor, two
1000µF capacitors in parallel, and a resistive load with several different resistance values on-
deck for demonstration.
Unfortunately, no test results were recorded for the physical model but the
presentation of the physical model was recorded by Dr. Denenberg.

15. The Addition of a Transformer to the Circuit
Adding a transformer to the circuit accomplishes two goals: decreasing the demand for a
smaller duty cycle from the PWM generator and increasing the efficiency of the system. With
the reduced duty cycle, a greater demand could be placed on the system to supply power. Due
to the relationship between current and voltage between the sides of a transformer, the
current drawn from the source is decreased significantly as well if the voltage is stepped down.
In the circuit above, a 1.2:1 step down transformer was selected to step down the voltage
before the filter. Therefore, the voltage seen at the input of the filter circuit is stepped down
from 13.85V to around 11.5V, which makes the necessary duty cycle around 50% (47.6%
actual). At 15V, the actual voltage is only 12.5V seen by the filter, which equates to 44% vs. 36%
without a transformer. By stepping down the voltage with a transformer, current can be more
efficiently drawn from the source as well. That is, less current needs to be supplied to the
system to deliver the required current demanded at the output. This results in a much better
efficiency when delivering power to the load.
The inputs and outputs from this circuit are shown with probes. If efficiency is taken in
terms of DC voltages and currents both into and out of the circuit, with the input being 19.11W
and the output being 12.34W , the efficiency is 64.5%, taken without the current limiting circuit
being functional. To compare to the previous circuit and the model circuit, this performs about
20% more efficiently than my previous design and about 28% more efficiently than the model
circuit.

16. Voltage ripple on the output is around 300mVp-p on average.
This equates to about a 5.4% deviation from the 13.85V input, 5.56V 2.22A DC output, 2.5Ω
load.

17. Also, an underdamped response is introduced with the addition of a transformer that peaks at
6.4V and settles below 6V (and in spec) in about 400µs.
The circuit’s voltage output ranges from 5.4V to 5.6V (after settling) over an input of 10-15V.
This is a .2V output swing over a 5V input swing, or a 4% deviation in average output voltage
across its specified range.
The circuit’s current output ranges from 2.17A to 2.24A (after settling) over an input of 10-15V.
This is a .07A output swing over a 5V input swing. If we take the average of the two extremes to
be 2.205A, this equates to about a 3.2% deviation in average current.
Another metric generated is to take the .07A output current swing and compare it to the
voltage swing of 5V, which yields .014 A/V change in output current due to input voltage.

18. A Monte Carlo analysis in Multisimwas performed on the DC-DC converter with the
transformer. All passive elements were given a tolerance of 10% in their values with a Gaussian
distribution, so that the likelihood of extremes would be minimal compared to small deviations
in component values. Active elements such as transistors and ICs were left unchanged in their
values. Five runs were performed. The graph and the output value deviations, both maximum
and minimum, are reported here.
As a result for the 10% tolerance, this shows little variation in output if up to 10%
difference in a components rated value is tolerable, with maximum high value as 4.2% higher
than the nominal run and maximum low value as 2.45% lower than the nominal run.
A 20% tolerance to all passive components was given and the Monte Carlo Analysis was
performed again for 10 runs. The maximum high output value was 11.4% higher than the
nominal run and the maximum low output value was 19.82% lower than the nominal run.
A third Monte Carlo analysis was performed at 30% for 10 runs, generating a maximum high
output value was 19% higher than the nominal run and a minimum low value was 14.6% lower
than the nominal run.

19. A final Monte Carlo simulation was performed with 50% tolerances given to passive elements.
The maximum high output value was 11.43% higher than the nominal run and a minimum low
value was 54.7% lower than the nominal run.
Thus, it has been demonstrated that Gaussian distributed tolerances of up to 50% still
meet specifications for the project in the DC-DC converter with a transformer after the
transient response settles. However, it is important to note that transient effects can have
deleterious effects on devices that are being supplied power. A spike of as high as 7V is shown
in the 50% tolerance graph and all of the graphs depict transient spikes above 6V.

20. Conclusion
It has been demonstrated that a relatively efficient DC-DC switching buck converter can
be both simulated and constructed to beat a simple voltage regulator circuit in terms of
efficiency. It has been demonstrated that a high frequency transformer can help increase the
range of a PWM generator’s duty cycle requirements as well as drastically improve the
efficiency of a DC-DC converter by requiring less current to be drawn to meet the current
demands from a load. It has been demonstrated that several protection methods, such as
protection diodes and current limiting circuits, can be constructed and implemented to protect
sensitive elements in a converter.
What was achieved was an up to 28% improvement between simple voltage regulators
to switching power pole systems with a transformer. Even without a transformer, the switching
circuit achieved a 6.25% improvement over the voltage regulator in simulation, with a .5V
higher output voltage closer to the base requirement of 5.5V output.
Monte Carlo simulations were performed with tolerances of passive components varied
by 10%, 20%, 30% and 50%. The results show that the system has a tendency toward
underdamped responses but ultimately is robust enough to keep with a 5-6V output after its
transient response dies out.
Further work can be done in the way of improving the feedback network, calculating the
voltage and current ripple explicitly and replacing certain components with dedicated power
components such as faster switches and comparators and more efficient op-amps and IC’s to
further increase efficiency. In practice, better heat sinks, high wattage resistors and thicker
gauge wire will increase the robustness of the physical model.