SlideShare a Scribd company logo
1 of 31
Microprocessor-Based Systems
Dr. Randa Elanwar
Lecture 1
Lecture Content
• Introduction to microprocessors,
• Comparison of typical microprocessors
• The 8086 microprocessor architecture:
– The microprocessor system: CPU, memory, I/O
– The microprocessor Pin outs, clock circuitry,
– Bus structure: address bus, data bus, and control bus
connections
– The microprocessor instruction sets
2Microprocessor-Based Systems Dr. Randa Elanwar
Introduction to microprocessors
• Definition: Microprocessor
• Is a digital integrated circuit(s) capable of executing
program
• Definition: Program
• Is a set of instructions to be executed in sequence
• Definition: Central processing unit (CPU)
• Is a logic circuit controlling the operation of the computer
• Microprocessors perform the function of a CPU in micro-
computer systems.
3Microprocessor-Based Systems Dr. Randa Elanwar
Introduction to microprocessors
• Microprocessors started at mid 70’s
• The data/information processed by a microprocessor
(electronic circuits) is usually represented in binary format.
• Each binary digit represent a power of 2. A binary digit is
often called a ‘bit’
• The binary system uses only two symbols zero (0) and one (1)
• Binary numbers are often called ‘binary words’.
• A 4-bit binary word is called a ‘nibble’.
• An 8-bit binary word is called a ‘byte’.
• A 16-bit binary word is called a ‘word’.
• A 32-bit binary word is called a ‘long word’/‘double word’.
4Microprocessor-Based Systems Dr. Randa Elanwar
Introduction to microprocessors
• Binary information is fed to the electronic circuits by voltage
levels.
• Standard logic circuits use 5 volts power supply.
• Low voltage circuits use 3 volts power supply, thus consumes
less power as in portable computers.
5Microprocessor-Based Systems Dr. Randa Elanwar
•Binary information is =1 if 3v <= voltage
<= 5v, and information is =0 if 0v <=
voltage <= 1v
•If 1v < voltage < 3v, the binary
information level is considered undefined. Low
High
Undefined
0 v
1 v
3 v
5 v
Introduction to microprocessors
• The simple microprocessor major parts are: The
central processing unit (CPU), memory, and the
input/output circuitry.
• Connecting these three parts are three sets of
parallel lines called buses. The three buses are the
address bus, the data bus and the control bus.
6Microprocessor-Based Systems Dr. Randa Elanwar
Introduction to microprocessors
The Central Processing Unit (CPU)
• The CPU controls the operation of the computer.
• The CPU fetches binary coded instructions from memory,
decodes the instructions into simple actions and carries out
these actions in sequence of steps.
• The CPU also contains an “address counter”, which holds the
address of the next instruction or data item to be fetched
from memory or temporary storage registers.
7Microprocessor-Based Systems Dr. Randa Elanwar
Introduction to microprocessors
Memory
• Memory has 2 purposes: store the binary codes of
instructions to be carried out and store the binary coded data
with which the computer is going to be working.
• Memory types are either ROMs or RAMs. These are
implemented using logical gates circuitry (e.g. D flip flops)
8Microprocessor-Based Systems Dr. Randa Elanwar
Clock
+ -
Clock
(CLK)
Introduction to microprocessors
• If the flip flop is +ve edge sensitive, the output (Q) will be equal
to the input (D) only at the +ve edge of the clock (active high)
• If the flip flop is -ve edge sensitive, the output (Q) will be equal
to the input (D) only at the -ve edge of the clock (active low)
9Microprocessor-Based Systems Dr. Randa Elanwar
Introduction to microprocessors
• Example (active high)
10Microprocessor-Based Systems Dr. Randa Elanwar
Input
Output
CLK
Introduction to microprocessors
• Inputs and Outputs (I/O)
• The I/O section allows the computer to take in data or send out
data.
• Peripherals such as keyboards, monitors, printers and modems
are connected to the I/O section through ports.
• The simplest type of input or output port is just a set of parallel
D flip-flops (Register)
Example: 8 bit register
11Microprocessor-Based Systems Dr. Randa Elanwar
Introduction to microprocessors
• Inputs and Outputs (I/O)
• In the 8 bit register we have 1 pin for GND, 8 pins for inputs, 8
pins for outputs, 1 for clock and 2 for supply (20 pins)
• For an input port, the D inputs will be connected to the external
device and the Q outputs will be connected to the data bus
which runs to the CPU.
• For an output port, the D inputs will be connected to the data
bus which runs to the CPU and the Q outputs will be connected
to the external device.
• In either cases the data is transferred to/from the bus is enabled
only when receiving a control signal from the CPU (usually the
clock)
12Microprocessor-Based Systems Dr. Randa Elanwar
Introduction to microprocessors
• Example:
• It is not a must that the data stored in register A is the same
stored in register B because this depends on their clocks.
• In most cases a master clock only is available thus we need
another control signal such that data goes to/from the
intended registers only (chip selection CS)
13Microprocessor-Based Systems Dr. Randa Elanwar
Reg A Reg B
8 input lines
CLKA CLKB
Introduction to microprocessors
• Example: to transfer data from Reg A to Reg B
14Microprocessor-Based Systems Dr. Randa Elanwar
Reg A Reg B
8 input lines
CLKA CLKB
CSA CSB
CSA
CLKB
Introduction to microprocessors
• The address bus
• It consists of 16, 20, 24, 32 parallel signal lines. On these lines
the CPU sends out the address of the memory location that is to
be written to or read from.
• The number of memory locations that the CPU can address is
determined by the bus size.
• If the CPU has N address lines it can address 2N memory
locations.
15Microprocessor-Based Systems Dr. Randa Elanwar
# Address lines # Memory locations
16 65,536
20 1,048,576
24 16,777,216
Introduction to microprocessors
• The data bus
• It consists of 8, 16 or 32 parallel signal lines. They are
bidirectional lines.
• The CPU can read data from memory/port and write data to
memory/port on these lines.
• Many devices have their outputs connected to the data bus
thus they must have a selection signal.
• The control bus
• It consists of 4 to 10 parallel signal lines.
• The CPU sends out signals on the control bus to enable the
outputs of addressed memory or port devices.
• Typical control bus signals are Memory Read, Memory Write,
I/O Read and I/O Write.
16Microprocessor-Based Systems Dr. Randa Elanwar
Introduction to microprocessors
• Example: Memory Read
• To read a byte of data from a memory location, the CPU sends out
the memory address of the desired byte on the address bus and
then sends out a Memory Read signal on the control bus.
• The Memory Read signal enables the addressed memory device to
output a data word onto the data bus.
• The data word from memory travels along the data bus to the
CPU.
• Example: 3 Instructions program
1. Input a value from a keyboard connected to the port at address
05H
2. Add 7 to the value read in
3. Output the result to a display connected to the port at address
02H
17Microprocessor-Based Systems Dr. Randa Elanwar
Introduction to microprocessors
18Microprocessor-Based Systems Dr. Randa Elanwar
Comparison of typical microprocessors
19Microprocessor-Based Systems Dr. Randa Elanwar
8086 8088
16 bit microprocessor,
16 bit data bus, 20 bit
address bus
16 bit
microprocessor, 8 bit
data bus, 20 bit
address bus
The arithmetic logic
unit has internal
registers
Same as 8086
Instructions work with
16 bit binary words
Same as 8086
Read/write data either
8 or 16 bit at a time
Read/write data
either 8 bits at a
time
Can address 220
memory locations
Can address 220
memory locations
Reads 16 bit word in 1
operation
Reads 16 bit word in
2 operations
The 80186 is an improved version of
8086 and 80188 is an improved version
of 8088 with instruction set that is a
superset of the instruction set of the
8086. Both are 16 bit microprocessors.
The 80286 is a 16 bit microprocessor
advanced version of the 8086 designed
for multitasking microcomputers.
The 80386 is a 32 bit microprocessor
which can address up to 4 gigabytes
memory used in multitasking
microcomputers.
Self study: you can read more about the
competitive microprocessors and find
out the aspects of comparison
Microprocessor bus architecture and
instruction sets
• Before we talk about how to write a program for the 8086 we
first have to discuss its internal features: ALU, flags, registers,
instruction byte queue and segment registers.
• The 8086 CPU is divided into 2 independent functional parts:
1. Bus interface unit (BIU): sends out addresses, fetches
instructions from memory, reads/writes data from/to ports
and memory
2. Execution unit (EU): tells the BIU where to fetch the
instructions and data from, decodes and execute
instructions
20Microprocessor-Based Systems Dr. Randa Elanwar
Microprocessor bus architecture and
instruction sets
21Microprocessor-Based Systems Dr. Randa Elanwar
To understand this
architecture and
function of each
component we will
have to discuss
several simpler
structures
Microprocessor bus architecture and
instruction sets
• Example 1: Simple bus architecture
22Microprocessor-Based Systems Dr. Randa Elanwar
Reg A Reg BCLKA CLKB
CSA CSB
Reg C
Reg D
CLKC CLKD
CSC CSD
CLRD
Reg E
CLKE
CSE
CNT Up
CNT DN
•In this architecture we have 3 registers with CS signal (A, B and C)
•Reg D has an active low CLR signal
•Reg E has two active low signal (CNT UP) to increment its contents by 1 at
every –ve edge and (CNT DN) to decrement its contents by 1 at every –ve
edge
•We will discuss how this architecture executes these simple instructions:
MOV B, A CLR A INC B
Microprocessor bus architecture and
instruction sets
23Microprocessor-Based Systems Dr. Randa Elanwar
CSA
CLKB
MOV B, A:
means move the content of A to B
We select Reg A to output data on bus
We activate Reg B clock to read the data on bus
CLR A:
Reg A doesn’t have a CLR signal input
Use Reg D to clear its content
move this content to Reg A (MOV A, D)
CSD
CLKA
CLRD
PD
PD
CSB
CLKE
CSE
CLKB
CNT UP
INC B:
Reg B doesn’t have a CNT UP signal input
move this content to Reg E (MOV A, E)
Use Reg E to increment its content
move this content to Reg B (MOV B, E)
PD: propagation delay
Microprocessor bus architecture and
instruction sets
• Example 2: Advanced bus architecture
24Microprocessor-Based Systems Dr. Randa Elanwar
Reg A
CLKA
CSA Reg B
CLKB
CSB
Reg C
CLKC
CSC
Reg D
CLKD
CSD
Reg E
CLKE
CSE
CLKT
T1
CF
CSALU
Xin
Yin
Z
ALSU
mode
In this architecture: Reg A
is known as “Accumulator”
i.e. accumulate results of
ALSU
Microprocessor bus architecture and
instruction sets
• Example 2: Advanced bus architecture
25Microprocessor-Based Systems Dr. Randa Elanwar
Reg A
CLKA
CSA Reg B
CLKB
CSB
Reg C
CLKC
CSC
Reg D
CLKD
CSD
Reg E
CLKE
CSE
CLKT
T1
CF
CSALU
Xin
Yin
Z
ALSU
mode
The buffer is used to isolate
the output of Reg A if CSA is
low and as a 8 bit buffer if
CSA is high
Microprocessor bus architecture and
instruction sets
• Example 2: Advanced bus architecture
26Microprocessor-Based Systems Dr. Randa Elanwar
Reg A
CLKA
CSA Reg B
CLKB
CSB
Reg C
CLKC
CSC
Reg D
CLKD
CSD
Reg E
CLKE
CSE
CLKT
T1
CF
CSALU
Xin
Yin
Z
ALSU
mode
T1 is a temporary
register. Takes the input
only from the bus and
outputs its content as
ALSU Yin. Doesn’t have
to be isolated,  has
no CS control line
Microprocessor bus architecture and
instruction sets
• Example 2: Advanced bus architecture
27Microprocessor-Based Systems Dr. Randa Elanwar
Reg A
CLKA
CSA Reg B
CLKB
CSB
Reg C
CLKC
CSC
Reg D
CLKD
CSD
Reg E
CLKE
CSE
CLKT
T1
CF
CSALU
Xin
Yin
Z
ALSU
mode
ALSU: Arithmetic Logic
Shift Unit. It does
binary/decimal
arithmetic operations (+,-
,*,/), logic operations
(>,=,<,complement) and
shift operations
Microprocessor bus architecture and
instruction sets
• Example 2: Advanced bus architecture
28Microprocessor-Based Systems Dr. Randa Elanwar
Reg A
CLKA
CSA Reg B
CLKB
CSB
Reg C
CLKC
CSC
Reg D
CLKD
CSD
Reg E
CLKE
CSE
CLKT
T1
CF
CSALU
Xin
Yin
Z
ALSU
mode
If we want to add A and B:
ADD A, B
Means A+BA
The micro-operations will be:
1. Move B to T1
2. Select ALSU addition Mode
3. Set CSALSU low (result Z is on the
bus)
4. Set CLKA low to move (A takes
the result)
Microprocessor bus architecture and
instruction sets
• Example 2: Advanced bus architecture
29Microprocessor-Based Systems Dr. Randa Elanwar
Reg A
CLKA
CSA Reg B
CLKB
CSB
Reg C
CLKC
CSC
Reg D
CLKD
CSD
Reg E
CLKE
CSE
CLKT
T1
CF
CSALU
Xin
Yin
Z
ALSU
mode
CF: Carry flag, a flip flop that holds
the carry for arithmetic operations
To avoid racing (continuous
addition, we introduce time delay
between input A (Xin) and output A
(Z) using a master-slave flip flop
To add Reg B and C for example we
need a new architecture
Microprocessor bus architecture and
instruction sets
• Example 3: Advanced bus architecture
30Microprocessor-Based Systems Dr. Randa Elanwar
T2
CLKT2
Reg A
CLKA
CSA
Reg B
CLKB
CSB
Reg C
CLKC
CSC
Reg D
CLKD
CSD
CLKT1
T1
CF
CSALU
Xin
Yin
Z
ALSU
mode
Now if we want to add B and C and
store the result in D
The micro-operations will be:
1. Move B to T1
2. Move C to T2
3. Select ALSU addition Mode
4. Set CSALSU low (result Z is on the
bus)
5. Set CLKD low to move (D takes
the result)
Microprocessor bus architecture and
instruction sets
• Example 3: Advanced bus architecture
31Microprocessor-Based Systems Dr. Randa Elanwar
T2
CLKT2
Reg A
CLKA
CSA
Reg B
CLKB
CSB
Reg C
CLKC
CSC
Reg D
CLKD
CSD
CLKT1
T1
CF
CSALU
Xin
Yin
Z
ALSU
mode
Thus structure enables the addition
of 1 byte to 1 byte
Ex: 0011 1010
+
1011 1100
1111 0110
cc c
Multi-byte addition needs store the
carry in a D flip flop  Carry flag

More Related Content

What's hot

An introduction to microprocessor architecture using INTEL 8085 as a classic...
An introduction to microprocessor  architecture using INTEL 8085 as a classic...An introduction to microprocessor  architecture using INTEL 8085 as a classic...
An introduction to microprocessor architecture using INTEL 8085 as a classic...
Prasad Deshpande
 

What's hot (20)

MICROPROCESSOR INPUT OUTPUT OPERATIONS
MICROPROCESSOR INPUT OUTPUT OPERATIONSMICROPROCESSOR INPUT OUTPUT OPERATIONS
MICROPROCESSOR INPUT OUTPUT OPERATIONS
 
Timing Diagram.pptx
Timing Diagram.pptxTiming Diagram.pptx
Timing Diagram.pptx
 
Detailed Explanation of Pin Description of 8085 microprocessor
Detailed Explanation of Pin Description of  8085 microprocessorDetailed Explanation of Pin Description of  8085 microprocessor
Detailed Explanation of Pin Description of 8085 microprocessor
 
Microprocessor & Interfacing (Part-2) By Er. Swapnil V. Kaware
Microprocessor & Interfacing (Part-2) By Er. Swapnil V. KawareMicroprocessor & Interfacing (Part-2) By Er. Swapnil V. Kaware
Microprocessor & Interfacing (Part-2) By Er. Swapnil V. Kaware
 
The microprocessor and it's architecture
The microprocessor and it's architectureThe microprocessor and it's architecture
The microprocessor and it's architecture
 
8085 Microprocessor Architecture
8085 Microprocessor Architecture8085 Microprocessor Architecture
8085 Microprocessor Architecture
 
8085
80858085
8085
 
Internal microprocessor architecture
Internal microprocessor architectureInternal microprocessor architecture
Internal microprocessor architecture
 
8085-microprocessor
8085-microprocessor8085-microprocessor
8085-microprocessor
 
Minimum mode and Maximum mode Configuration in 8086
Minimum mode and Maximum mode Configuration in 8086Minimum mode and Maximum mode Configuration in 8086
Minimum mode and Maximum mode Configuration in 8086
 
Viva
VivaViva
Viva
 
8085 microproceesor ppt
8085 microproceesor ppt8085 microproceesor ppt
8085 microproceesor ppt
 
8085-microprocessor
8085-microprocessor8085-microprocessor
8085-microprocessor
 
Lecture3
Lecture3Lecture3
Lecture3
 
8085 microprocessor
8085 microprocessor8085 microprocessor
8085 microprocessor
 
Architecture OF 8085
Architecture OF 8085Architecture OF 8085
Architecture OF 8085
 
Architecture of 8085
Architecture of 8085Architecture of 8085
Architecture of 8085
 
Microprocessor 8085 Chapter 4
Microprocessor 8085 Chapter 4Microprocessor 8085 Chapter 4
Microprocessor 8085 Chapter 4
 
Architecture of 8085
Architecture of 8085Architecture of 8085
Architecture of 8085
 
An introduction to microprocessor architecture using INTEL 8085 as a classic...
An introduction to microprocessor  architecture using INTEL 8085 as a classic...An introduction to microprocessor  architecture using INTEL 8085 as a classic...
An introduction to microprocessor architecture using INTEL 8085 as a classic...
 

Viewers also liked

الجزء الخامس ماذا ستقدم لعميلك ريادة الأعمال خطوة بخطوة
الجزء الخامس ماذا ستقدم لعميلك ريادة الأعمال خطوة بخطوةالجزء الخامس ماذا ستقدم لعميلك ريادة الأعمال خطوة بخطوة
الجزء الخامس ماذا ستقدم لعميلك ريادة الأعمال خطوة بخطوة
Randa Elanwar
 
Microsoft Dynamics NAV 2009 R2
Microsoft Dynamics NAV 2009 R2Microsoft Dynamics NAV 2009 R2
Microsoft Dynamics NAV 2009 R2
Softera Baltic
 
Enterprise Management with Microsoft Technologies
Enterprise Management with Microsoft TechnologiesEnterprise Management with Microsoft Technologies
Enterprise Management with Microsoft Technologies
Amit Gatenyo
 
Introduction to-microprocessors
Introduction to-microprocessorsIntroduction to-microprocessors
Introduction to-microprocessors
mudulin
 
Microsoft dynamics navision 2009 r2
Microsoft dynamics navision 2009 r2Microsoft dynamics navision 2009 r2
Microsoft dynamics navision 2009 r2
nikhil patel
 
Parallel Programming in .NET
Parallel Programming in .NETParallel Programming in .NET
Parallel Programming in .NET
SANKARSAN BOSE
 

Viewers also liked (19)

الجزء الخامس ماذا ستقدم لعميلك ريادة الأعمال خطوة بخطوة
الجزء الخامس ماذا ستقدم لعميلك ريادة الأعمال خطوة بخطوةالجزء الخامس ماذا ستقدم لعميلك ريادة الأعمال خطوة بخطوة
الجزء الخامس ماذا ستقدم لعميلك ريادة الأعمال خطوة بخطوة
 
MPMC Microprocessor
MPMC MicroprocessorMPMC Microprocessor
MPMC Microprocessor
 
Microprocessors-based systems (under graduate course) Lecture 9 of 9
Microprocessors-based systems (under graduate course) Lecture 9 of 9 Microprocessors-based systems (under graduate course) Lecture 9 of 9
Microprocessors-based systems (under graduate course) Lecture 9 of 9
 
LeverX - A Comprehensive Guide to SAP PLM 7.01
LeverX - A Comprehensive Guide to SAP PLM 7.01LeverX - A Comprehensive Guide to SAP PLM 7.01
LeverX - A Comprehensive Guide to SAP PLM 7.01
 
Microsoft Dynamics NAV 2009 R2
Microsoft Dynamics NAV 2009 R2Microsoft Dynamics NAV 2009 R2
Microsoft Dynamics NAV 2009 R2
 
Microprocessor Week 10: Applications
Microprocessor Week 10: ApplicationsMicroprocessor Week 10: Applications
Microprocessor Week 10: Applications
 
Enterprise Management with Microsoft Technologies
Enterprise Management with Microsoft TechnologiesEnterprise Management with Microsoft Technologies
Enterprise Management with Microsoft Technologies
 
Cheap HPC
Cheap HPCCheap HPC
Cheap HPC
 
Introduction to-microprocessors
Introduction to-microprocessorsIntroduction to-microprocessors
Introduction to-microprocessors
 
Microsoft dynamics navision 2009 r2
Microsoft dynamics navision 2009 r2Microsoft dynamics navision 2009 r2
Microsoft dynamics navision 2009 r2
 
079 Network Programming
079 Network Programming079 Network Programming
079 Network Programming
 
Microprocessor Systems
Microprocessor Systems Microprocessor Systems
Microprocessor Systems
 
Parallel Programming in .NET
Parallel Programming in .NETParallel Programming in .NET
Parallel Programming in .NET
 
ECESLU Microprocessors lecture 2
ECESLU Microprocessors lecture 2ECESLU Microprocessors lecture 2
ECESLU Microprocessors lecture 2
 
ECESLU Microprocessors Lecture 3
ECESLU Microprocessors Lecture 3ECESLU Microprocessors Lecture 3
ECESLU Microprocessors Lecture 3
 
SharePoint PerformancePoint 101
SharePoint PerformancePoint 101SharePoint PerformancePoint 101
SharePoint PerformancePoint 101
 
.Net 4.0 Threading and Parallel Programming
.Net 4.0 Threading and Parallel Programming.Net 4.0 Threading and Parallel Programming
.Net 4.0 Threading and Parallel Programming
 
ERP, SAP
ERP, SAPERP, SAP
ERP, SAP
 
ECESLU Microprocessors lecture
ECESLU Microprocessors lecture ECESLU Microprocessors lecture
ECESLU Microprocessors lecture
 

Similar to Microprocessors-based systems (under graduate course) Lecture 1 of 9

Microprocessor and Application (8085)
Microprocessor and Application (8085)Microprocessor and Application (8085)
Microprocessor and Application (8085)
ufaq kk
 

Similar to Microprocessors-based systems (under graduate course) Lecture 1 of 9 (20)

Microprocessor
MicroprocessorMicroprocessor
Microprocessor
 
Microprocessor and Application (8085)
Microprocessor and Application (8085)Microprocessor and Application (8085)
Microprocessor and Application (8085)
 
Computer Organization & Architecture (COA) Unit 2
Computer Organization & Architecture (COA) Unit 2Computer Organization & Architecture (COA) Unit 2
Computer Organization & Architecture (COA) Unit 2
 
Module -4_microprocessor (1).pptx
Module -4_microprocessor (1).pptxModule -4_microprocessor (1).pptx
Module -4_microprocessor (1).pptx
 
introduction to microprocessor and microcomputer
introduction to microprocessor and microcomputerintroduction to microprocessor and microcomputer
introduction to microprocessor and microcomputer
 
Unit 1. introduction
Unit 1. introductionUnit 1. introduction
Unit 1. introduction
 
Overview of Microcontroller and ATMega32 microcontroller
Overview of Microcontroller and ATMega32 microcontrollerOverview of Microcontroller and ATMega32 microcontroller
Overview of Microcontroller and ATMega32 microcontroller
 
microprocessor architecture
microprocessor architecture microprocessor architecture
microprocessor architecture
 
Mechatronics ME8791
Mechatronics ME8791 Mechatronics ME8791
Mechatronics ME8791
 
Micro controller
Micro controllerMicro controller
Micro controller
 
digital clock atmega16
digital clock atmega16digital clock atmega16
digital clock atmega16
 
Mpi unit i_8086_architectures
Mpi unit i_8086_architecturesMpi unit i_8086_architectures
Mpi unit i_8086_architectures
 
Microprocessor
MicroprocessorMicroprocessor
Microprocessor
 
Processors selection
Processors selectionProcessors selection
Processors selection
 
Introduction to-microprocessor
Introduction to-microprocessorIntroduction to-microprocessor
Introduction to-microprocessor
 
Introduction to-microprocessor
Introduction to-microprocessorIntroduction to-microprocessor
Introduction to-microprocessor
 
Embedded systems and robotics by scmandota
Embedded systems and robotics by scmandotaEmbedded systems and robotics by scmandota
Embedded systems and robotics by scmandota
 
BASIC COMPUTER ORGANIZATION AND DESIGN
BASIC  COMPUTER  ORGANIZATION  AND  DESIGNBASIC  COMPUTER  ORGANIZATION  AND  DESIGN
BASIC COMPUTER ORGANIZATION AND DESIGN
 
COA CHAPTER 5
COA CHAPTER 5COA CHAPTER 5
COA CHAPTER 5
 
BasicComputerOrganization and Architecture by Moriss Meno
BasicComputerOrganization and Architecture by Moriss MenoBasicComputerOrganization and Architecture by Moriss Meno
BasicComputerOrganization and Architecture by Moriss Meno
 

More from Randa Elanwar

الجزء الثالث ماذا ستقدم لعميلك ريادة الأعمال خطوة بخطوة
الجزء الثالث ماذا ستقدم لعميلك ريادة الأعمال خطوة بخطوةالجزء الثالث ماذا ستقدم لعميلك ريادة الأعمال خطوة بخطوة
الجزء الثالث ماذا ستقدم لعميلك ريادة الأعمال خطوة بخطوة
Randa Elanwar
 
الجزء الأول ماذا ستقدم لعميلك ريادة الأعمال خطوة بخطوة
الجزء الأول ماذا ستقدم لعميلك ريادة الأعمال خطوة بخطوةالجزء الأول ماذا ستقدم لعميلك ريادة الأعمال خطوة بخطوة
الجزء الأول ماذا ستقدم لعميلك ريادة الأعمال خطوة بخطوة
Randa Elanwar
 
تدريب مدونة علماء مصر على الكتابة الفنية (الترجمة والتلخيص )_Pdf5of5
تدريب مدونة علماء مصر على الكتابة الفنية (الترجمة والتلخيص    )_Pdf5of5تدريب مدونة علماء مصر على الكتابة الفنية (الترجمة والتلخيص    )_Pdf5of5
تدريب مدونة علماء مصر على الكتابة الفنية (الترجمة والتلخيص )_Pdf5of5
Randa Elanwar
 
تدريب مدونة علماء مصر على الكتابة الفنية (القصة القصيرة والخاطرة والأخطاء ال...
تدريب مدونة علماء مصر على الكتابة الفنية (القصة القصيرة والخاطرة  والأخطاء ال...تدريب مدونة علماء مصر على الكتابة الفنية (القصة القصيرة والخاطرة  والأخطاء ال...
تدريب مدونة علماء مصر على الكتابة الفنية (القصة القصيرة والخاطرة والأخطاء ال...
Randa Elanwar
 
تدريب مدونة علماء مصر على الكتابة الفنية (مقالات الموارد )_Pdf3of5
تدريب مدونة علماء مصر على الكتابة الفنية (مقالات الموارد   )_Pdf3of5تدريب مدونة علماء مصر على الكتابة الفنية (مقالات الموارد   )_Pdf3of5
تدريب مدونة علماء مصر على الكتابة الفنية (مقالات الموارد )_Pdf3of5
Randa Elanwar
 
تدريب مدونة علماء مصر على الكتابة الفنية (المقالات الإخبارية )_Pdf2of5
تدريب مدونة علماء مصر على الكتابة الفنية (المقالات الإخبارية  )_Pdf2of5تدريب مدونة علماء مصر على الكتابة الفنية (المقالات الإخبارية  )_Pdf2of5
تدريب مدونة علماء مصر على الكتابة الفنية (المقالات الإخبارية )_Pdf2of5
Randa Elanwar
 
تدريب مدونة علماء مصر على الكتابة الفنية (المقالات المبنية على البحث )_Pdf1of5
تدريب مدونة علماء مصر على الكتابة الفنية (المقالات المبنية على البحث )_Pdf1of5تدريب مدونة علماء مصر على الكتابة الفنية (المقالات المبنية على البحث )_Pdf1of5
تدريب مدونة علماء مصر على الكتابة الفنية (المقالات المبنية على البحث )_Pdf1of5
Randa Elanwar
 
تعريف بمدونة علماء مصر ومحاور التدريب على الكتابة للمدونين
تعريف بمدونة علماء مصر ومحاور التدريب على الكتابة للمدونينتعريف بمدونة علماء مصر ومحاور التدريب على الكتابة للمدونين
تعريف بمدونة علماء مصر ومحاور التدريب على الكتابة للمدونين
Randa Elanwar
 
يوميات طالب بدرجة مشرف (Part 18 of 20)
يوميات طالب بدرجة مشرف (Part 18 of 20)يوميات طالب بدرجة مشرف (Part 18 of 20)
يوميات طالب بدرجة مشرف (Part 18 of 20)
Randa Elanwar
 
يوميات طالب بدرجة مشرف (Part 16 of 20)
يوميات طالب بدرجة مشرف (Part 16 of 20)يوميات طالب بدرجة مشرف (Part 16 of 20)
يوميات طالب بدرجة مشرف (Part 16 of 20)
Randa Elanwar
 

More from Randa Elanwar (20)

الجزء السادس ماذا ستقدم لعميلك ريادة الأعمال خطوة بخطوة
الجزء السادس ماذا ستقدم لعميلك ريادة الأعمال خطوة بخطوةالجزء السادس ماذا ستقدم لعميلك ريادة الأعمال خطوة بخطوة
الجزء السادس ماذا ستقدم لعميلك ريادة الأعمال خطوة بخطوة
 
الجزء الرابع ماذا ستقدم لعميلك ريادة الأعمال خطوة بخطوة
الجزء الرابع ماذا ستقدم لعميلك ريادة الأعمال خطوة بخطوةالجزء الرابع ماذا ستقدم لعميلك ريادة الأعمال خطوة بخطوة
الجزء الرابع ماذا ستقدم لعميلك ريادة الأعمال خطوة بخطوة
 
الجزء الثالث ماذا ستقدم لعميلك ريادة الأعمال خطوة بخطوة
الجزء الثالث ماذا ستقدم لعميلك ريادة الأعمال خطوة بخطوةالجزء الثالث ماذا ستقدم لعميلك ريادة الأعمال خطوة بخطوة
الجزء الثالث ماذا ستقدم لعميلك ريادة الأعمال خطوة بخطوة
 
الجزء الثاني ماذا ستقدم لعميلك ريادة الأعمال خطوة بخطوة
الجزء الثاني ماذا ستقدم لعميلك ريادة الأعمال خطوة بخطوةالجزء الثاني ماذا ستقدم لعميلك ريادة الأعمال خطوة بخطوة
الجزء الثاني ماذا ستقدم لعميلك ريادة الأعمال خطوة بخطوة
 
الجزء الأول ماذا ستقدم لعميلك ريادة الأعمال خطوة بخطوة
الجزء الأول ماذا ستقدم لعميلك ريادة الأعمال خطوة بخطوةالجزء الأول ماذا ستقدم لعميلك ريادة الأعمال خطوة بخطوة
الجزء الأول ماذا ستقدم لعميلك ريادة الأعمال خطوة بخطوة
 
تدريب مدونة علماء مصر على الكتابة الفنية (الترجمة والتلخيص )_Pdf5of5
تدريب مدونة علماء مصر على الكتابة الفنية (الترجمة والتلخيص    )_Pdf5of5تدريب مدونة علماء مصر على الكتابة الفنية (الترجمة والتلخيص    )_Pdf5of5
تدريب مدونة علماء مصر على الكتابة الفنية (الترجمة والتلخيص )_Pdf5of5
 
تدريب مدونة علماء مصر على الكتابة الفنية (القصة القصيرة والخاطرة والأخطاء ال...
تدريب مدونة علماء مصر على الكتابة الفنية (القصة القصيرة والخاطرة  والأخطاء ال...تدريب مدونة علماء مصر على الكتابة الفنية (القصة القصيرة والخاطرة  والأخطاء ال...
تدريب مدونة علماء مصر على الكتابة الفنية (القصة القصيرة والخاطرة والأخطاء ال...
 
تدريب مدونة علماء مصر على الكتابة الفنية (مقالات الموارد )_Pdf3of5
تدريب مدونة علماء مصر على الكتابة الفنية (مقالات الموارد   )_Pdf3of5تدريب مدونة علماء مصر على الكتابة الفنية (مقالات الموارد   )_Pdf3of5
تدريب مدونة علماء مصر على الكتابة الفنية (مقالات الموارد )_Pdf3of5
 
تدريب مدونة علماء مصر على الكتابة الفنية (المقالات الإخبارية )_Pdf2of5
تدريب مدونة علماء مصر على الكتابة الفنية (المقالات الإخبارية  )_Pdf2of5تدريب مدونة علماء مصر على الكتابة الفنية (المقالات الإخبارية  )_Pdf2of5
تدريب مدونة علماء مصر على الكتابة الفنية (المقالات الإخبارية )_Pdf2of5
 
تدريب مدونة علماء مصر على الكتابة الفنية (المقالات المبنية على البحث )_Pdf1of5
تدريب مدونة علماء مصر على الكتابة الفنية (المقالات المبنية على البحث )_Pdf1of5تدريب مدونة علماء مصر على الكتابة الفنية (المقالات المبنية على البحث )_Pdf1of5
تدريب مدونة علماء مصر على الكتابة الفنية (المقالات المبنية على البحث )_Pdf1of5
 
تعريف بمدونة علماء مصر ومحاور التدريب على الكتابة للمدونين
تعريف بمدونة علماء مصر ومحاور التدريب على الكتابة للمدونينتعريف بمدونة علماء مصر ومحاور التدريب على الكتابة للمدونين
تعريف بمدونة علماء مصر ومحاور التدريب على الكتابة للمدونين
 
Entrepreneurship_who_is_your_customer_(arabic)_7of7
Entrepreneurship_who_is_your_customer_(arabic)_7of7Entrepreneurship_who_is_your_customer_(arabic)_7of7
Entrepreneurship_who_is_your_customer_(arabic)_7of7
 
Entrepreneurship_who_is_your_customer_(arabic)_5of7
Entrepreneurship_who_is_your_customer_(arabic)_5of7Entrepreneurship_who_is_your_customer_(arabic)_5of7
Entrepreneurship_who_is_your_customer_(arabic)_5of7
 
Entrepreneurship_who_is_your_customer_(arabic)_4of7
Entrepreneurship_who_is_your_customer_(arabic)_4of7Entrepreneurship_who_is_your_customer_(arabic)_4of7
Entrepreneurship_who_is_your_customer_(arabic)_4of7
 
Entrepreneurship_who_is_your_customer_(arabic)_2of7
Entrepreneurship_who_is_your_customer_(arabic)_2of7Entrepreneurship_who_is_your_customer_(arabic)_2of7
Entrepreneurship_who_is_your_customer_(arabic)_2of7
 
يوميات طالب بدرجة مشرف (Part 19 of 20)
يوميات طالب بدرجة مشرف (Part 19 of 20)يوميات طالب بدرجة مشرف (Part 19 of 20)
يوميات طالب بدرجة مشرف (Part 19 of 20)
 
يوميات طالب بدرجة مشرف (Part 18 of 20)
يوميات طالب بدرجة مشرف (Part 18 of 20)يوميات طالب بدرجة مشرف (Part 18 of 20)
يوميات طالب بدرجة مشرف (Part 18 of 20)
 
يوميات طالب بدرجة مشرف (Part 17 of 20)
يوميات طالب بدرجة مشرف (Part 17 of 20)يوميات طالب بدرجة مشرف (Part 17 of 20)
يوميات طالب بدرجة مشرف (Part 17 of 20)
 
يوميات طالب بدرجة مشرف (Part 16 of 20)
يوميات طالب بدرجة مشرف (Part 16 of 20)يوميات طالب بدرجة مشرف (Part 16 of 20)
يوميات طالب بدرجة مشرف (Part 16 of 20)
 
يوميات طالب بدرجة مشرف (Part 15 of 20)
يوميات طالب بدرجة مشرف (Part 15 of 20)يوميات طالب بدرجة مشرف (Part 15 of 20)
يوميات طالب بدرجة مشرف (Part 15 of 20)
 

Recently uploaded

會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽
會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽
會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽
中 央社
 
Transparency, Recognition and the role of eSealing - Ildiko Mazar and Koen No...
Transparency, Recognition and the role of eSealing - Ildiko Mazar and Koen No...Transparency, Recognition and the role of eSealing - Ildiko Mazar and Koen No...
Transparency, Recognition and the role of eSealing - Ildiko Mazar and Koen No...
EADTU
 

Recently uploaded (20)

OS-operating systems- ch05 (CPU Scheduling) ...
OS-operating systems- ch05 (CPU Scheduling) ...OS-operating systems- ch05 (CPU Scheduling) ...
OS-operating systems- ch05 (CPU Scheduling) ...
 
The Story of Village Palampur Class 9 Free Study Material PDF
The Story of Village Palampur Class 9 Free Study Material PDFThe Story of Village Palampur Class 9 Free Study Material PDF
The Story of Village Palampur Class 9 Free Study Material PDF
 
An Overview of the Odoo 17 Knowledge App
An Overview of the Odoo 17 Knowledge AppAn Overview of the Odoo 17 Knowledge App
An Overview of the Odoo 17 Knowledge App
 
An overview of the various scriptures in Hinduism
An overview of the various scriptures in HinduismAn overview of the various scriptures in Hinduism
An overview of the various scriptures in Hinduism
 
Basic Civil Engineering notes on Transportation Engineering & Modes of Transport
Basic Civil Engineering notes on Transportation Engineering & Modes of TransportBasic Civil Engineering notes on Transportation Engineering & Modes of Transport
Basic Civil Engineering notes on Transportation Engineering & Modes of Transport
 
Observing-Correct-Grammar-in-Making-Definitions.pptx
Observing-Correct-Grammar-in-Making-Definitions.pptxObserving-Correct-Grammar-in-Making-Definitions.pptx
Observing-Correct-Grammar-in-Making-Definitions.pptx
 
PSYPACT- Practicing Over State Lines May 2024.pptx
PSYPACT- Practicing Over State Lines May 2024.pptxPSYPACT- Practicing Over State Lines May 2024.pptx
PSYPACT- Practicing Over State Lines May 2024.pptx
 
OSCM Unit 2_Operations Processes & Systems
OSCM Unit 2_Operations Processes & SystemsOSCM Unit 2_Operations Processes & Systems
OSCM Unit 2_Operations Processes & Systems
 
How to Manage Website in Odoo 17 Studio App.pptx
How to Manage Website in Odoo 17 Studio App.pptxHow to Manage Website in Odoo 17 Studio App.pptx
How to Manage Website in Odoo 17 Studio App.pptx
 
TỔNG HỢP HƠN 100 ĐỀ THI THỬ TỐT NGHIỆP THPT TOÁN 2024 - TỪ CÁC TRƯỜNG, TRƯỜNG...
TỔNG HỢP HƠN 100 ĐỀ THI THỬ TỐT NGHIỆP THPT TOÁN 2024 - TỪ CÁC TRƯỜNG, TRƯỜNG...TỔNG HỢP HƠN 100 ĐỀ THI THỬ TỐT NGHIỆP THPT TOÁN 2024 - TỪ CÁC TRƯỜNG, TRƯỜNG...
TỔNG HỢP HƠN 100 ĐỀ THI THỬ TỐT NGHIỆP THPT TOÁN 2024 - TỪ CÁC TRƯỜNG, TRƯỜNG...
 
TỔNG HỢP HƠN 100 ĐỀ THI THỬ TỐT NGHIỆP THPT TOÁN 2024 - TỪ CÁC TRƯỜNG, TRƯỜNG...
TỔNG HỢP HƠN 100 ĐỀ THI THỬ TỐT NGHIỆP THPT TOÁN 2024 - TỪ CÁC TRƯỜNG, TRƯỜNG...TỔNG HỢP HƠN 100 ĐỀ THI THỬ TỐT NGHIỆP THPT TOÁN 2024 - TỪ CÁC TRƯỜNG, TRƯỜNG...
TỔNG HỢP HƠN 100 ĐỀ THI THỬ TỐT NGHIỆP THPT TOÁN 2024 - TỪ CÁC TRƯỜNG, TRƯỜNG...
 
會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽
會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽
會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽會考英聽
 
When Quality Assurance Meets Innovation in Higher Education - Report launch w...
When Quality Assurance Meets Innovation in Higher Education - Report launch w...When Quality Assurance Meets Innovation in Higher Education - Report launch w...
When Quality Assurance Meets Innovation in Higher Education - Report launch w...
 
Including Mental Health Support in Project Delivery, 14 May.pdf
Including Mental Health Support in Project Delivery, 14 May.pdfIncluding Mental Health Support in Project Delivery, 14 May.pdf
Including Mental Health Support in Project Delivery, 14 May.pdf
 
Analyzing and resolving a communication crisis in Dhaka textiles LTD.pptx
Analyzing and resolving a communication crisis in Dhaka textiles LTD.pptxAnalyzing and resolving a communication crisis in Dhaka textiles LTD.pptx
Analyzing and resolving a communication crisis in Dhaka textiles LTD.pptx
 
Transparency, Recognition and the role of eSealing - Ildiko Mazar and Koen No...
Transparency, Recognition and the role of eSealing - Ildiko Mazar and Koen No...Transparency, Recognition and the role of eSealing - Ildiko Mazar and Koen No...
Transparency, Recognition and the role of eSealing - Ildiko Mazar and Koen No...
 
Supporting Newcomer Multilingual Learners
Supporting Newcomer  Multilingual LearnersSupporting Newcomer  Multilingual Learners
Supporting Newcomer Multilingual Learners
 
Andreas Schleicher presents at the launch of What does child empowerment mean...
Andreas Schleicher presents at the launch of What does child empowerment mean...Andreas Schleicher presents at the launch of What does child empowerment mean...
Andreas Schleicher presents at the launch of What does child empowerment mean...
 
DEMONSTRATION LESSON IN ENGLISH 4 MATATAG CURRICULUM
DEMONSTRATION LESSON IN ENGLISH 4 MATATAG CURRICULUMDEMONSTRATION LESSON IN ENGLISH 4 MATATAG CURRICULUM
DEMONSTRATION LESSON IN ENGLISH 4 MATATAG CURRICULUM
 
demyelinated disorder: multiple sclerosis.pptx
demyelinated disorder: multiple sclerosis.pptxdemyelinated disorder: multiple sclerosis.pptx
demyelinated disorder: multiple sclerosis.pptx
 

Microprocessors-based systems (under graduate course) Lecture 1 of 9

  • 2. Lecture Content • Introduction to microprocessors, • Comparison of typical microprocessors • The 8086 microprocessor architecture: – The microprocessor system: CPU, memory, I/O – The microprocessor Pin outs, clock circuitry, – Bus structure: address bus, data bus, and control bus connections – The microprocessor instruction sets 2Microprocessor-Based Systems Dr. Randa Elanwar
  • 3. Introduction to microprocessors • Definition: Microprocessor • Is a digital integrated circuit(s) capable of executing program • Definition: Program • Is a set of instructions to be executed in sequence • Definition: Central processing unit (CPU) • Is a logic circuit controlling the operation of the computer • Microprocessors perform the function of a CPU in micro- computer systems. 3Microprocessor-Based Systems Dr. Randa Elanwar
  • 4. Introduction to microprocessors • Microprocessors started at mid 70’s • The data/information processed by a microprocessor (electronic circuits) is usually represented in binary format. • Each binary digit represent a power of 2. A binary digit is often called a ‘bit’ • The binary system uses only two symbols zero (0) and one (1) • Binary numbers are often called ‘binary words’. • A 4-bit binary word is called a ‘nibble’. • An 8-bit binary word is called a ‘byte’. • A 16-bit binary word is called a ‘word’. • A 32-bit binary word is called a ‘long word’/‘double word’. 4Microprocessor-Based Systems Dr. Randa Elanwar
  • 5. Introduction to microprocessors • Binary information is fed to the electronic circuits by voltage levels. • Standard logic circuits use 5 volts power supply. • Low voltage circuits use 3 volts power supply, thus consumes less power as in portable computers. 5Microprocessor-Based Systems Dr. Randa Elanwar •Binary information is =1 if 3v <= voltage <= 5v, and information is =0 if 0v <= voltage <= 1v •If 1v < voltage < 3v, the binary information level is considered undefined. Low High Undefined 0 v 1 v 3 v 5 v
  • 6. Introduction to microprocessors • The simple microprocessor major parts are: The central processing unit (CPU), memory, and the input/output circuitry. • Connecting these three parts are three sets of parallel lines called buses. The three buses are the address bus, the data bus and the control bus. 6Microprocessor-Based Systems Dr. Randa Elanwar
  • 7. Introduction to microprocessors The Central Processing Unit (CPU) • The CPU controls the operation of the computer. • The CPU fetches binary coded instructions from memory, decodes the instructions into simple actions and carries out these actions in sequence of steps. • The CPU also contains an “address counter”, which holds the address of the next instruction or data item to be fetched from memory or temporary storage registers. 7Microprocessor-Based Systems Dr. Randa Elanwar
  • 8. Introduction to microprocessors Memory • Memory has 2 purposes: store the binary codes of instructions to be carried out and store the binary coded data with which the computer is going to be working. • Memory types are either ROMs or RAMs. These are implemented using logical gates circuitry (e.g. D flip flops) 8Microprocessor-Based Systems Dr. Randa Elanwar Clock + - Clock (CLK)
  • 9. Introduction to microprocessors • If the flip flop is +ve edge sensitive, the output (Q) will be equal to the input (D) only at the +ve edge of the clock (active high) • If the flip flop is -ve edge sensitive, the output (Q) will be equal to the input (D) only at the -ve edge of the clock (active low) 9Microprocessor-Based Systems Dr. Randa Elanwar
  • 10. Introduction to microprocessors • Example (active high) 10Microprocessor-Based Systems Dr. Randa Elanwar Input Output CLK
  • 11. Introduction to microprocessors • Inputs and Outputs (I/O) • The I/O section allows the computer to take in data or send out data. • Peripherals such as keyboards, monitors, printers and modems are connected to the I/O section through ports. • The simplest type of input or output port is just a set of parallel D flip-flops (Register) Example: 8 bit register 11Microprocessor-Based Systems Dr. Randa Elanwar
  • 12. Introduction to microprocessors • Inputs and Outputs (I/O) • In the 8 bit register we have 1 pin for GND, 8 pins for inputs, 8 pins for outputs, 1 for clock and 2 for supply (20 pins) • For an input port, the D inputs will be connected to the external device and the Q outputs will be connected to the data bus which runs to the CPU. • For an output port, the D inputs will be connected to the data bus which runs to the CPU and the Q outputs will be connected to the external device. • In either cases the data is transferred to/from the bus is enabled only when receiving a control signal from the CPU (usually the clock) 12Microprocessor-Based Systems Dr. Randa Elanwar
  • 13. Introduction to microprocessors • Example: • It is not a must that the data stored in register A is the same stored in register B because this depends on their clocks. • In most cases a master clock only is available thus we need another control signal such that data goes to/from the intended registers only (chip selection CS) 13Microprocessor-Based Systems Dr. Randa Elanwar Reg A Reg B 8 input lines CLKA CLKB
  • 14. Introduction to microprocessors • Example: to transfer data from Reg A to Reg B 14Microprocessor-Based Systems Dr. Randa Elanwar Reg A Reg B 8 input lines CLKA CLKB CSA CSB CSA CLKB
  • 15. Introduction to microprocessors • The address bus • It consists of 16, 20, 24, 32 parallel signal lines. On these lines the CPU sends out the address of the memory location that is to be written to or read from. • The number of memory locations that the CPU can address is determined by the bus size. • If the CPU has N address lines it can address 2N memory locations. 15Microprocessor-Based Systems Dr. Randa Elanwar # Address lines # Memory locations 16 65,536 20 1,048,576 24 16,777,216
  • 16. Introduction to microprocessors • The data bus • It consists of 8, 16 or 32 parallel signal lines. They are bidirectional lines. • The CPU can read data from memory/port and write data to memory/port on these lines. • Many devices have their outputs connected to the data bus thus they must have a selection signal. • The control bus • It consists of 4 to 10 parallel signal lines. • The CPU sends out signals on the control bus to enable the outputs of addressed memory or port devices. • Typical control bus signals are Memory Read, Memory Write, I/O Read and I/O Write. 16Microprocessor-Based Systems Dr. Randa Elanwar
  • 17. Introduction to microprocessors • Example: Memory Read • To read a byte of data from a memory location, the CPU sends out the memory address of the desired byte on the address bus and then sends out a Memory Read signal on the control bus. • The Memory Read signal enables the addressed memory device to output a data word onto the data bus. • The data word from memory travels along the data bus to the CPU. • Example: 3 Instructions program 1. Input a value from a keyboard connected to the port at address 05H 2. Add 7 to the value read in 3. Output the result to a display connected to the port at address 02H 17Microprocessor-Based Systems Dr. Randa Elanwar
  • 19. Comparison of typical microprocessors 19Microprocessor-Based Systems Dr. Randa Elanwar 8086 8088 16 bit microprocessor, 16 bit data bus, 20 bit address bus 16 bit microprocessor, 8 bit data bus, 20 bit address bus The arithmetic logic unit has internal registers Same as 8086 Instructions work with 16 bit binary words Same as 8086 Read/write data either 8 or 16 bit at a time Read/write data either 8 bits at a time Can address 220 memory locations Can address 220 memory locations Reads 16 bit word in 1 operation Reads 16 bit word in 2 operations The 80186 is an improved version of 8086 and 80188 is an improved version of 8088 with instruction set that is a superset of the instruction set of the 8086. Both are 16 bit microprocessors. The 80286 is a 16 bit microprocessor advanced version of the 8086 designed for multitasking microcomputers. The 80386 is a 32 bit microprocessor which can address up to 4 gigabytes memory used in multitasking microcomputers. Self study: you can read more about the competitive microprocessors and find out the aspects of comparison
  • 20. Microprocessor bus architecture and instruction sets • Before we talk about how to write a program for the 8086 we first have to discuss its internal features: ALU, flags, registers, instruction byte queue and segment registers. • The 8086 CPU is divided into 2 independent functional parts: 1. Bus interface unit (BIU): sends out addresses, fetches instructions from memory, reads/writes data from/to ports and memory 2. Execution unit (EU): tells the BIU where to fetch the instructions and data from, decodes and execute instructions 20Microprocessor-Based Systems Dr. Randa Elanwar
  • 21. Microprocessor bus architecture and instruction sets 21Microprocessor-Based Systems Dr. Randa Elanwar To understand this architecture and function of each component we will have to discuss several simpler structures
  • 22. Microprocessor bus architecture and instruction sets • Example 1: Simple bus architecture 22Microprocessor-Based Systems Dr. Randa Elanwar Reg A Reg BCLKA CLKB CSA CSB Reg C Reg D CLKC CLKD CSC CSD CLRD Reg E CLKE CSE CNT Up CNT DN •In this architecture we have 3 registers with CS signal (A, B and C) •Reg D has an active low CLR signal •Reg E has two active low signal (CNT UP) to increment its contents by 1 at every –ve edge and (CNT DN) to decrement its contents by 1 at every –ve edge •We will discuss how this architecture executes these simple instructions: MOV B, A CLR A INC B
  • 23. Microprocessor bus architecture and instruction sets 23Microprocessor-Based Systems Dr. Randa Elanwar CSA CLKB MOV B, A: means move the content of A to B We select Reg A to output data on bus We activate Reg B clock to read the data on bus CLR A: Reg A doesn’t have a CLR signal input Use Reg D to clear its content move this content to Reg A (MOV A, D) CSD CLKA CLRD PD PD CSB CLKE CSE CLKB CNT UP INC B: Reg B doesn’t have a CNT UP signal input move this content to Reg E (MOV A, E) Use Reg E to increment its content move this content to Reg B (MOV B, E) PD: propagation delay
  • 24. Microprocessor bus architecture and instruction sets • Example 2: Advanced bus architecture 24Microprocessor-Based Systems Dr. Randa Elanwar Reg A CLKA CSA Reg B CLKB CSB Reg C CLKC CSC Reg D CLKD CSD Reg E CLKE CSE CLKT T1 CF CSALU Xin Yin Z ALSU mode In this architecture: Reg A is known as “Accumulator” i.e. accumulate results of ALSU
  • 25. Microprocessor bus architecture and instruction sets • Example 2: Advanced bus architecture 25Microprocessor-Based Systems Dr. Randa Elanwar Reg A CLKA CSA Reg B CLKB CSB Reg C CLKC CSC Reg D CLKD CSD Reg E CLKE CSE CLKT T1 CF CSALU Xin Yin Z ALSU mode The buffer is used to isolate the output of Reg A if CSA is low and as a 8 bit buffer if CSA is high
  • 26. Microprocessor bus architecture and instruction sets • Example 2: Advanced bus architecture 26Microprocessor-Based Systems Dr. Randa Elanwar Reg A CLKA CSA Reg B CLKB CSB Reg C CLKC CSC Reg D CLKD CSD Reg E CLKE CSE CLKT T1 CF CSALU Xin Yin Z ALSU mode T1 is a temporary register. Takes the input only from the bus and outputs its content as ALSU Yin. Doesn’t have to be isolated,  has no CS control line
  • 27. Microprocessor bus architecture and instruction sets • Example 2: Advanced bus architecture 27Microprocessor-Based Systems Dr. Randa Elanwar Reg A CLKA CSA Reg B CLKB CSB Reg C CLKC CSC Reg D CLKD CSD Reg E CLKE CSE CLKT T1 CF CSALU Xin Yin Z ALSU mode ALSU: Arithmetic Logic Shift Unit. It does binary/decimal arithmetic operations (+,- ,*,/), logic operations (>,=,<,complement) and shift operations
  • 28. Microprocessor bus architecture and instruction sets • Example 2: Advanced bus architecture 28Microprocessor-Based Systems Dr. Randa Elanwar Reg A CLKA CSA Reg B CLKB CSB Reg C CLKC CSC Reg D CLKD CSD Reg E CLKE CSE CLKT T1 CF CSALU Xin Yin Z ALSU mode If we want to add A and B: ADD A, B Means A+BA The micro-operations will be: 1. Move B to T1 2. Select ALSU addition Mode 3. Set CSALSU low (result Z is on the bus) 4. Set CLKA low to move (A takes the result)
  • 29. Microprocessor bus architecture and instruction sets • Example 2: Advanced bus architecture 29Microprocessor-Based Systems Dr. Randa Elanwar Reg A CLKA CSA Reg B CLKB CSB Reg C CLKC CSC Reg D CLKD CSD Reg E CLKE CSE CLKT T1 CF CSALU Xin Yin Z ALSU mode CF: Carry flag, a flip flop that holds the carry for arithmetic operations To avoid racing (continuous addition, we introduce time delay between input A (Xin) and output A (Z) using a master-slave flip flop To add Reg B and C for example we need a new architecture
  • 30. Microprocessor bus architecture and instruction sets • Example 3: Advanced bus architecture 30Microprocessor-Based Systems Dr. Randa Elanwar T2 CLKT2 Reg A CLKA CSA Reg B CLKB CSB Reg C CLKC CSC Reg D CLKD CSD CLKT1 T1 CF CSALU Xin Yin Z ALSU mode Now if we want to add B and C and store the result in D The micro-operations will be: 1. Move B to T1 2. Move C to T2 3. Select ALSU addition Mode 4. Set CSALSU low (result Z is on the bus) 5. Set CLKD low to move (D takes the result)
  • 31. Microprocessor bus architecture and instruction sets • Example 3: Advanced bus architecture 31Microprocessor-Based Systems Dr. Randa Elanwar T2 CLKT2 Reg A CLKA CSA Reg B CLKB CSB Reg C CLKC CSC Reg D CLKD CSD CLKT1 T1 CF CSALU Xin Yin Z ALSU mode Thus structure enables the addition of 1 byte to 1 byte Ex: 0011 1010 + 1011 1100 1111 0110 cc c Multi-byte addition needs store the carry in a D flip flop  Carry flag