Error resilient and energy efficient mrf message passing-based stereo matching

CONTACT: PRAVEEN KUMAR. L (,+91 – 9791938249)
MAIL ID: sunsid1989@gmail.com, praveen@nexgenproject.com
Web: www.nexgenproject.com, www.finalyear-ieeeprojects.com
Error Resilient and Energy Efficient MRF Message-
Passing-Based Stereo Matching
Abstract:
Message-passing-based inference algorithms have immense importance in real-world
applications. In this paper, error resiliency of a message passing based Markov random field
(MRF) stereo matching hardware is explored and enhanced through the application of statistical
error compensation. Error resiliency is of particular interest for subnanometer and postsilicon
devices. The inherent robustness of iteration-based MRF inference algorithms is explored and
shows that small errors are tolerable, while large errors degrade the performance significantly.
Based on these error characteristics, algorithmic noise tolerance (ANT) has been applied at the
arithmetic, iteration, and system levels. Introducing timing errors via voltage overscaling, at the
arithmetic level, results show that the ANT-based hardware can tolerate an error rate of 21.3%,
with performance degradation of only 3.5% at an overhead of 97.4%, compared with an error-
free hardware with an energy savings of 39.7%. To reduce compensation complexity, iteration
and system-level compensation was explored. Results show that, compared with arithmetic level,
system-level compensation reduces overhead to 59%, while maintaining stereo matching
performance with only 2.5% degradation with 16% additional power savings. These results are
verified via FPGA emulation with timing errors induced within the message passing unit via
relaxed synthesis. The proposed architecture of this paper analysis the logic size, area and power
consumption using Xilinx 14.2.
Enhancement of the project:
Existing System:
Recently, machine-learning-based inference is gaining importance as a key kernel in processing
massive data in signal processing systems including computer vision and speech recognition.
Stereo matching is one such kernel that extracts 3-D information from two images captured from
different angles. Its fundamental importance to real-world computer vision applications, such as
automotive navigation, has motivated researchers to develop custom hardware acceleration for
high-quality, high-speed, and low-power stereo matching. One promising approach for high-

quality stereo matching is to formulate the stereo matching problem as a discrete optimization
problem over a parameterized undirected graph known as a Markov random field (MRF). This
optimization problem can be solved efficiently using message passing inference algorithms.
Previous hardware implementations of belief propagation (BP)-based message passing inference
have been shown to achieve high-speed and low-power stereo matching, but suffer from inferior
results due to lack of convergence guarantees. Recently, a message passing algorithm with more
favorable convergence property—tree reweighted message passing (TRW-S)—has been
implemented and demonstrates outstanding execution speed as well as high-quality stereo
matching.
To reduce the overhead of arithmetic-level error compensation, ANT was further applied at the
iteration and system level for the TRW-S stereo matching system. Iteration-level compensation
removes all correction overhead except at the final latch of each functional block within the
message passing computation. At the system level, a CPU was used to aid in the estimation and
correction of the final stereo matching output (i.e., depth map). This approach may seem similar
to the existing error resilient system architecture [20] paradigm, but is significantly different
because an application specific accelerator is used and permitted to make hardware errors that
are compensated via statistical estimation and detection techniques. A hybrid approach
combining both iteration-level and system-level compensation shows promising enhancement in
error resiliency while reducing overhead.
Disadvantages:
 Power consumption is high
Proposed System:
Algorithmic Noise Tolerance
ANT utilizes the statistics of errors to perform detection and estimation to compensate for errors.
It also incorporates system-level statistical metrics, such as signal-to-noise ratio (SNR) or BER.
As shown in Fig. 1(a), ANT incorporates a main block and an estimator. The main block is
permitted to make hardware/timing errors, but not the estimator.

Fig. 1. Block diagram. (a) ANT. (b) Error distributions.
TRW-S Message-Passing-Based Stereo Matching
Stereo matching infers depth information from two horizontally shifted images. It can be restated
as a maximum a posteriori (MAP) problem, where each pixel is given a label that corresponds to
a discrete depth level and the goal is to find the most probable label assignments for all the pixels
of an image.

Fig. 2. Architecture of streaming TRW-S hardware (TRWS_HW) [13]. (a) Block diagram. (b) Reparameterize unit.
(c) Message update unit.
FIFOs are used to handle streaming data access to the main memory to feed the pipelined
message passing units without many stalls. while for MSG_UPD, a parallel message construction
technique is exploited to reduce complexity of the pairwise computation, as shown in Fig. 2(c).
In addition, to avoid overflow, MSG_UPD includes a normalization step that rescales the value
of messages so that the minimum value of the message is always zero.
ERROR COMPENSATION AT VARIOUS LEVELS
In Section III, we observed that the error resiliency of TRW-S can be enhanced if arithmetic
units are protected by RPR based ANT. However, applying ANT to all the arithmetic units
causes large hardware resource overhead. In this section, therefore, we further study the tradeoff
between granularity of ANT protection and its corresponding overhead. The goal is to find the
proper level of error compensation that causes low overhead but maintains high error resilience
of TRWS_HW.
To this end, errors are compensated via ANT at three levels, as shown in Fig. 3. At the system
level, errors are compensated directly on the resulting depth map. At the iteration level, errors are

compensated after the computation of each functional block in the message passing unit [Fig.
2(a)], i.e., at the end of the reparameterize and message update block. Iteration level
compensation is also performed in an online fashion (compensated results are directly used as
updates for the adjacent nodes).
Fig. 3. Block diagram of (a) error compensation at different levels and (b) detailed comparison of arithmetic-level
and iteration-level compensation in the reparameterize unit.
Arithmetic-Level Compensation
At the level of the finest ANT granularity, errors are compensated after each arithmetic operation
that include every AS and CS. Every latch in the reparameterize unit and message update unit
[Fig. 2(b) and (c)] is subject to ANT compensation.
Iteration-Level Compensation

At the iteration level compensation occurs at the end of each functional block of the TRW-S
hardware architecture. For example, error compensation is performed only at the output of the
reparameterize unit.
System-Level Compensation
As shown in Fig. 3(a), system-level compensation is performed on the computed erroneous
inference result (i.e., depth map) occurring outside of the TRW-S message passing loop, while
iteration-level compensation occurs at the end of each iteration within the message passing loop.
Combination of Iteration and System-Level Compensation
We show that the system-level compensation can achieve sound stereo matching performance
while being robust to errors. However, its performance depends highly on the output quality of
the main block. Thus, additional compensation is needed at the iteration level.
A TRW-S-based stereo matching system has been implemented in a hybrid CPU + FPGA
platform to perform high-quality stereo matching in video-rate speed. Fig. 4 shows the overall
architecture of TRW-S stereo matching system.
Fig. 4. Architecture of streaming TRW-S stereo matching CPU + FPGA system.
Advantages:
 Reduce the power

Software implementation:
 Modelsim
 Xilinx ISE

Error resilient and energy efficient mrf message passing-based stereo matching

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Error resilient and energy efficient mrf message passing-based stereo matching