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Verification of mobile SoC designs is extremely challenging due to the size of the designs, complexity of software and diversity of protocols. For example, protocols like MIPI CSI and DSI require long simulation runs to stream even a small number of video frames.
Utilizing HW/SW co-design methodology, MIPI CSI-3 and JEDEC UFS2 were developed where the UFS2/CSI-3 and UniPro (TL/NL/DME) layers are implemented in software while the UniPro (DL/PAL) and M-PHY layers are implemented in synthesizable Verilog RTL. The communication layer between the software and hardware parts of the UniPro solution is implemented using a transaction-based methodology based on SCE-MI 2.0.
The presentation by Mohamed Samy of Mentor Graphics will cover the co-design methodology and how the software and hardware were integrated together. It will also speak about the testing environment and the advanced debug capabilities enabled by the use of protocol analyzer.