Possibilities and challenges in electronics building and
production technology
On some cooperation with CPD Center AB
Prof...
High density electronics
Drivers
Price - price scales with size and volume
Low power - shorter leads, less R,LC -> lower o...
Comparison Si - PWB
Silicon: 8 - 32 nm
PCB: 50 - 250 um
3 - 4 order of magnitude in difference
What about PWB?!
First PCB:s early 1900
The print and etch process patented 1913 - PWB
Feature sizes
Trace width - 40 um -...
Component package
Chip bonding
Bondwires usually consist of one of the following materials:
Aluminum
Copper
Gold
Wire diameters start at 15 ...
The wet PCB dream
Sequential Build Up
of PWB parts
The CBM process
• Polymer molecules attach and
create Polymer “structures” on
the surface
• Works UP FROM surface instead
...
Copper Build-up
Bare substrate
Polymer Structure build-up
0.5 – 4 μm
Electroless Copper
Galvanic plating
to desired level
...
Cu on Teflon© (with primer, TetraEtch)
Etching vs Sequential build Up (SBU)
SBU
Potentially smaller feature sizes
Enabling embedded component - embedded chip tec...
What’s the difference?
Standard Copper
CBM™ copper
FR4
First experiments
10 um line width
Strategies for circuit board interconnect based on
the CBM™ process
Solder free interconnect
Solder free interconnect
Solder free interconnect
Application of CBM™ grafting chemistry
Solder free interconnect
Solder free interconnect
CBM™ grafting polymer
Solder free interconnect
Solder free interconnect
Benefits
Takes away:
Capsule ~35% of component cost
Bonding ~35% of component cost
Smaller feature sizes at circuit board ...
Can we do this today?
LTU has the following lab facilities currently used in research cooperation
with CPD Center AB
Clean...
CBM
Lab scale CBM process capable of small series production
Lithography
Laser lithography
Advanced laser writer
Line width < 700 nm
Via making - laser ablation
Cold ablation via diameter
<5um
Advanced Circuit Packaging with CBM Technology
Upcoming SlideShare
Loading in …5
×

Advanced Circuit Packaging with CBM Technology

460 views

Published on

A brief introduction about the cooperation between Luleå University of Technology and CPD Center AB.

Published in: Technology, Business
0 Comments
4 Likes
Statistics
Notes
  • Be the first to comment

No Downloads
Views
Total views
460
On SlideShare
0
From Embeds
0
Number of Embeds
17
Actions
Shares
0
Downloads
8
Comments
0
Likes
4
Embeds 0
No embeds

No notes for slide

Advanced Circuit Packaging with CBM Technology

  1. 1. Possibilities and challenges in electronics building and production technology On some cooperation with CPD Center AB Professor Jerker Delsing EISLAB
  2. 2. High density electronics Drivers Price - price scales with size and volume Low power - shorter leads, less R,LC -> lower operation voltage (P=U2/R) Performance - shorter leads -> higher clock frequencies
  3. 3. Comparison Si - PWB Silicon: 8 - 32 nm PCB: 50 - 250 um 3 - 4 order of magnitude in difference
  4. 4. What about PWB?! First PCB:s early 1900 The print and etch process patented 1913 - PWB Feature sizes Trace width - 40 um -- 100 um Via size - 50 um - .... Multi layer boards - 40 layers Limitation due to the etch process
  5. 5. Component package
  6. 6. Chip bonding Bondwires usually consist of one of the following materials: Aluminum Copper Gold Wire diameters start at 15 µm and can be up to several hundred micrometres for high-powered applications. Thermosonic bonding Ultrasonic bonding
  7. 7. The wet PCB dream Sequential Build Up of PWB parts
  8. 8. The CBM process • Polymer molecules attach and create Polymer “structures” on the surface • Works UP FROM surface instead of DOWN INTO surface • First molecule fastens on surface with a strong covalent bonding • On surface and inside holes (1:12)
  9. 9. Copper Build-up Bare substrate Polymer Structure build-up 0.5 – 4 μm Electroless Copper Galvanic plating to desired level CBM process Standard processes
  10. 10. Cu on Teflon© (with primer, TetraEtch)
  11. 11. Etching vs Sequential build Up (SBU) SBU Potentially smaller feature sizes Enabling embedded component - embedded chip technology
  12. 12. What’s the difference? Standard Copper CBM™ copper FR4
  13. 13. First experiments 10 um line width
  14. 14. Strategies for circuit board interconnect based on the CBM™ process
  15. 15. Solder free interconnect
  16. 16. Solder free interconnect
  17. 17. Solder free interconnect Application of CBM™ grafting chemistry
  18. 18. Solder free interconnect
  19. 19. Solder free interconnect CBM™ grafting polymer
  20. 20. Solder free interconnect
  21. 21. Solder free interconnect
  22. 22. Benefits Takes away: Capsule ~35% of component cost Bonding ~35% of component cost Smaller feature sizes at circuit board enables Circuit board area reduction Small chip pads 100x100 um today -> 5x5 um -> chip area saving of 400 times 100 pads -> 1mm2 -> 0.0025 mm2 Chip size directly proportional to cost Shorter interconnect leads Less RLC Lower power requirements Higher performance
  23. 23. Can we do this today? LTU has the following lab facilities currently used in research cooperation with CPD Center AB Clean room facility featuring Down to ISO 14644-1 class 5 CBM™ process Lithography Via hole drilling
  24. 24. CBM Lab scale CBM process capable of small series production
  25. 25. Lithography Laser lithography Advanced laser writer Line width < 700 nm
  26. 26. Via making - laser ablation Cold ablation via diameter <5um

×