Breaking the Sound Barrier with Persistent Memory
Liqi Yi
Shylaja Kokoori

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Motivation
 Disk writes not uniform
 Disk writes happen in burst fashion, and high write bandwidth is
required while flushing & compacting
 Read/write bandwidth inflation
 Each Key/Value (KV) pair will be written to disk and read back many
times due to flush, compact, and read caching. This inflation is
very painful when handling large query rate on a small memory
system.
 Change in data format (serialization/deserialization) between memory
and data store (for example, disk)
 Adds latency to the read/write path, and wastes a lot of CPU
cycles.
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What do we need to by pass these issues
• Persistent store with much higher bandwidth
• Larger cache for data on disk
• Less number of round trips for KVs between memory and persistent
store
• What if we do not need to change the format when sending and bringing
data between memory and data store?
• Of course, lower latency always helps !!
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Do we have something that fulfills these
requirements?
 PCI-E SSD (NVM)
 Faster than SATA SSD, but much slower than memory(both latency and
bandwidth), still could be bottle necked on heavy load, still needs
to do data format changing
 Huge DRAM
 Ideal case, solves everything, but way to expensive, and subject to
data loss
 What if we can put persistency and memory together?
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Do we have something that fulfills these
requirements?
 PCI-E SSD (NVM)
 Faster than SATA SSD, but much slower than memory(both latency and
bandwidth), //still could be bottle necked on heavy load, still
needs to do data format changing) //make it a table
 Huge DRAM
 Ideal case, solves everything, but way to expensive, and subject to
data loss
 What if we can put persistency and memory together?
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The solution: Persistent Memory

Experiment Setup
• Persistent memory emulation environment was used to emulate the
latencies of persistent memory. This environment is capable of
performing at varied latencies.
• Used Yahoo Cloud Serving Benchmark(YCSB) to drive the HBase cluster
• Number of query/transaction per second used to measure throughput
• Round trip time for the query was used to measure latency
• Database was preloaded and experiment involved pure read
• In baseline configuration, if data is not available in DRAM it is
read from SSDs
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Experiment Design
Experiment was designed around following scenarios
• Increase Bucket Cache on persistent memory at regular percentage
increment (10%) and observe the effect on throughput and response
time
• Restrict the input transaction count and observe the effect on
throughput and response time for baseline and 100% bucket cache on
persistent memory
• Change persistent memory latency and observe its impact on response
time
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Approximately 5x increase in throughput when all the
bucket cache is configured in persistent memory
6.8 7.2 7.6 8.4 9.7 11.2
13.4
16.5
21.2
28.6
40.4
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100% 110%
Kops/sec
Bucket cache % configured in persistent memory
Change in throughput as percentage of bucket cache
configured in persistent memory
5x increase

Change in query response time as percentage of
bucket cache moved to persistent memory
29.4
27.7
26.1
23.9
20.4
17.8
14.8
12.1
9.4
7.0
4.9
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100% 110%
ms
Bucket cache % configured in persistent memory
Change in average query response time as percentage of bucket cache configured in persistent memory
Approximately 6x reduction in response time when all the
bucket cache is configured in persistent memory
6x

Persistent Memory Latency Impact
Latency change between 115ns and 500ns increases YCSB’s client response
time by 1%
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Persistent memory read latency (ns) 115 200 300 400 500 600
YCSB average response time (ms) 39.0 39.0 40.5 39.6 38.3 37.9
Increased memory latency impact on YCSB
response time (%) 0% 0% 1% 1% 1%

Current software support
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Graph from http://www.snia.org/sites/default/files/NVM/2016/presentations/RickCoulson_All_the_Ways_3D_XPoint_Impacts.pdf
• Open Source:
http://pmem.io
• libvmem, libvmmalloc
• libpmem, libpmemobj,
libpmemblk, libpmemlog

Summary
• Persistent memory is faster, larger, with byte addressable
capability.
• HBase will benefit from persistent memory in current architecture and
possibly new architectures in the future.
• Software support is on track.
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