- The document describes nano-soliton-assisted electron transport (electron surfing) and a novel ballistic-like field effect transistor (SFET) with extremely low heat dissipation. - The SFET uses electrons traveling in a perfect 1D polymer chain, where they can travel long distances at near sound velocity due to soliton formation, in contrast to conventional transistors. - Experimental results on polydiacetylene crystals show electrons can travel millimeters with mobilities over 200,000 cm^2/V-s, opposite to conventional behavior, demonstrating the SFET concept.

1. Nano-soliton-assisted electron transport
(electron surfing) and a novel ballistic-
like field effect transistor (SFET) with
extremely low heat dissipation.
E. Guy Wilson,
School of Physics and Astronomy,
Queen Mary University of London, UK.

2. Isolated Polymer Chain
Electron Electric Field

3. Electrons in 1D behave radically differently
than in 2D and 3D
In 1D an electron potential
however weak,
or of whatever range
will create an electronic bound state.

4. Consider a electron hopping randomly between lattice sites.
After n steps the number of new sites visited is n/1.516 ≈ n in 3D
(8n/π)1/2 ≈ n1/2 in 1D
[Montroll E W and Weiss G H 1965 J. Math. Phys. 6 167]
Trapping in 1D and 3D
Geminate Escape in 1D and 3D

5. Experimental Conclusion
Field
Photo Generation
Velocity
Sound
Low Field Mobility > 200,000
cm squared per sec per Volt
Exact opposite to the
conventional !!

6. Perfect crystals of monomer and
polymer

7. Solid State Polymerisation
Polydiacetylene PDA
One dimensional C chain
One Electron per C atom
4 of C per unit cell
4 Bands, 2 Full, 2 Empty
2 eV gap Semiconductor

8. X-ray diffraction from Polymer Crystal

9. Electron Microscope Lattice Image

10. The cuts experiment

11. Experimental Conclusion
Field
Photo Generation
Velocity
Sound
Low Field Mobility > 200,000
cm squared per sec per Volt
Exact opposite to the
conventional !!

12. Electronic Walls in PDADCH

14. • The Situation in 1980
• Polymer chains can be perfect wires to carry
electrons
• Electrons travel at constant speeds just below
the sound velocity even over 4 decades of
pulling force
• Electrons can travel 1 mm before pausing
(temporarily) at a defect
• The low field mobility is enormous
• There is no theory for this behavior

15. Harmonic
Acoustic
Distortion
changes transfer

16. Electron amplitude at
site n

17. Soliton Energy
Lattice Energy
Electron Energy
against
v/S

18. Dissipation
Energy against Wave Vector
Effect of an electric field

19. Swap Theory Conclusion

20. Run1 Electron Amplitudes vs Position

21. 1980’s,
School of Academician A S Davidov,
Bogoliubov Institute, Kiev, USSR
2010’s,
MG Velarde, Director Instituto Pluridisciplinar
Complutense University, Madrid
W Ebeling, Humbolt University, Berlin
A Chetverikov, Saratov University, Russia

22. • DAVYDOV
• Linear lattice
• Electron deforms lattice
• VELARDE
• Non linear lattice
• Solitons without electron (Toda, Fermi)
• Soliton captures electron to form Solectron.

23. y
x
G
S D
I
Si
N Channel Inversion layer SiFET
V, Ey , ρ, v, vary along the channel
I ≈ ρv = constant current along channel
v = µ Ey
Ex varies with y across the insulator
PINCH OFF

24. Solectron Field Effect Transistor
y
x
G
D
S D I
PDA
M
Solectrons under
S,D,G
Solectrons in
thermal
equilibrium
Solectrons in
channel have
constant velocity
ALWAYS !!!

25. •
• T = transit time; L = channel length, v = constant solectron velocity
•
• T = L/v
•
• C = gate – channel capacity; W = width; d = insulator thickness
•
• C = εε0 WL/d
•
• ISD = source – drain channel current; G = transfer conductance
•
• For the source – gate voltage more than Vt above the threshold voltage,
and the source – drain voltage greater than Vt , then
•
• G = [dISD /dVSG ] = = C/T = εε0 v (W/d)
• Thus, G is dependent on only W and d and independent of L.

26. Vt VD
I
Realistic Characteristic
Drain voltage above thermal voltage to stop
reverse drain to source solectron current !!!!
Vt =kT/e=25 mV

27. I
I
VGVTH
Vt
Realistic Characteristic
Threshold voltage controlled by M layer
Thermal fluctuation of solectron energy
Vt =kT/e=25 mV

28. W
A
EG
Electron
Energy
0
Metal to PDATS contact
W = Metal Work Function
A= PDATS Electron Affinity
I = PDATS Ionisation Potential
EG = PDATS Energy Gap

29. Δ
W
A
EG
Electron
Energy
0
x
Before and after metal – PDATS contact
Δ = A - W

30. Δ/e
Voltage V
Charge density ρ2
Electric Field E
0
0
0
x
0
Voltage, Charge, Field, after contact
Small depth of penetration

31. I/eV A/eV W/eV Method
PDADCH 5.8 3.4 Injection
PDATS 5.2 Millikan Drop
PDATS 5.5 3.1 Photoemission
Ca 2.8
Mg 3.8
Pt 5.1-5.9
Pd 5.2-5.6
many rare earths low
Values of I, A, W

32. “Dependence of Work Function on Electronic Structure of Rare Earths”, M V Nitolic, S M
Radic, V Minic and M M Ristic, Microelectronics Journal 27, 93 (1996)
Horizontal lines
show limits of
electron affinity of
PDATS
Rare Earths as electron injectors

33. Vin
Vout
C
VDD
αSFET
βSFET
Inverter

34. C
OUT
IN
C
Realistic Inverter Transfer function
C labels two conjugate points
VDD = 0.1 Volt
Gain = 1.5
VTH = -30 mV

35. Comparison of a silicon FET (SiFET) with a solectron FET (SFET)
SiFET (a) SFET
source-drain length L/μm 0.05 0.05 (b)
width w/µ 0.2 0.2 (b)
insulator thickness/nm 2 50 (c)
insulator dielectric constant ε 3.9 (SiO2 ) 2
gate-channel capacity C/F 1.73 × 10-16
3.54 × 10-18
supply voltage VDD/volts 1 0.1
charge in channel Q/C 1.73 × 10-16
3.54 × 10-19
carrier velocity/ms-1
6 × 10 4
(d) 2 × 103
(e)
transit time T/ns 0.00083 0.025
channel current I/µA 208 0.0142
switch energy CV2
/Joules 1.73 × 10-16
3.54 × 10-20
switch energy CV2
/eV 1080 0.22
Clock frequency/GHz 3 3 (f)
Clock period/ns (g) 0.33 0.33…(f)
(a) Typical parameters for state of the art Intel Pentium chip
(b) Choose same width and length as SiFET
(c) Choose insulator thickness to equal source-drain length
(d) The saturated velocity in n silicon
(e) The solectron velocity.
(f) Choose same clock frequency and period as SiFET
(g) The minimum usable clock period is limited by factors external to the FET

36. IS PDA UNIQUE?
Could PDA be replaced by a high mobility
insulator such as ultra pure silicon?
Or by graphene?
1D electronics is radically different than 2D
and 3D electronics

37. Traps in insulators are unavoidable.
But can be reduced by blood, sweat and toil.
If PDA in the SFET is replaced by a 2D or 3D insulator of
the same fractional purity then trapping would be very
much greater.
This is an advantage of 1D compared to 2D and 3D
ADVANTAGE OF 1D SFET

38. DISADVANTAGE OF 1D SFET
rkT
Coulomb radius rkT
kT = e2 /4πεε0 rkT
Backbone spacing 0.7 nm
rkT ≈ 30 nm
Bipolar Transport
Unipolar Transport
Queuing

39. CONCLUSION
SFET has potential to reduce energy costs of computing by
many orders of magnitude.
Need to make a demonstrator single SFET to evaluate
feasibility.
HOW ???