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This is our overview on the Brain NECSTwork's implementation.
Discoveries associated with a more precise comprehension of the connections inside human brain are foreseen as disruptive in many fields: from improved neurological disorders treatment to strong artificial intelligence, as well as more precise and less invasive diagnostic tools and, finally, improved Big Data systems. For this purpose, Brain Networks (BNs) are used to quickly and accurately model and map neural interconnections inside human brain.
A common statistical tool that helps analysis and definition of BNs is the Pearson's Correlation Coefficient (PCC), which is able to identify the correlation between neurons or groups of neighboring neurons.
However, the computational power that commonly available technologies provide allows scientists to analyze only few hundred neural nodes within reasonable time. Increasing the number of analyzed neurons and speeding up the computation are both fundamental steps to achieve more accurate results, and to allow the scientiﬁc and medical research to progress.
This work presents an implementation of BNs on Xilinx VIRTEX-7 FPGA. Our goal is to tackle the problems previously described, in order to provide a fast hardware implementation able to support the computation of a remarkable number of neurons.