The Zynq* is a great device, but …
• What’s your software development strategy?
• How do you deal with global address space in a
• Can you synchronize the memories easily?
• Can you easily move data from one memory to another?
• How do you connect the ARM* cores with your Microblaze*
cores, your 3rd party IP blocks and your internal IP blocks?
• How do you move data from one node to another?
• How do you address real-time demands?
*Zynq and Microblaze are trademarks of Xilinx, Inc. ARM is a trademark of ARM Holdings, plc
Introducing DME for Zynq 1
• The DME for Zynq consists of three IP blocks -
the DME, a NoC and a DME Bridge
• The DME (Data Management Engine) is an IP
* Global and unified memory map
* Synchronization primitives
* Communications primitives (send-receive)
* Data Movement
• In Real Time Mode the DME guarantees a
worst case delay
Introducing DME for Zynq 2
• The NoC (Network on Chip) caters to the
communication between the nodes (processor
cores, 3rd party IP cores, proprietary IP)
• The ARM and the Microblaze subsystems in
the Zynq can be connected over a DME Bridge
(a customized DME)
Saving system development time
• Easily available shared global address space for
ARMs and Microblazes => Easier software
• Synchronization of on-chip and off-chip
memories => Easier software development +
power efficient memory consistency
• Seamless communication between the ARM and
Microblaze subsystems => Fast, predictable
• Support for background movement of data from
one memory to another (byte, half-word or word)
=> Offloading processor nodes, translates to
lower power and/or faster operation
• Support for real-time demands => Perfect for
How fast is Real Time?
The DME can operate in best effort or real time mode. In RT mode, the
delay depends on the number of words communicated, the (topological)
distance between source and destination, and the maximum number or RT
communications that may be active concurrently.
DB = (3 + H + D) * C
where DB is the delay bound for any RT communication
H is the distance (number of NoC nodes) between source and
D is the number of words communicated
C is the maximum number of concurrently occuring RT communications
With one switch, a two word communication and two RT communications,
the DB would be 12 cycles, equalling 120 ns in a 100 MHz design.
NB: Each RT communication can include tick number information.
• DME IP block as Verilog compiled netlist
• NoC IP as Verilog compiled netlist
• DME software and API
• Test bench, adapted to customer needs
• Software test cases, adapted to customer needs
• Founded by professors Axel Jantsch, Ahmed Hemani and Zhonghai Lu
at the Royal Institute of Technology in Stockholm 2011
• Received initial funding from Vinnova
• Commercial launch when Adam Edström (CEO) and Bengt Edlund
(Sales Dir) joined the company Sept 2012
• Launched DME in October 2012
• Established subsidiary Memcom in Wuxi, PRC, in March 2012,
Received initial funding from Wuxi government
• Cooperation with Fudan-Wuxi Institute, Shanghai, PRC
• Selected by SICS, the Swedish Institute of Computer Science, as
member of SICS Startup Accelerator
• Launched DME for Zynq in September 2013
Axel Jantsch, CTO. Professor, KTH Electronic Systems since
2002. 20+ years of research, primarily within NoC and SoC.
200+ scientific papers published. Visiting professor of Fudan
University in PRC and Cantabria University in Spain
Ahmed Hemani. Professor, KTH, focus on high-level system
integration, design automation, NoC, asynchronous circuit,
configurable system. Industrial experience from NSC,
NXP/Philips, ABB, Ericsson, Newlogic, Synthesia and
Zhonghai Lu: Professor, KTH, expert in SoC and NoC.
Reviewer of 14 international periodicals. Principal
investigator of Intel, dealing with future nuclear processor
Adam Edström, CEO. 20+ years as editor and editor-in-
chief of Elektroniktidningen, Sweden's major
electronics publication. Visiting editor at Fortune
Magazine in NYC. VP International affairs at SICS,
Swedish Institute of Computer Science. Founded
three companies prior to Elsip.
Bengt Edlund, Sales Director. 30+ years of
semiconductor sales, marketing and new technology
business development at National Semiconductor and
Hewlett Packard. Served as European director of
business development, marketing and global sales.
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