1
Organic Charge Trapping Memory
Transistors
Dries Agten – Erik Bury – André Cardoso – Evelien Mathieu – Pieter Weckx
2
Overview
 Introduction
o Memory types
o FET-based memories
 Working principle
o Charge trapping
o Band diagram analysi...
3
Memory types
Q.D. Ling et al, Progr. Polym. Sci. 2008, 33, 92
Introduction
4
FET-based memories
Floating Gate FerroelectricCharge Trapping
Cyferz, Wikipedia, 2007, Flash_cell_structure Cyferz, Wiki...
5
SONOS/MONOS Dielectrics
Cyferz, Wikipedia, 2007, SONOS_cell_structure L. Forbes, free patents onl. 2005, 10/775908
Charg...
6
Charge Trapping
Organic field-effect transistors with polarizable gate insulators
Howard E. Katz et al., Appl. Phys. 200...
7
From MOS to FGMOS
 Based on MOSFET
transistor
 Gate is uncoupled, memory
is non-volatile
 Charges are trapped in the
...
8
Influences on Vth
Traps close to/in the
channel
Charge injection from
the semiconductor into
the dielectric
Slow reactio...
9
Band diagram analysis (1)
Vgs=0V Vgs=-5V
-> accumulation-> depletion
Working principle
10
Band diagram analysis (2)
Vgs=-5V Vgs=-10V
-> accumulation-> inversion
Working principle
11
Working principle
 When applying an external voltage to the gate, charges
tunnel from the channel to the interface (~1...
12
Measurement setup
S.Y. Chou, Princeton University, Publication on website
Working principle
13
Measurements
Shift in threshold voltage
M. Debucquoy et al, Organic electronics 2009, 10, 1252
Working principle
14
Ambipolar vs unipolar
 Ambipolar semiconductor: both p-type and n-type operations are
realised (eg. program by holes a...
15
Stacking holes for memory
usage
 Example: electrons tunnel back too easy -> poor
retention time
 Negative part of mem...
16
Search for improvement in terms of Materials and Scheme
Singh et al, 2004
Heremans et al, 2009
Comparison of two device...
17
Comparison - Structure
 PVA – polyvinylalcohol
 PCBM – methanofullerene
T.B. Singh et al, Appl. Phys. Lett. 2004,
85,...
18
Comparison - Semiconductor
 PCBM
 p-type
 High mobility
 High ON/OFF current ratio
T.B. Singh et al, Appl. Phys. Le...
19
Comparison - Electret
 Charge trapping within bulk
or at interface
 Hydrophilic
T.B. Singh et al, Appl. Phys. Lett.
2...
20
Comparison - Adjacent materials
 Cr for source & drain:
o No diffusion into PCBM
 ITO gate
 No insulator layer
 Hep...
21
Performance measurements (Singh)
T.B. Singh et al, Appl. Phys. Lett.
2004, 85, 22, 5409
T.B. Singh et al, Appl. Phys. L...
22
Performance Measurements (Herem.)
- pulse (write)
h trapped
Programming voltage Transistor’s mobility
e-
trapped
dielec...
23
Performance Comparison
FLASH
[a]
Floating
Gate
[b]
Ferroelectric
[c]
PVA &
PCBM
[d]
PαMS &
pentacene
[e]
Retention time...
24
Conclusion
 Conclusion from Singh organic memory:
o The combination of PVA & PCBM
does not make a good memory-element
...
25
References
 K.J. Baeg et al, Adv. Funct. Mater. 2008, 18, 3678-3685
 T.B. Singh et al, Appl. Phys. Lett. 2004, 85, 54...
Upcoming SlideShare
Loading in …5
×

Organic Charge Trapping Memory Transistors

2,027 views

Published on

Under a Compulsory Course of "Materials Physics and Technology for Nanoelectronics" a team of BE Students of Nanotechnology, Nanoelectronics and Bionnotechnology prepared this seminar for Prof. Marc Heyns, marc.heyns@imec.be Kapeldreef 75, B-3001 Heverlee IMEC Building IV, room 2.33
Tel: 016 281 348

Published in: Technology, Business
0 Comments
0 Likes
Statistics
Notes
  • Be the first to comment

  • Be the first to like this

No Downloads
Views
Total views
2,027
On SlideShare
0
From Embeds
0
Number of Embeds
8
Actions
Shares
0
Downloads
82
Comments
0
Likes
0
Embeds 0
No embeds

No notes for slide
  • Memory types
    Two main branches: volatile and non-volatile Volatile memory is lost when the power is turned off.
    Three catagories in the memory, based on the mechanistic analogy between the polymer memory element and one of the three primary circuit elements (capacitor, transistor and resistor).
    Main driving force behind memory technology: higher capacity, higher system performance, lower power consumption, smaller dimensions, lower system cost.
    These demands are met by further scaling of the inorganic 2D-chips:new fabrication technologies, new structures (double-/triple-gate & multi-core), new materials (strained Si, high K dielectrics, metal gate materials).
  • You can work with Organic Field Effect Transistors.
    Three types are used:
    Floating gate OFET
    The charges are stored on a conducting or semiconducting layer that is completely surrounded by a dielectric, the embedded metal layer serves as the floating gate.
    Ferroelectric OFET
    The gate insulator is composed of a ferroelectric material the memory effect arises from attenuation of the surface charge density in the semiconductor by Pr of the ferroelectric
    Charge trapping OFET
    In charge trapping OFET memory, the charges are stored in an appropriate dielectric layer with electret properties
  • 2001 Organic field-effect transistors with polarizable gate insulators
    Howard E. Katz, X. Michael Hong, Ananth Dodabalapur, and Rahul Sarpeshkar
    J Appl Phys 2002;91:1572–6
    storage or polarization between the gate contact and the semiconductor channel imposes an added voltage between the gate and channel, thereby altering the effective channel voltage relative to the voltage nominally applied at the gate contact (the ‘‘gate voltage,’’ Vg!). The charge may be stored and/or polarized in domains within the bulk of the dielectric, or at interfaces between the gate contact and channel
    “There is growing appreciation of the capability to fabricate
    various kinds of electronic circuits from organic materials.”
    There are several reasons why it might be desirable to modify an organic-based transistor so that the voltage applied to its channel is shifted relative to Vg . Besides the creation of additional electronic states, which can be read as stored information, devices with polarized gate dielectrics can function more effectively in certain circuits.
    Applications demanding inexpensive processing and large coverage area are attractive for ‘‘organic electronics.’’
  • To be a non-volatile transistor for application in memory, the charges must be stored or polarized in domains within the bulk of the dielectric layer, or at interfaces between the gate contact and the semiconductor channel. An additional voltage, via charge storage or
    polarization, is thus introduced between the gate and the semiconductor channel to alter the charge distribution in the transistor.
    Generally SONOS is very similar to standard double polysilicon Flash, but at least in theory offers higher quality storage. This is due to the smooth homogeneity of the Si3N4 film compared with polycrystalline film which has tiny irregularities. Flash requires the construction of a very high-performance insulating barrier on the gate leads of its transistors, often requiring as many as nine different steps, whereas the oxide layering in SONOS can be more easily produced on existing lines and more easily combined with CMOS logic. (wiki)
    Source figure: “Materials issues for layered tunnel barrier structures” J. D. Casperson et al. JOAP
    Top contact of bottom contact?
  • Blue = Effects of mobile charges at the channel
    Green = Effects resulting in a polarization of the gate
    Dielectric
    Red = Charge injection from the gate electrode into the
    dielectric

  • The IV characteristics above taken at room temperature shows how the threshold voltage of the device was shifted after the floating gate was charged with different number of electrons. Charging the transistor with programming pulses of x seconds leads to a different V_threshold.
    (For a pentacene device: ID vs. VGS in the initial state (dotted line) and after programming pulses with tprog = 1.5 ms and VGS,prog = 17 V
    (filled squares)/17 V (filled circles)/20 V (open squares)/20 V (open circles).)
  • Ambipolar OFETs have been difficult to produce due to the lack of materials that exhibit both reasonably high electron and hole mobilities.
    This problem arises mostly due to the strong preference of organic materials either to have high electron mobility or hole mobility and not both at the same time.
    When pentacene is exposed to air, it leads to additional traps for the electrons (probably moisture related), reducing severly the mobility of them.
    -> V_on cannot be shifted towards a more positive Vgs value anymore.
    Ambipolarity of the organic semiconductor is a strict requirment for achieving reprogrammability at low fields!
  • Retention measurement for a pentacene device. The first point of the Von curve is reached after a pulse with |VGS,prog| = 20 V and tprog = 1.5 ms.
    The first point of the Von+ curve is reached after a pulse with |VGS,prog| = 20 V and tprog = 1.5 ms.
    This indicates that the electrons are trapped in shallow traps and that the positive part of the memory window cannot be used for
    practical applications. Von on the other hand, is only reduced to 3 V after 3 months. The holes are deeply trapped in a more complex distribution, making it possible to use the negative part of the memory window
  • The most important articles from this part
  • Memory Window + Retention Time
    Measured:
    Transfer characteristics ( VON)
    Mobility (μ )
    μ – hole mobility
    Three bottom slides: time analysis -> Feasible Memory[(Cycles ; Transfer characteristic (time); Von(time)]
    Observed:
    High programming voltages
    Shift in turn-on voltage -> Explained by trapping of holes and electrons at the gate dielectric
    Low programming voltages
    Electric field over PalfaMS is too low for the holes and electron to be injected into the dielectric stack (no charges trapped)
    Note: Between 10-14V programing pulse Holes tunnel in negative pulse, resulting in more negative Von
    So: useful part is: programming between: 14-20V (15V)
    Transistor’s mobility – is it really important this difference: 0.05?
    Made by trapping of holes or electrons? Damaging of pentacene/PalfaMS
    Fig 3 Time analysis – Cycles§
    One cycle=write and erase
    After 500 still works as a memory transistor with two distinct states
    Fig.4 Retention Time
    After 3month all trapped electrons are lost and Von+ reduced to 0V
  • Organic Charge Trapping Memory Transistors

    1. 1. 1 Organic Charge Trapping Memory Transistors Dries Agten – Erik Bury – André Cardoso – Evelien Mathieu – Pieter Weckx
    2. 2. 2 Overview  Introduction o Memory types o FET-based memories  Working principle o Charge trapping o Band diagram analysis o Programming sequence  Comparison of two devices o PVA & PCBM o PαMS & Pentacene  Conclusion
    3. 3. 3 Memory types Q.D. Ling et al, Progr. Polym. Sci. 2008, 33, 92 Introduction
    4. 4. 4 FET-based memories Floating Gate FerroelectricCharge Trapping Cyferz, Wikipedia, 2007, Flash_cell_structure Cyferz, Wikipedia, 2008, 1T_FeRAM_cell_structure Introduction
    5. 5. 5 SONOS/MONOS Dielectrics Cyferz, Wikipedia, 2007, SONOS_cell_structure L. Forbes, free patents onl. 2005, 10/775908 Charge Trapping Introduction
    6. 6. 6 Charge Trapping Organic field-effect transistors with polarizable gate insulators Howard E. Katz et al., Appl. Phys. 2002, 91, 1572–6 “There is growing appreciation of the capability to fabricate various kinds of electronic circuits from organic materials.” Introduction
    7. 7. 7 From MOS to FGMOS  Based on MOSFET transistor  Gate is uncoupled, memory is non-volatile  Charges are trapped in the floating gate  Data sensed by Vth shift of MOSFET Data represented by carriers stored in the floating gate J. D. Casperson et al., CIT, Journal of Applied Physics, 2009, 92, 261 Working principle
    8. 8. 8 Influences on Vth Traps close to/in the channel Charge injection from the semiconductor into the dielectric Slow reactions of charge carriers in the organic semiconductor Mobile ions in the semiconductor Ferroelectric effect Mobile ions in th dielectric Charge injection from the gate electrode M. Egginger et al., Monatsh Chem, 2009,140,735 Working principle
    9. 9. 9 Band diagram analysis (1) Vgs=0V Vgs=-5V -> accumulation-> depletion Working principle
    10. 10. 10 Band diagram analysis (2) Vgs=-5V Vgs=-10V -> accumulation-> inversion Working principle
    11. 11. 11 Working principle  When applying an external voltage to the gate, charges tunnel from the channel to the interface (~104 carriers to represent 1 bit)  Both electrons and holes Programming sequence
    12. 12. 12 Measurement setup S.Y. Chou, Princeton University, Publication on website Working principle
    13. 13. 13 Measurements Shift in threshold voltage M. Debucquoy et al, Organic electronics 2009, 10, 1252 Working principle
    14. 14. 14 Ambipolar vs unipolar  Ambipolar semiconductor: both p-type and n-type operations are realised (eg. program by holes and erase by electrons) → Balanced mobility (n and p) and ON/OFF operation needed Insufficient electron mobility → Trapped holes cannot be erased Wide memory window Working principle
    15. 15. 15 Stacking holes for memory usage  Example: electrons tunnel back too easy -> poor retention time  Negative part of memory window is useful M. Debucquoy et al , Organic electronics 2009, 10, 1252 Working principle
    16. 16. 16 Search for improvement in terms of Materials and Scheme Singh et al, 2004 Heremans et al, 2009 Comparison of two devicesComparison of two devices
    17. 17. 17 Comparison - Structure  PVA – polyvinylalcohol  PCBM – methanofullerene T.B. Singh et al, Appl. Phys. Lett. 2004, 85, 22, 5409 Organic components Size: channel length W=1000um L=10um Comparison of two devices  Pentacene – polyaromatic hydrocarbon  PαMS – polystyrene  Thiol monolayer – fluorinated thiols
    18. 18. 18 Comparison - Semiconductor  PCBM  p-type  High mobility  High ON/OFF current ratio T.B. Singh et al, Appl. Phys. Lett. 2004, 85, 22, 5409  Pentacene (~14 Å) o 5 benzene rings o Crystal Structure  p-type  High Mobility  Reasonable ON/OFF current ratio IBM Zurich,AFM Image Penacene Aug 2009 Campbell, 1961 molecular packing Prof. Takao Someya Comparison of two devices
    19. 19. 19 Comparison - Electret  Charge trapping within bulk or at interface  Hydrophilic T.B. Singh et al, Appl. Phys. Lett. 2004, 85, 22, 5409  PαMS (polyalpha-methylstyrene)  Hydrophobic (Insulator coated with a very thin-layer) Reduces: trapped electrons at the interface between the pentacene and the gate dielectric To suppress the degradation of the on–off ratio High-quality, electron-trap free surface allowing excellent electron transport Comparison of two devices
    20. 20. 20 Comparison - Adjacent materials  Cr for source & drain: o No diffusion into PCBM  ITO gate  No insulator layer  Heptadecafluoro-1-decanethiol (Thiol monolayer)  Other materials: o Au ; SiO2 ; n++Si Improved interface: Improves pentacene layer growth Reduces interface states  Mobility increases  Threshold voltage approaches zero Appl. Phys. Lett. 88, 222103 (2006) Improve the interface Contacts <-> Semiconductor layer Comparison of two devices
    21. 21. 21 Performance measurements (Singh) T.B. Singh et al, Appl. Phys. Lett. 2004, 85, 22, 5409 T.B. Singh et al, Appl. Phys. Lett. 2004, 85, 22, 5409 Comparison of two devices
    22. 22. 22 Performance Measurements (Herem.) - pulse (write) h trapped Programming voltage Transistor’s mobility e- trapped dielectric ΔVon =2V Gate Decrease 1.9V->1.4V h mobility decrease Shift VON+ & VON- Retention time Memory Window +pulse (erase) e trapped Saturation Comparison of two devices
    23. 23. 23 Performance Comparison FLASH [a] Floating Gate [b] Ferroelectric [c] PVA & PCBM [d] PαMS & pentacene [e] Retention time (h) ~ 3 years ~ 11 ~ 168 > 15 > 3 months Programming time (s) 0.8 1 0.3e-3 500 1.5e-3 Programming/erasing voltage (V) +8/-8 +6/-6 +77.5/-77.5 +50/-50 -15/+15 [a] R. Bez et al, Proc. of the IEEE 2003, 91, 4, 489 [b] S. Kolliopoulou et al, Microel. Eng. 2004, 73-74, 725 [c] R.C.G. Naber et al, Nat. Mater. 2005, 4, 243 [d] T.B. Singh et al, Appl. Phys. Lett. 2004, 85, 22, 5409 [e] P. Heremans et al, Appl. Phys. Lett. 2009, 95, 103311 Comparison of two devices
    24. 24. 24 Conclusion  Conclusion from Singh organic memory: o The combination of PVA & PCBM does not make a good memory-element  Conclusion from Heremans organic memory: o It is possible to fabricate a device with reprogrammable nonvolatile organic memory usable in Plastic Logic. “Organic Transistor/Memory devices will reach $21.6 Billion in 2015”, NanoMarkets (2001) Conclusion
    25. 25. 25 References  K.J. Baeg et al, Adv. Funct. Mater. 2008, 18, 3678-3685  T.B. Singh et al, Appl. Phys. Lett. 2004, 85, 5409-5411  K.J. Baeg et al, Adv. Mater. 2006, 18, 3179-3183  Q.D. Ling et al, Progr. Polym. Sci. 2008, 33, 917-978  R. Bez et al, Proc. of the IEEE 2003, 91, 4, 489-502  S. Kolliopoulou et al, Microel. Eng. 2004, 73-74, 725-729  R.C.G. Naber et al, Nat. Mater. 2005, 4, 243-248  P. Heremans et al, Appl. Phys. Lett. 2009, 95, 103311  J. Kang et al, J. Am. Chem. Soc., 2008, 130 (37), 12273–12275  K. Myny et al, Appl. Phys. Lett. 2006, 88, 222103  K. Asadi et al, Nature Materials 2008, 7, 547  Forbes, free patents onl. 2005, 10/775908  H.E. Katz et al, Appl. Phys. 2002, 91, 1572–6  Cyferz, Wikipedia 2007, Flash_cell_structure  Cyferz, Wikipedia 2008, 1T_FeRAM_cell_structure  Cyferz, Wikipedia 2007, SONOS_cell_structure

    ×