Slideshare uses cookies to improve functionality and performance, and to provide you with relevant advertising. If you continue browsing the site, you agree to the use of cookies on this website. See our User Agreement and Privacy Policy.

Slideshare uses cookies to improve functionality and performance, and to provide you with relevant advertising. If you continue browsing the site, you agree to the use of cookies on this website. See our Privacy Policy and User Agreement for details.

Like this presentation? Why not share!

- L9 opamp by LearnInUrdu.com &... 668 views
- Stress Management - Presentation by... by LearnInUrdu.com &... 624 views
- Fundamentals of Designing with Sensors by Analog Devices, Inc. 2408 views
- Integrated Software-Defined Radio (... by Analog Devices, Inc. 2371 views
- IC Design of Power Management Circu... by Claudia Sin 5339 views

1,639 views

Published on

Design with Operational Amplifiers, also known as Op Amps

No Downloads

Total views

1,639

On SlideShare

0

From Embeds

0

Number of Embeds

5

Shares

0

Downloads

76

Comments

0

Likes

1

No embeds

No notes for slide

- 1. The World Leader in High Performance Signal Processing SolutionsTHE FUNDAMENTALS OF DESIGNING WITH SEMICONDUCTORS FOR SIGNAL PROCESSING APPLICATIONS Class 2 - THE OP AMP Presented by David Kress
- 2. Analog to Electronic signal processing Sensor Amp Converter Digital Processor (INPUT) Actuator Amp Converter (OUTPUT)
- 3. Analog to Electronic signal processing Sensor Amp Converter Digital Processor (INPUT) Actuator Amp Converter (OUTPUT)
- 4. Amplifiers and Operational Amplifiers Amplifiers Make a low-level, high-source impedance signal into a high- level, low-source impedance signal Op amps, power amps, RF amps, instrumentation amps, etc. Most complex amplifiers built up from combinations of op amps Operational amplifiers Three-terminal device (plus power supplies) Amplify a small signal at the input terminals to a very, very large one at the output terminal
- 5. Operational Amplifiers Operational Op amps can be configured with feedback networks in multiple ways to perform ‘operations’ on input signals ‘Operations’ include positive or negative gain, filtering, nonlinear transfer functions, comparison, summation, subtraction, reference buffering, differential amplification, integration, differentiation, etc. Applications Fundamental building block for analog design Sensor input amplifier Simple and complex filters – anti-aliasing ADC driver
- 6. Original vacuum-tube op-amp from Philbrick Research in 1953 – itused +/- 300V supplies
- 7. THE RELATIVE SCALE OF SOME MODERNIC OP AMP PACKAGES SC-70 SOT-23 MSOP8 mSOIC 8-SOIC 14-SOIC 0.1 in (ALL PACKAGES ABOVE TO SAME SCALE) SC-70 SOT-23
- 8. AD823 JFET Input Op Amp SimplifiedSchematic +VS VBE + 0.3V Q43 Q44 Q57 Q72 Q61 Q58 Q49 A=1 A=19 J1 J6 (+) R44 R28 INPUTS (-) Q62 Q60 OUTPUT S1P S1N VB Q48 Q59 Q17 A=1 A=19 Q53 Q35 I1 Q56 -VS BIAS CURRENT = 25pA MAX @ +25 C INPUT OFFSET VOLTAGE = 0.8mV MAX @ +25 C INPUT VOLTAGE NOISE = 15nV/Hz INPUT CURRENT NOISE = 1fA/Hz
- 9. Standard op amp symbol (+) INPUTS (-)1-9
- 10. The Ideal Op Amp and its Attributes POSITIVE SUPPLY IDEAL OP AMP ATTRIBUTES: Infinite Differential Gain Zero Common Mode Gain Zero Offset Voltage Zero Bias Current (+) OP AMP INPUTS: INPUTS OP AMP OUTPUT High Input Impedance Low Bias Current (-) Respond to Differential Mode Voltages Ignore Common Mode Voltages OP AMP OUTPUT: Low Source Impedance NEGATIVE SUPPLY
- 11. Operational Amplifier Circuit Design Use of negative feedback The output signal, or a controlled portion of it, is fed back to the negative (-) input terminal The op amp will adjust the output signal until the input difference goes to zero Example of high-gain Assume op amp gain of 106 (one million) Apply signal of one volt to positive input Feedback directly from output to negative input Output will go to one volt (minus one microvolt) Difference at input will be on microvolt
- 12. Key Op Amp Performance Features Bandwidth and slew rate The speed of the op amp Bandwidth is the highest operating frequency of the op amp Slew rate is the maximum rate of change of the output Determined by the frequency of the signal and the gain needed Offset voltage and current The errors of the op amp Determines measurement accuracy Noise Op amp noise limits how small a signal can be amplified with good fidelity
- 13. Non-inverting Mode Op Amp Stage OP AMP G = VOUT/VIN = 1 + (RF/RG) RF VIN VOUT RG1-13
- 14. Inverting Mode Op Amp Stage SUMMING POINT RG RF G = VOUT/VIN = - RF/RG VIN OP AMP VOUT1-14
- 15. Non-Inverting Amplifier gain V OUT RFB G= V IN I VOUT RFB VIN = 1+ R IN RIN1-15
- 16. Single Pole Op Amp Active Filters - - + + (A) (B) LOWPASS HIGHPASS 5-38
- 17. Open Loop Gain (Bode Plot) OPEN OPEN LOOP LOOP GAIN 6dB/OCTAVE GAIN 6dB/OCTAVE dB dB 12dB/ OCTAVE1-17
- 18. Gain-Bandwidth Product GAIN dB OPEN LOOP GAIN, A(s) IF GAIN BANDWIDTH PRODUCT = X THEN Y · fCL = X X fCL = NOISE GAIN = Y Y WHERE fCL = CLOSED-LOOP R2 BANDWIDTH Y=1+ R1 fCL LOG f1-18
- 19. Noise Gain IN + + + + + + + + + + + + A B C R1 - - - - R1 - - - - R1 - IN IN R2 R2 R2 Signal Gain = 1 + R2/R1 Signal Gain =- R2/R1 Signal Gain =- R2/R1 R2 Noise Gain = 1 + R2/R1 Noise Gain = 1 + R2/R1 Noise Gain = 1 + R1R3 Voltage Noise and Offset Voltage of the op amp are reflected to the output by the Noise Gain. Noise Gain, not Signal Gain, is relevant in assessing stability. Circuit C has unchanged Signal Gain, but higher Noise Gain, thus better stability, worse noise, and higher output offset voltage.1-19
- 20. AD847 Open Loop Gain1-20
- 21. AD8051 Phase Margin1-21
- 22. VFB and CFB AmplifiersVIN + + VIN –T(s) i ×1 v ~–A(s) v VOUT i T(s) ×1 VOUT i RO – – R2 R2 R1 R1 T(s) = TRANSIMPEDANCE OPEN LOOP GAIN A(s) = OPEN LOOP GAIN VOUT = -T(s)*i VOUT = A(s)*v1-22
- 23. Current Feedback Amplifier FrequencyResponse GAIN dB G1 G1 · f1 G2 · f2 G2 f1 f2 LOG f Feedback resistor fixed for optimum performance. Larger values reduce bandwidth, smaller values may cause instability. For fixed feedback resistor, changing gain has little effect on bandwidth. Current feedback op amps do not have a fixed gain-bandwidth product.1-23
- 24. Standard Input Stage (Differential Pair) VIN1-24
- 25. PNP Input Stage +VS -VS1-25
- 26. Compound Input Stage +VS -VS1-26
- 27. Output Stages. Emitter Follower for StandardConfiguration And Common Emitter for “Rail-to-Rail” Configuration EMITTER FOLLOWER COMMON EMITTER +V S +V S OUTPUT OUTPUT -V S -V S1-27
- 28. INPUT OFFSET VOLTAGE - VOS + Offset Voltage: The differential voltage which must be applied to the input of an op amp to produce zero output. Ranges: Chopper Stabilized Op Amps: <1µV General Purpose Precision Op Amps: 50-500µV Best Bipolar Op Amps: 10-25µV Best FET Op Amps: 100-1,000µV High Speed Op Amps: 100-2,000µV Untrimmed CMOS Op Amps: 5,000-50,000µV DigiTrim™ CMOS Op Amps: <1,000µV
- 29. Offset Adjustment Pins +VS OR -VS +VS 1 2 - 8 7 6 4 3 + -VS1-29
- 30. External Offset Adjustment R2 (B) R2 (A) R1 R1 VIN VIN – – VOUT VOUT + + NOISE GAIN = NOISE GAIN = RP R2 R2 R3 1+ R3 1+ R1 R1||(R3 + RA||RB) RA RB RA RB –VR +VR –VR +VR RP VOUT = – R2 VIN ± R2 VR VOUT = – R2 VIN ± 1 + R2 VR R1 R1 RP + R3 R1 R3 MAX MAX OFFSET OFFSET RP = R1||R2 IF IB+ IB- RP 50 IF IB+ IB-1-30
- 31. Input Bias Current + IB+ IB-1-31
- 32. Bias Current Compensation R2 R1 – IB– VO IB+ + R3 = R1 || R2 VO = R2 (IB– – IB+) = R2 IOS = 0, IF IB+ = IB– NEGLECTING VOS1-32
- 33. Total Offset Voltage Calculations B R1 IB– R2 – VOS VOUT A R3 IB+ + GAIN FROM = "A" TO OUTPUT GAIN FROM R2 NOISE GAIN = = – "B" TO OUTPUT R1 R2 NG = 1 + R1 OFFSET (RTO) = VOS 1 + R2 R2 R1 + IB+• R3 1+ R1 – IB–• R2 R1•R2 OFFSET (RTI ) = VOS + IB+• R3 – IB– R1 + R2 FOR BIAS CURRENT CANCELLATION: R1•R2 OFFSET (RTI) = VOS IF IB+ = IB– AND R3 = R1 + R21-33
- 34. Input Impedance IB+ IB– Zdiff + INPUT – INPUT Zcm+ Zcm–1-34
- 35. Current Feedback Input Resistance +INPUT X1 - INPUT Z- Z+1-35
- 36. Voltage Noise – VN +1-36
- 37. Equivalent Noise Bandwidth GAUSSIAN SINGLE POLE NOISE LOWPASS SOURCE FILTER, fC SAME IDENTICAL LEVELS RMS NOISE LEVEL GAUSSIAN BRICK WALL NOISE LOWPASS SOURCE FILTER, 1.57fC EQUIVALENT NOISE BANDWIDTH = 1.57 fC1-37
- 38. Current Noise - IN– IN+ +1-38
- 39. Total Noise Calculation R2 V R2J V R1J R1 V n V ON In- V RPJ Rp + In+ BW = 1.57 FCL FCL = CLOSED LOOP BANDWIDTH VON = BW [(In-2)R22] [NG] + [(In+2)RP2] [NG] + VN2 [NG] + 4kTR2 [NG-1] + 4kTR1 [NG-1] + 4kTRP [NG]1-39
- 40. Dominant Noise Source Determinedby Input Impedance EXAMPLE: OP27 VALUES OF R CONTRIBUTION Voltage Noise = 3nV / Hz FROM Current Noise = 1pA / Hz 0 3k 300k T = 25°C AMPLIFIER VOLTAGE NOISE 3 3 3 + AMPLIFIER OP27 CURRENT NOISE 0 3 300 R FLOWING IN R – JOHNSON 0 7 70 NOISE OF R R2 R1 RTI NOISE (nV / Hz) Neglect R1 and R2 Dominant Noise Source is Highlighted Noise Contribution1-40
- 41. 1/f Noise Bandwidth NOISE 3dB/Octave 1 nV / Hz en, in = k FC f or pA / Hz 1 CORNER en, in f WHITE NOISE k FC LOG f 1/f Corner Frequency is a figure of merit for op amp noise performance (the lower the better) Typical Ranges: 2Hz to 2kHz Voltage Noise and Current Noise do not necessarily have the same 1/f corner frequency1-41
- 42. RMS to Peak to Peak Voltage ComparisonChart1-42
- 43. The Peak-to-Peak Noisein the 0.1 Hz. to 10 Hz. Bandwidth1-43
- 44. Resistor Noise VNR R ALL resistors have a voltage noise of V = 4kTBR) NR T = Absolute Temperature = T ( ° C) + 273.15 B = Bandwidth (Hz) -23 k = Boltzmann ’ s Constant (1.38 x 10 J/K) A 1000 resistor generates 4 nV / Hz @ 25°C1-44
- 45. THD & THD+N Definitions Vs = Signal Amplitude (RMS Volts) V2 = Second Harmonic Amplitude (RMS Volts) Vn = nth Harmonic Amplitude (RMS Volts) Vnoise = RMS value of noise over measurement bandwidth V22 + V32 + V42 + . . . + Vn2 + Vnoise2 THD + N = Vs V22 + V32 + V42 + . . . + Vn2 THD = Vs1-45
- 46. Slew Rate OVERSHOOTFINAL VALUE 90% VOLTAGE V SLEW RATE = T V 10% T RINGING TIME1-46
- 47. Slew Rate and Full Power Bandwidth Slew Rate = Maximum rate at which the output voltage of an op amp can change Ranges: A few volts / s to several thousand volts / s For a sinewave, V out = Vp sin2 f t dV/dt = 2π f Vp cos 2π f t (dV/dt)max = 2fVp If 2 V p = full output span of op amp, then Slew Rate = (dV/dt) max = 2 * FPBW * Vp FPBW = Slew Rate / 2 Vp1-47
- 48. Settling Time OUTPUT ERROR BAND DEAD SLEW RECOVERY FINAL TIME TIME TIME SETTLING SETTLING TIME Error band is usually defined to be a percentage of the step 0.1 % 0.05%, 0.01%, etc. Settling time is non -linear; it may take 30 times as long to settle to 0.01% as to 0.1%. Manufacturers often choose an error band which makes the op amp look good.1-48
- 49. Common Mode Rejection Ratiofor the OP177 160 140 120 CMR 100 CMR = dB 20 log10 CMRR 80 60 40 20 0 0.01 0.1 1 10 100 1k 10k 100k 1M FREQUENCY - Hz1-49
- 50. Power Supply Rejection Ratio 160 140 120 PSR 100 PSR = dB 20 log10 PSRR 80 60 40 20 0 0.01 0.1 1 10 100 1k 10k 100k 1M FREQUENCY - Hz1-50
- 51. Maximum Power Chart (from the AD8001)1-51
- 52. Input Protection +V S RS + - -V S1-52
- 53. Typical Absolute Maximum Ratings1-53
- 54. Single-Supply Op Amps Single Supply Offers: Lower Power Battery Operated Portable Equipment Requires Only One Voltage Design Tradeoffs: Reduced Signal Swing Increases Sensitivity to Errors Caused by Offset Voltage, Bias Current, Finite Open- Loop Gain, Noise, etc. Must Usually Share Noisy Digital Supply Rail-to-Rail Input and Output Needed to Increase Signal Swing Precision Less than the best Dual Supply Op Amps but not Required for All Applications Many Op Amps Specified for Single Supply, but do not have Rail-to-Rail Inputs or Outputs
- 55. Next webcasts Challenges in Embedded Design for Motor Control systems March 16th at Noon (ET) MEMs solutions for Instrumentation applications April 13th at Noon (EDT) Multi-parameter Vital Signs Patient Monitors May 18th at Noon (EDT) www.analog.com/webcast55
- 56. Fundamentals Webcasts 2011 January Introduction and Fundamentals of Sensors February The Op Amp March Beyond the Op Amp April Converters, Part 1, Understanding Sampled Data Systems May Converters, Part 2, Digital-to-Analog Converters June Converters, Part 3, Analog-to-Digital Converters July Powering your circuit August RF: Making your circuit mobile September Fundamentals of DSP/Embedded System design October Challenges in Industrial Design November Tips and Tricks for laying out your PC board December Final Exam, Ask Analog Devices www.analog.com/webcast
- 57. The World Leader in High Performance Signal Processing SolutionsThank You

No public clipboards found for this slide

×
### Save the most important slides with Clipping

Clipping is a handy way to collect and organize the most important slides from a presentation. You can keep your great finds in clipboards organized around topics.

Be the first to comment