Successfully reported this slideshow.
We use your LinkedIn profile and activity data to personalize ads and to show you more relevant ads. You can change your ad preferences anytime.

RF Power Management Attach Training Module

983 views

Published on

An Introduction to ADI’s Power components used in RF signal chains, with special treatment of high performance data converters, transceivers and PLL/VCOs.

Published in: Engineering
  • Be the first to comment

RF Power Management Attach Training Module

  1. 1. A MARKET TRAINING MODULE FREDERIK DOSTAL MARCH 2016 RF Power Management Attach
  2. 2. Agenda ► Introduction ► Typical RF signal chain ► Overview of Power Management RF Attach at ADI ► RF Attach blocks ► Examples  Software Defined Radio SDR AD936x  Transceiver AD9370  RF DAC AD9162  PLL/VCO ADF4355  GaN Amplifier voltage generation ► Additional LC Filters ► ADP5003 ► Summary Approximate training time 20 minutes - 24 Slides Power Management RF – Signal Chain
  3. 3. Introduction ► With the Hittite acquisition in 2014, Analog Devices became a market and technology leader in many RF applications. ► To enable ADI‘s RF customer‘s to build the best possible systems, high quality power rails are needed: ►Attach Power improves the signal-chain performance  e.g. ADI’s low-noise LDO portfolio has been shown to improve VCO/PLL’s performance ►Time-to-Market by ADI optimized power solution ►Risk Reduction by ADI pre-characterized signal-chain performance ►“One-Stop” Customer Support by ADI professional engineering team Analog Devices Power Management
  4. 4. Typical RF signal chain Vector Signal Analysis for Instrumentation & Aerospace and Defense
  5. 5. 2. Pre-regulation with switching regulators Overview RF Attach key Power Management product areas 1. Ultra-low noise Linear Regulators (LDOs) Enhance RF Signal Chain performance 4. System rail generation uPMUs3. Negative voltage generation
  6. 6. RF Attach blocks and power requirements 1 ► Clock & Timing Products – Power requirements: Very low noise rails. Noise causes jitter – Solution: Lowest noise LDOs. (Integrated on some products) ► PLLs, VCOs, PLLVCOs – Power requirements: Very low noise analog rails. Noise degrades phase noise performance – Solution: Lowest noise LDOs – Power requirements : Fast slewing low noise variable voltage 1-20V for VCO tuning voltage used in PLL+VCO control loop – Solution: Boost converter + HV LDO + OP AMP ► ADCs, DACs and T&H Amps – Power requirements: Multiple Digital and Low Noise Analog rails. Noise shows up in RF spectrum as phase noise or spurs. Sequencing. – Solution: Multiple Buck Converters + LDOs, PMU. May require Negative switcher + Negative LDO ► Baseband (Diff Amps, DVGA) – Power requirements: Low noise analog rails. Noise degrades phase noise performance – Solution: Low noise LDOs
  7. 7. RF Attach blocks and power requirements 2 ► Detectors (RMS, Envelope, SDVLA) – Power requirements: Low noise, low current single positive rail – Solutions: LDO ► IF, E-band, V-band Transceivers – Power requirements: Multiple Low Noise Analog rails. Noise shows up in RF phase noise or spurs. Complex voltage sequencing. – Solutions: Multiple Buck Converters + LDOs, PMU? Will require Negative switchers + Negative LDOs ► Power Amplifiers – Power requirements: Low Noise, high current positive rail (GaN requires 20-50V); Lower current negative bias, sequencing – Solutions: Buck or Boost Converter + LDOs. Will often require negative Switcher, LDO. New Automatic Bias Controller ADP5600 ► HDR Products (Fiber Optic MD, HSL, NW) – MD Power requirements: Low Noise, Low voltage positive rail, Pos or Neg bias, possible sequencing – Solutions: Buck or Boost Converter and/or LDOs. May require negative Switcher, LDO.
  8. 8. RF Attach blocks and power requirements 3 – HSL Power requirements: Low Noise, Low voltage positive, and/or negative rail – Solutions: Buck or Boost Converter and/or LDOs. May require negative Switcher, LDO. – NW Power requirements: Multiple Digital rails. Voltage sequencing – Solutions: Multiple Buck or Boost Converter. PMU? ► Control Products (SW, ATT) – Power requirements: High Frequency SOI switches require low current neg bias – Solutions: Negative Switcher and/or LDO. ► Frequency Conversion Products (Active Mixer, Up/Down Converter) – Power requirements: One or Multiple Low Noise Analog rails. – Solutions: Multiple Buck Converters + LDOs,
  9. 9. The Need for Ultra Low Noise LDOs 9 What is the jitter requirement for a 25G lane? With every generation, lane speeds increase and jitter requirements scale accordingly Speed (Lane Speed) Period Jitter Requirement 10G (2.5G) 40G (10G) 100G (25G) 400ps 100ps 40ps 800fs 200fs 80fs 75% reduction 60% reduction
  10. 10. Example 1: AD936x Software Defined Radio Power Requirements ► 17 power supply balls spanning over three power domains supplying different circuits in the part ► Current drawn from different power supply domains depends on end customer application ► Intelligent power management and layout design to optimize performance ► Detailed information in AD936x documentation: Power Domain Voltage range Max current range Analog supply domain 1.3V (+/-3%) 180mA – 1050mA Interface supply domain 1.2V – 2.5V 150mA GPO power supply domain 1.3V – 3.3V 1mA – 100mA
  11. 11. Example 1: ADP5040 Supply for AD936x in noise sensitive applications with ADP1755 LDO MODE VIN2 C1 10uF VIN 3.6V to 5.5V AGND 12 TP FPWM AUTO 17 L1 - 1uH PGND VOUT1 SWVIN1 C3 4.7uF C5 10uF 7 8 12 9 BUCK 1.2A 11 R3 25.5K FB1 R4 10.7K R7 10.7K R8 9.1K C10 1uF 1 VIN3 C9 1uF ON OFF 16 EN2 ON OFF 10 EN1 ON OFF 4 EN3 House keepingC8 1uF 6 FB3 VOUT3 AVIN ADP5040 2 LDO2 300mA 3 VDD_1P3_xxx VDD_INTERFACE VDD_GPO AD936x 1.7V 3.3V R1 29.4K R2 11.3K C2 1uF 15 FB2 VOUT2 14 LDO1 300mA 1.8V C4 0.1uF TRANSCEIVER SECTIONPOWER SECTION R5 11.5K R6 7.15K C6 10nF VIN VIN VIN EN GND SS NC SNS VOUT VOUT VOUT VOUTVOUTVIN VIN PG C7 2x 10uF 1.3V ADP1755 LDO
  12. 12. 12 Example 2: AD9370 Power Requirements ► 20 power supply balls spanning over seven power domains supplying different circuits in the part ► Current drawn from different power supply domains depends on end customer application ► Intelligent power management and layout design to optimize performance Power Domain Voltage Range Preliminary current VDDA1P3 Analog supply Sensitive 1.3V (+/-2.5%, DC plus AC tolerance) 1410mA VDDA1P3 Analog supply 1.3V (+/-2.5%, DC plus AC tolerance) 1051mA VDDD1P3_DIG supply 1.3V (+/-2.5%) 1200mA 1P8 TX 1.8V 400mA VDD Interface 1.8V~2.5V 50mA VDDA_3P3 power supply 3.3V 124mA JESD Supply (VTT) 1.3V 250mA
  13. 13. 13 Example 2: Evolution of ADI Agile RF Transceiver Power Solution Conservative RF Power Solution ADP5050, 7x LDOs 850mA 83mA 50mA 1.65V/2050mA 2.3V/690mA1.2A Buck Regulator 4.5V to 15.5V ADP5050 2.3V 1200mA 1250mA 1.3V TX Analog 1.3V TX Digital 1.8V TX 1.8V LVDS/CMOS 2TX/2RX 1.3V VDD_JESD 86mA 420mA 50mA 1.3V/1950mA ADP1740 2A LDO ADP1740 2A LDO 4A Buck Regulator 4A Buck Regulator 3.3V VDD_GPO 3.6V/1000mA 200mA LDO F E T S ADP1755 1.2A LDO 700mA 200mA 200mA 1.3V RX Analog 1.3V RX Digital 1.8V LVDS/CMOS 1.3V VDD_JESD 3.3V VDD_GPO ADP125 500mA LDO CLOCKING400mA 1.2A Buck Regulator ADP125 500mA LDO ADP7104 (0.5A LDO) 2TX/2RX 1.8V TX 420mA ADP121 150mA LDO 900mA 110mA 50mA 1.3V/ 1920mA 3.3V/ 250mA 4.5V ~ 15.5V ADP5054 1300mA 1000mA 1.3V Analog 1.3V Digital 1.8V TX 1.8V INTERFACE AD9368 (2Tx) 1.8V CH4 2.5A Buck (Low-Noise) 1.3V VDD_JESD 110mA 420mA 50mA 1.65V/2200mA ADP1740 (2A LDO) ADP1740 (2A LDO) 3.3V VDD_GPO 1.8V/ 420mA F E T S 700mA 100mA 100mA 1.3V Analog 1.3V Digital 1.8V INTERFACE AD9368 (2Rx) 1.3V VDD_JESD 3.3V VDD_GPO VREG EN1 EN2 EN4 EN3 CH1 6A Buck (Low-Noise) CH3 2.5A Buck (Low-Noise) 1.6V 100k 60.4k R1 R2 NC C1 1P3DIG_PWRGD EN EN CH2 6A Buck (Low-Noise) VREG Power-up Sequence: 1.3V_Digital ---> 1.3V_Analog ---> 1.8V_Tx /1.8V_INTERFACE/3.3V_VDD_GPO ENEN ADP121 (0.15A LDO) Optimized RF Power Solution ADP5054, 3x LDOs Reduced Size Reduced Cost Improves RF Competition
  14. 14. Example 3: Power Solution for AD9162 16-bit 12 GSPS RF DAC 14 ADP5073 5Vin/12vin AD9162/4 -1.2Va 1.2Va 2.5Va 3.3Vser ADP7118 400mA 180mA 40mA 1.2A 1.2Vd 800mA 1.2Vser ADM7154 ADP1761 ADP2386 ADP7183 -180mA ADP2370 ADP2301 ADP1761ADP2370 ADP5054 Direct to RF + W ideband Integrated TRX Superhet Radio AD9361 AD9368 AD9122 AD9154 AD9162 5GHzDC CW 2.5GHz RF Synthesis Signal BW HB 2× HB 3× JESD HB 2×, 4×, 8× NCO INV SINC HB 2× DATA LATCH SDO SDIO SCLK CSB SPI DAC CORE SERDIN0+/- . . SERDIN7+/- SYSREF+/- SYNC+/- CLOCK DISTRIBUTION DACCLK+/- TO JESD TO DATAPATH TX_ENABLE OUTPUT+/- RESETB IRQB VREF ISET VREF NRZ RZ MIX
  15. 15. ADF4355 / ADF5355 / HMC833 PLL/VCO ADM7150 ADM7150 5V 3.3V 12Vin Example 4: PLL/VCO Applications Diagrams
  16. 16. 16 eGaN FETs LDMOS FETs GaAs FETs5.0V Zin λ/4 Zout λ/4 50Ω Vd =28..50V Vd =28..50V Vd =10..28V λ/4 Example 5: Generating Bias Voltage for GaN FETs VIN = 2.85V~15V PVIN FB VREF EN SW CIN D L COUT ADP5073/4 VNEG (-5V/500mV, up to -35V) AVIN PVIN SW AGND SS SYNC SLEW PWRGD COMP Cc Rc VREG Cv ON OFF -8.5V @100mA ADP7182 Neg LDO -8V @100mA
  17. 17. L/C Filter To Attenuate The Switcher Output Ripple 1P3_Analog AD9368 C6 10nF 1.3V VIN VIN VIN EN GND SS NC SNS VOUT VOUT VOUT VOUTVOUTVIN VIN PG ADP1740 -1.3V LDO C6 10uF C7 47uF R4 0.1ohm L3 140nH 16mohm C3 47uF C2 47uF C1 47uF L1 2.2uH ADP505x VIN 5V to 12V SW1 C4 10uF C5 47uF R3 0.1ohm L2 140nH 16mohm R1 10K R2 10K FB1 CH1 2.5A Buck Regulator 1.65V LC Filter LC Filter AC response of the filter shows about 35dB attenuation at 1MHz Note: Difficult for LDO to filter the switcher fundamental switching ripple and its high-freq harmonic, 2nd stage LC filter is usually recommended in LDO’s input. Switching Ripple & Harmonic (100s’ kHz to MHz)
  18. 18. ADP5003 – 3A Switcher plus 3A NFET LDO 18 SS / RT VFB1 SW1 PGND1 VREG PVINSYS C2 C1 C5 VIN: 4.2V to 15V AGND PVIN2 VOUT2 C9 VFB2P Int VREG EN1 C7 SS VBUF COMP1 R2C4 L1 OSC REFOUT R7 R6 EN2 VFB2N L2 VSET2 Low Noise LDO Active Filter 3 A C6 Load SYNC_IN/ SYNC_OUT R1 VOUT2: 0.6V to 3.3V VOUT1 0.6V to 5V R5 VSET1 VREG_LDO C8 PVIN1 BUCK REGULATOR 3 A VIN: 4.2V to 15V C3 R3 R4  Two Operation Modes  Adaptive Operation Mode - Single Output  Independent Operation Mode - Dual Output  3A Low-Noise NFET LDO (Active Filter)  ~6µVrms Output Noise (Indp. of Vout setting)  High PSRR at low voltage headroom  Adaptive Headroom Control (50mV~300mV)  32-lead 5mm x 5mm LFCSP Package (under development) + Voltage Droop - >35dB PSRR Works like “Green LDO” (High Efficiency, Low Output Noise) 0 200 400 600 10 100 1000 10000 100000 NSD(nv/rt-Hz) Frequency (Hz) Noise Spectral Density, 300mV Headroom 100 mA In Development to be released July 2016
  19. 19. Further information ► Attach ‚Power Packs‘:  AD9162/4 RF DAC https://analog.my.salesforce.com/sfc/#version?selectedDocumentId=06932000002SwZH ► Various RF component datasheets ► Power Attach brochure  General ADI Power Management Attach information: ► RF Power Attach hyperlinked presentation coming up in Q3 2016. Stay tuned…
  20. 20. Summary ► Analog Devices RF business is a significant and growing part of total ADI business. Power Attach to this business makes good sense. ► RF customers are interested in a reliable proven power solution. Often there is limited power expertise at RF customers. ► There are many RF power attach examples available. Many new datasheets offer a suitable power solution. ► New power developments are targetted at RF power attach. ► ADI RF ultra low noise LDOs are best in class.
  21. 21. The End

×